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/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __ASM_ALTERNATIVE_H
#define __ASM_ALTERNATIVE_H

#include <asm/cpucaps.h>
#include <asm/insn.h>

#define ARM64_CB_PATCH ARM64_NCAPS

#ifndef __ASSEMBLY__

#include <linux/init.h>
#include <linux/types.h>
#include <linux/stddef.h>
#include <linux/stringify.h>

extern int alternatives_applied;

struct alt_instr {
	s32 orig_offset;	/* offset to original instruction */
	s32 alt_offset;		/* offset to replacement instruction */
	u16 cpufeature;		/* cpufeature bit set for replacement */
	u8  orig_len;		/* size of original instruction(s) */
	u8  alt_len;		/* size of new instruction(s), <= orig_len */
};

typedef void (*alternative_cb_t)(struct alt_instr *alt,
				 __le32 *origptr, __le32 *updptr, int nr_inst);

void __init apply_alternatives_all(void);
void apply_alternatives(void *start, size_t length);

#define ALTINSTR_ENTRY(feature)					              \
	" .word 661b - .\n"				/* label           */ \
	" .word 663f - .\n"				/* new instruction */ \
	" .hword " __stringify(feature) "\n"		/* feature bit     */ \
	" .byte 662b-661b\n"				/* source len      */ \
	" .byte 664f-663f\n"				/* replacement len */

#define ALTINSTR_ENTRY_CB(feature, cb)					      \
	" .word 661b - .\n"				/* label           */ \
	" .word " __stringify(cb) "- .\n"		/* callback */	      \
	" .hword " __stringify(feature) "\n"		/* feature bit     */ \
	" .byte 662b-661b\n"				/* source len      */ \
	" .byte 664f-663f\n"				/* replacement len */

/*
 * alternative assembly primitive:
 *
 * If any of these .org directive fail, it means that insn1 and insn2
 * don't have the same length. This used to be written as
 *
 * .if ((664b-663b) != (662b-661b))
 * 	.error "Alternatives instruction length mismatch"
 * .endif
 *
 * but most assemblers die if insn1 or insn2 have a .inst. This should
 * be fixed in a binutils release posterior to 2.25.51.0.2 (anything
 * containing commit 4e4d08cf7399b606 or c1baaddf8861).
 *
 * Alternatives with callbacks do not generate replacement instructions.
 */
#define __ALTERNATIVE_CFG(oldinstr, newinstr, feature, cfg_enabled)	\
	".if "__stringify(cfg_enabled)" == 1\n"				\
	"661:\n\t"							\
	oldinstr "\n"							\
	"662:\n"							\
	".pushsection .altinstructions,\"a\"\n"				\
	ALTINSTR_ENTRY(feature)						\
	".popsection\n"							\
	".subsection 1\n"						\
	"663:\n\t"							\
	newinstr "\n"							\
	"664:\n\t"							\
	".org	. - (664b-663b) + (662b-661b)\n\t"			\
	".org	. - (662b-661b) + (664b-663b)\n\t"			\
	".previous\n"							\
	".endif\n"

#define __ALTERNATIVE_CFG_CB(oldinstr, feature, cfg_enabled, cb)	\
	".if "__stringify(cfg_enabled)" == 1\n"				\
	"661:\n\t"							\
	oldinstr "\n"							\
	"662:\n"							\
	".pushsection .altinstructions,\"a\"\n"				\
	ALTINSTR_ENTRY_CB(feature, cb)					\
	".popsection\n"							\
	"663:\n\t"							\
	"664:\n\t"							\
	".endif\n"

#define _ALTERNATIVE_CFG(oldinstr, newinstr, feature, cfg, ...)	\
	__ALTERNATIVE_CFG(oldinstr, newinstr, feature, IS_ENABLED(cfg))

#define ALTERNATIVE_CB(oldinstr, cb) \
	__ALTERNATIVE_CFG_CB(oldinstr, ARM64_CB_PATCH, 1, cb)
#else

#include <asm/assembler.h>

.macro altinstruction_entry orig_offset alt_offset feature orig_len alt_len
	.word \orig_offset - .
	.word \alt_offset - .
	.hword \feature
	.byte \orig_len
	.byte \alt_len
.endm

.macro alternative_insn insn1, insn2, cap, enable = 1
	.if \enable
661:	\insn1
662:	.pushsection .altinstructions, "a"
	altinstruction_entry 661b, 663f, \cap, 662b-661b, 664f-663f
	.popsection
	.subsection 1
663:	\insn2
664:	.org	. - (664b-663b) + (662b-661b)
	.org	. - (662b-661b) + (664b-663b)
	.previous
	.endif
.endm

/*
 * Alternative sequences
 *
 * The code for the case where the capability is not present will be
 * assembled and linked as normal. There are no restrictions on this
 * code.
 *
 * The code for the case where the capability is present will be
 * assembled into a special section to be used for dynamic patching.
 * Code for that case must:
 *
 * 1. Be exactly the same length (in bytes) as the default code
 *    sequence.
 *
 * 2. Not contain a branch target that is used outside of the
 *    alternative sequence it is defined in (branches into an
 *    alternative sequence are not fixed up).
 */

/*
 * Begin an alternative code sequence.
 */
.macro alternative_if_not cap
	.set .Lasm_alt_mode, 0
	.pushsection .altinstructions, "a"
	altinstruction_entry 661f, 663f, \cap, 662f-661f, 664f-663f
	.popsection
661:
.endm

.macro alternative_if cap
	.set .Lasm_alt_mode, 1
	.pushsection .altinstructions, "a"
	altinstruction_entry 663f, 661f, \cap, 664f-663f, 662f-661f
	.popsection
	.subsection 1
	.align 2	/* So GAS knows label 661 is suitably aligned */
661:
.endm

.macro alternative_cb cb
	.set .Lasm_alt_mode, 0
	.pushsection .altinstructions, "a"
	altinstruction_entry 661f, \cb, ARM64_CB_PATCH, 662f-661f, 0
	.popsection
661:
.endm

/*
 * Provide the other half of the alternative code sequence.
 */
.macro alternative_else
662:
	.if .Lasm_alt_mode==0
	.subsection 1
	.else
	.previous
	.endif
663:
.endm

/*
 * Complete an alternative code sequence.
 */
.macro alternative_endif
664:
	.org	. - (664b-663b) + (662b-661b)
	.org	. - (662b-661b) + (664b-663b)
	.if .Lasm_alt_mode==0
	.previous
	.endif
.endm

/*
 * Callback-based alternative epilogue
 */
.macro alternative_cb_end
662:
.endm

/*
 * Provides a trivial alternative or default sequence consisting solely
 * of NOPs. The number of NOPs is chosen automatically to match the
 * previous case.
 */
.macro alternative_else_nop_endif
alternative_else
	nops	(662b-661b) / AARCH64_INSN_SIZE
alternative_endif
.endm

#define _ALTERNATIVE_CFG(insn1, insn2, cap, cfg, ...)	\
	alternative_insn insn1, insn2, cap, IS_ENABLED(cfg)

.macro user_alt, label, oldinstr, newinstr, cond
9999:	alternative_insn "\oldinstr", "\newinstr", \cond
	_asm_extable 9999b, \label
.endm

/*
 * Generate the assembly for UAO alternatives with exception table entries.
 * This is complicated as there is no post-increment or pair versions of the
 * unprivileged instructions, and USER() only works for single instructions.
 */
#ifdef CONFIG_ARM64_UAO
	.macro uao_ldp l, reg1, reg2, addr, post_inc
		alternative_if_not ARM64_HAS_UAO
8888:			ldp	\reg1, \reg2, [\addr], \post_inc;
8889:			nop;
			nop;
		alternative_else
			ldtr	\reg1, [\addr];
			ldtr	\reg2, [\addr, #8];
			add	\addr, \addr, \post_inc;
		alternative_endif

		_asm_extable	8888b,\l;
		_asm_extable	8889b,\l;
	.endm

	.macro uao_stp l, reg1, reg2, addr, post_inc
		alternative_if_not ARM64_HAS_UAO
8888:			stp	\reg1, \reg2, [\addr], \post_inc;
8889:			nop;
			nop;
		alternative_else
			sttr	\reg1, [\addr];
			sttr	\reg2, [\addr, #8];
			add	\addr, \addr, \post_inc;
		alternative_endif

		_asm_extable	8888b,\l;
		_asm_extable	8889b,\l;
	.endm

	.macro uao_user_alternative l, inst, alt_inst, reg, addr, post_inc
		alternative_if_not ARM64_HAS_UAO
8888:			\inst	\reg, [\addr], \post_inc;
			nop;
		alternative_else
			\alt_inst	\reg, [\addr];
			add		\addr, \addr, \post_inc;
		alternative_endif

		_asm_extable	8888b,\l;
	.endm
#else
	.macro uao_ldp l, reg1, reg2, addr, post_inc
		USER(\l, ldp \reg1, \reg2, [\addr], \post_inc)
	.endm
	.macro uao_stp l, reg1, reg2, addr, post_inc
		USER(\l, stp \reg1, \reg2, [\addr], \post_inc)
	.endm
	.macro uao_user_alternative l, inst, alt_inst, reg, addr, post_inc
		USER(\l, \inst \reg, [\addr], \post_inc)
	.endm
#endif

#endif  /*  __ASSEMBLY__  */

/*
 * Usage: asm(ALTERNATIVE(oldinstr, newinstr, feature));
 *
 * Usage: asm(ALTERNATIVE(oldinstr, newinstr, feature, CONFIG_FOO));
 * N.B. If CONFIG_FOO is specified, but not selected, the whole block
 *      will be omitted, including oldinstr.
 */
#define ALTERNATIVE(oldinstr, newinstr, ...)   \
	_ALTERNATIVE_CFG(oldinstr, newinstr, __VA_ARGS__, 1)

#endif /* __ASM_ALTERNATIVE_H */

Filemanager

Name Type Size Permission Actions
xen Folder 0755
Kbuild File 703 B 0644
acenv.h File 541 B 0644
acpi.h File 4.34 KB 0644
alternative.h File 7.63 KB 0644
arch_gicv3.h File 3.44 KB 0644
arch_timer.h File 4.87 KB 0644
arm-cci.h File 794 B 0644
asm-bug.h File 1.45 KB 0644
asm-offsets.h File 35 B 0644
asm-uaccess.h File 2.09 KB 0644
assembler.h File 13.51 KB 0644
atomic.h File 8.35 KB 0644
atomic_ll_sc.h File 10.62 KB 0644
atomic_lse.h File 14.82 KB 0644
barrier.h File 3.78 KB 0644
bitops.h File 1.9 KB 0644
bitrev.h File 452 B 0644
boot.h File 384 B 0644
brk-imm.h File 706 B 0644
bug.h File 1.09 KB 0644
cache.h File 2.23 KB 0644
cacheflush.h File 4.87 KB 0644
checksum.h File 1.35 KB 0644
clocksource.h File 192 B 0644
cmpxchg.h File 7.98 KB 0644
compat.h File 7.15 KB 0644
compiler.h File 1.18 KB 0644
cpu.h File 1.84 KB 0644
cpu_ops.h File 2.73 KB 0644
cpucaps.h File 1.83 KB 0644
cpufeature.h File 19.14 KB 0644
cpuidle.h File 401 B 0644
cputype.h File 8.1 KB 0644
current.h File 517 B 0644
daifflags.h File 1.59 KB 0644
dcc.h File 1.36 KB 0644
debug-monitors.h File 3.76 KB 0644
device.h File 886 B 0644
dma-mapping.h File 2.42 KB 0644
dmi.h File 850 B 0644
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elf.h File 5.7 KB 0644
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exception.h File 1.21 KB 0644
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fpsimdmacros.h File 5.62 KB 0644
ftrace.h File 1.92 KB 0644
futex.h File 3.41 KB 0644
hardirq.h File 2.08 KB 0644
hugetlb.h File 2.71 KB 0644
hw_breakpoint.h File 4.46 KB 0644
hwcap.h File 1.86 KB 0644
hypervisor.h File 144 B 0644
insn.h File 16.03 KB 0644
io.h File 7.72 KB 0644
irq.h File 307 B 0644
irq_work.h File 228 B 0644
irqflags.h File 2.3 KB 0644
jump_label.h File 1.68 KB 0644
kasan.h File 1.16 KB 0644
kernel-pgtable.h File 4.03 KB 0644
kexec.h File 2.42 KB 0644
kgdb.h File 3.79 KB 0644
kprobes.h File 1.74 KB 0644
kvm_arm.h File 8.38 KB 0644
kvm_asm.h File 4.26 KB 0644
kvm_coproc.h File 2.04 KB 0644
kvm_emulate.h File 10.38 KB 0644
kvm_host.h File 15.73 KB 0644
kvm_hyp.h File 5.79 KB 0644
kvm_mmio.h File 1.3 KB 0644
kvm_mmu.h File 11.72 KB 0644
linkage.h File 114 B 0644
lse.h File 1.26 KB 0644
memblock.h File 720 B 0644
memory.h File 9.32 KB 0644
mmu.h File 2.74 KB 0644
mmu_context.h File 6.35 KB 0644
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module.h File 2.8 KB 0644
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numa.h File 1.33 KB 0644
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page.h File 1.61 KB 0644
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pci.h File 878 B 0644
percpu.h File 7.48 KB 0644
perf_event.h File 3.17 KB 0644
pgalloc.h File 3.71 KB 0644
pgtable-hwdef.h File 9.4 KB 0644
pgtable-prot.h File 4.38 KB 0644
pgtable-types.h File 1.84 KB 0644
pgtable.h File 21.55 KB 0644
probes.h File 1022 B 0644
proc-fns.h File 1.21 KB 0644
processor.h File 6.52 KB 0644
ptdump.h File 1.42 KB 0644
ptrace.h File 9 KB 0644
sdei.h File 1.46 KB 0644
seccomp.h File 714 B 0644
sections.h File 1.46 KB 0644
shmparam.h File 965 B 0644
signal32.h File 1.45 KB 0644
simd.h File 1.39 KB 0644
smp.h File 4.23 KB 0644
smp_plat.h File 1.43 KB 0644
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spinlock_types.h File 1.06 KB 0644
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stackprotector.h File 1.11 KB 0644
stacktrace.h File 2.53 KB 0644
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stage2_pgtable.h File 4.89 KB 0644
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string.h File 2.33 KB 0644
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tlb.h File 2.22 KB 0644
tlbflush.h File 5.38 KB 0644
topology.h File 1.29 KB 0644
traps.h File 3.33 KB 0644
uaccess.h File 12.01 KB 0644
unistd.h File 1.6 KB 0644
unistd32.h File 27.53 KB 0644
uprobes.h File 777 B 0644
vdso.h File 1.09 KB 0644
vdso_datapage.h File 1.53 KB 0644
vectors.h File 1.75 KB 0644
virt.h File 3 KB 0644
vmap_stack.h File 769 B 0644
word-at-a-time.h File 2.22 KB 0644