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/*
 * Copyright (C) 2013 ARM Ltd.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */
#ifndef __ASM_PERCPU_H
#define __ASM_PERCPU_H

#include <asm/alternative.h>
#include <asm/stack_pointer.h>

static inline void set_my_cpu_offset(unsigned long off)
{
	asm volatile(ALTERNATIVE("msr tpidr_el1, %0",
				 "msr tpidr_el2, %0",
				 ARM64_HAS_VIRT_HOST_EXTN)
			:: "r" (off) : "memory");
}

static inline unsigned long __my_cpu_offset(void)
{
	unsigned long off;

	/*
	 * We want to allow caching the value, so avoid using volatile and
	 * instead use a fake stack read to hazard against barrier().
	 */
	asm(ALTERNATIVE("mrs %0, tpidr_el1",
			"mrs %0, tpidr_el2",
			ARM64_HAS_VIRT_HOST_EXTN)
		: "=r" (off) :
		"Q" (*(const unsigned long *)current_stack_pointer));

	return off;
}
#define __my_cpu_offset __my_cpu_offset()

#define PERCPU_OP(op, asm_op)						\
static inline unsigned long __percpu_##op(void *ptr,			\
			unsigned long val, int size)			\
{									\
	unsigned long loop, ret;					\
									\
	switch (size) {							\
	case 1:								\
		asm ("//__per_cpu_" #op "_1\n"				\
		"1:	ldxrb	  %w[ret], %[ptr]\n"			\
			#asm_op " %w[ret], %w[ret], %w[val]\n"		\
		"	stxrb	  %w[loop], %w[ret], %[ptr]\n"		\
		"	cbnz	  %w[loop], 1b"				\
		: [loop] "=&r" (loop), [ret] "=&r" (ret),		\
		  [ptr] "+Q"(*(u8 *)ptr)				\
		: [val] "Ir" (val));					\
		break;							\
	case 2:								\
		asm ("//__per_cpu_" #op "_2\n"				\
		"1:	ldxrh	  %w[ret], %[ptr]\n"			\
			#asm_op " %w[ret], %w[ret], %w[val]\n"		\
		"	stxrh	  %w[loop], %w[ret], %[ptr]\n"		\
		"	cbnz	  %w[loop], 1b"				\
		: [loop] "=&r" (loop), [ret] "=&r" (ret),		\
		  [ptr]  "+Q"(*(u16 *)ptr)				\
		: [val] "Ir" (val));					\
		break;							\
	case 4:								\
		asm ("//__per_cpu_" #op "_4\n"				\
		"1:	ldxr	  %w[ret], %[ptr]\n"			\
			#asm_op " %w[ret], %w[ret], %w[val]\n"		\
		"	stxr	  %w[loop], %w[ret], %[ptr]\n"		\
		"	cbnz	  %w[loop], 1b"				\
		: [loop] "=&r" (loop), [ret] "=&r" (ret),		\
		  [ptr] "+Q"(*(u32 *)ptr)				\
		: [val] "Ir" (val));					\
		break;							\
	case 8:								\
		asm ("//__per_cpu_" #op "_8\n"				\
		"1:	ldxr	  %[ret], %[ptr]\n"			\
			#asm_op " %[ret], %[ret], %[val]\n"		\
		"	stxr	  %w[loop], %[ret], %[ptr]\n"		\
		"	cbnz	  %w[loop], 1b"				\
		: [loop] "=&r" (loop), [ret] "=&r" (ret),		\
		  [ptr] "+Q"(*(u64 *)ptr)				\
		: [val] "Ir" (val));					\
		break;							\
	default:							\
		ret = 0;						\
		BUILD_BUG();						\
	}								\
									\
	return ret;							\
}

PERCPU_OP(add, add)
PERCPU_OP(and, and)
PERCPU_OP(or, orr)
#undef PERCPU_OP

static inline unsigned long __percpu_read(void *ptr, int size)
{
	unsigned long ret;

	switch (size) {
	case 1:
		ret = READ_ONCE(*(u8 *)ptr);
		break;
	case 2:
		ret = READ_ONCE(*(u16 *)ptr);
		break;
	case 4:
		ret = READ_ONCE(*(u32 *)ptr);
		break;
	case 8:
		ret = READ_ONCE(*(u64 *)ptr);
		break;
	default:
		ret = 0;
		BUILD_BUG();
	}

	return ret;
}

static inline void __percpu_write(void *ptr, unsigned long val, int size)
{
	switch (size) {
	case 1:
		WRITE_ONCE(*(u8 *)ptr, (u8)val);
		break;
	case 2:
		WRITE_ONCE(*(u16 *)ptr, (u16)val);
		break;
	case 4:
		WRITE_ONCE(*(u32 *)ptr, (u32)val);
		break;
	case 8:
		WRITE_ONCE(*(u64 *)ptr, (u64)val);
		break;
	default:
		BUILD_BUG();
	}
}

static inline unsigned long __percpu_xchg(void *ptr, unsigned long val,
						int size)
{
	unsigned long ret, loop;

	switch (size) {
	case 1:
		asm ("//__percpu_xchg_1\n"
		"1:	ldxrb	%w[ret], %[ptr]\n"
		"	stxrb	%w[loop], %w[val], %[ptr]\n"
		"	cbnz	%w[loop], 1b"
		: [loop] "=&r"(loop), [ret] "=&r"(ret),
		  [ptr] "+Q"(*(u8 *)ptr)
		: [val] "r" (val));
		break;
	case 2:
		asm ("//__percpu_xchg_2\n"
		"1:	ldxrh	%w[ret], %[ptr]\n"
		"	stxrh	%w[loop], %w[val], %[ptr]\n"
		"	cbnz	%w[loop], 1b"
		: [loop] "=&r"(loop), [ret] "=&r"(ret),
		  [ptr] "+Q"(*(u16 *)ptr)
		: [val] "r" (val));
		break;
	case 4:
		asm ("//__percpu_xchg_4\n"
		"1:	ldxr	%w[ret], %[ptr]\n"
		"	stxr	%w[loop], %w[val], %[ptr]\n"
		"	cbnz	%w[loop], 1b"
		: [loop] "=&r"(loop), [ret] "=&r"(ret),
		  [ptr] "+Q"(*(u32 *)ptr)
		: [val] "r" (val));
		break;
	case 8:
		asm ("//__percpu_xchg_8\n"
		"1:	ldxr	%[ret], %[ptr]\n"
		"	stxr	%w[loop], %[val], %[ptr]\n"
		"	cbnz	%w[loop], 1b"
		: [loop] "=&r"(loop), [ret] "=&r"(ret),
		  [ptr] "+Q"(*(u64 *)ptr)
		: [val] "r" (val));
		break;
	default:
		ret = 0;
		BUILD_BUG();
	}

	return ret;
}

#define _percpu_read(pcp)						\
({									\
	typeof(pcp) __retval;						\
	preempt_disable_notrace();					\
	__retval = (typeof(pcp))__percpu_read(raw_cpu_ptr(&(pcp)), 	\
					      sizeof(pcp));		\
	preempt_enable_notrace();					\
	__retval;							\
})

#define _percpu_write(pcp, val)						\
do {									\
	preempt_disable_notrace();					\
	__percpu_write(raw_cpu_ptr(&(pcp)), (unsigned long)(val), 	\
				sizeof(pcp));				\
	preempt_enable_notrace();					\
} while(0)								\

#define _pcp_protect(operation, pcp, val)			\
({								\
	typeof(pcp) __retval;					\
	preempt_disable();					\
	__retval = (typeof(pcp))operation(raw_cpu_ptr(&(pcp)),	\
					  (val), sizeof(pcp));	\
	preempt_enable();					\
	__retval;						\
})

#define _percpu_add(pcp, val) \
	_pcp_protect(__percpu_add, pcp, val)

#define _percpu_add_return(pcp, val) _percpu_add(pcp, val)

#define _percpu_and(pcp, val) \
	_pcp_protect(__percpu_and, pcp, val)

#define _percpu_or(pcp, val) \
	_pcp_protect(__percpu_or, pcp, val)

#define _percpu_xchg(pcp, val) (typeof(pcp)) \
	_pcp_protect(__percpu_xchg, pcp, (unsigned long)(val))

#define this_cpu_add_1(pcp, val) _percpu_add(pcp, val)
#define this_cpu_add_2(pcp, val) _percpu_add(pcp, val)
#define this_cpu_add_4(pcp, val) _percpu_add(pcp, val)
#define this_cpu_add_8(pcp, val) _percpu_add(pcp, val)

#define this_cpu_add_return_1(pcp, val) _percpu_add_return(pcp, val)
#define this_cpu_add_return_2(pcp, val) _percpu_add_return(pcp, val)
#define this_cpu_add_return_4(pcp, val) _percpu_add_return(pcp, val)
#define this_cpu_add_return_8(pcp, val) _percpu_add_return(pcp, val)

#define this_cpu_and_1(pcp, val) _percpu_and(pcp, val)
#define this_cpu_and_2(pcp, val) _percpu_and(pcp, val)
#define this_cpu_and_4(pcp, val) _percpu_and(pcp, val)
#define this_cpu_and_8(pcp, val) _percpu_and(pcp, val)

#define this_cpu_or_1(pcp, val) _percpu_or(pcp, val)
#define this_cpu_or_2(pcp, val) _percpu_or(pcp, val)
#define this_cpu_or_4(pcp, val) _percpu_or(pcp, val)
#define this_cpu_or_8(pcp, val) _percpu_or(pcp, val)

#define this_cpu_read_1(pcp) _percpu_read(pcp)
#define this_cpu_read_2(pcp) _percpu_read(pcp)
#define this_cpu_read_4(pcp) _percpu_read(pcp)
#define this_cpu_read_8(pcp) _percpu_read(pcp)

#define this_cpu_write_1(pcp, val) _percpu_write(pcp, val)
#define this_cpu_write_2(pcp, val) _percpu_write(pcp, val)
#define this_cpu_write_4(pcp, val) _percpu_write(pcp, val)
#define this_cpu_write_8(pcp, val) _percpu_write(pcp, val)

#define this_cpu_xchg_1(pcp, val) _percpu_xchg(pcp, val)
#define this_cpu_xchg_2(pcp, val) _percpu_xchg(pcp, val)
#define this_cpu_xchg_4(pcp, val) _percpu_xchg(pcp, val)
#define this_cpu_xchg_8(pcp, val) _percpu_xchg(pcp, val)

#include <asm-generic/percpu.h>

#endif /* __ASM_PERCPU_H */

Filemanager

Name Type Size Permission Actions
xen Folder 0755
Kbuild File 703 B 0644
acenv.h File 541 B 0644
acpi.h File 4.34 KB 0644
alternative.h File 7.63 KB 0644
arch_gicv3.h File 3.44 KB 0644
arch_timer.h File 4.87 KB 0644
arm-cci.h File 794 B 0644
asm-bug.h File 1.45 KB 0644
asm-offsets.h File 35 B 0644
asm-uaccess.h File 2.09 KB 0644
assembler.h File 13.51 KB 0644
atomic.h File 8.35 KB 0644
atomic_ll_sc.h File 10.62 KB 0644
atomic_lse.h File 14.82 KB 0644
barrier.h File 3.78 KB 0644
bitops.h File 1.9 KB 0644
bitrev.h File 452 B 0644
boot.h File 384 B 0644
brk-imm.h File 706 B 0644
bug.h File 1.09 KB 0644
cache.h File 2.23 KB 0644
cacheflush.h File 4.87 KB 0644
checksum.h File 1.35 KB 0644
clocksource.h File 192 B 0644
cmpxchg.h File 7.98 KB 0644
compat.h File 7.15 KB 0644
compiler.h File 1.18 KB 0644
cpu.h File 1.84 KB 0644
cpu_ops.h File 2.73 KB 0644
cpucaps.h File 1.83 KB 0644
cpufeature.h File 19.14 KB 0644
cpuidle.h File 401 B 0644
cputype.h File 8.1 KB 0644
current.h File 517 B 0644
daifflags.h File 1.59 KB 0644
dcc.h File 1.36 KB 0644
debug-monitors.h File 3.76 KB 0644
device.h File 886 B 0644
dma-mapping.h File 2.42 KB 0644
dmi.h File 850 B 0644
efi.h File 4.57 KB 0644
elf.h File 5.7 KB 0644
esr.h File 9.02 KB 0644
exception.h File 1.21 KB 0644
exec.h File 868 B 0644
extable.h File 815 B 0644
fb.h File 1000 B 0644
fixmap.h File 2.91 KB 0644
fpsimd.h File 4.21 KB 0644
fpsimdmacros.h File 5.62 KB 0644
ftrace.h File 1.92 KB 0644
futex.h File 3.41 KB 0644
hardirq.h File 2.08 KB 0644
hugetlb.h File 2.71 KB 0644
hw_breakpoint.h File 4.46 KB 0644
hwcap.h File 1.86 KB 0644
hypervisor.h File 144 B 0644
insn.h File 16.03 KB 0644
io.h File 7.72 KB 0644
irq.h File 307 B 0644
irq_work.h File 228 B 0644
irqflags.h File 2.3 KB 0644
jump_label.h File 1.68 KB 0644
kasan.h File 1.16 KB 0644
kernel-pgtable.h File 4.03 KB 0644
kexec.h File 2.42 KB 0644
kgdb.h File 3.79 KB 0644
kprobes.h File 1.74 KB 0644
kvm_arm.h File 8.38 KB 0644
kvm_asm.h File 4.26 KB 0644
kvm_coproc.h File 2.04 KB 0644
kvm_emulate.h File 10.38 KB 0644
kvm_host.h File 15.73 KB 0644
kvm_hyp.h File 5.79 KB 0644
kvm_mmio.h File 1.3 KB 0644
kvm_mmu.h File 11.72 KB 0644
linkage.h File 114 B 0644
lse.h File 1.26 KB 0644
memblock.h File 720 B 0644
memory.h File 9.32 KB 0644
mmu.h File 2.74 KB 0644
mmu_context.h File 6.35 KB 0644
mmzone.h File 266 B 0644
module.h File 2.8 KB 0644
neon.h File 815 B 0644
numa.h File 1.33 KB 0644
page-def.h File 1.17 KB 0644
page.h File 1.61 KB 0644
paravirt.h File 458 B 0644
pci.h File 878 B 0644
percpu.h File 7.48 KB 0644
perf_event.h File 3.17 KB 0644
pgalloc.h File 3.71 KB 0644
pgtable-hwdef.h File 9.4 KB 0644
pgtable-prot.h File 4.38 KB 0644
pgtable-types.h File 1.84 KB 0644
pgtable.h File 21.55 KB 0644
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proc-fns.h File 1.21 KB 0644
processor.h File 6.52 KB 0644
ptdump.h File 1.42 KB 0644
ptrace.h File 9 KB 0644
sdei.h File 1.46 KB 0644
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sections.h File 1.46 KB 0644
shmparam.h File 965 B 0644
signal32.h File 1.45 KB 0644
simd.h File 1.39 KB 0644
smp.h File 4.23 KB 0644
smp_plat.h File 1.43 KB 0644
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spinlock.h File 3.33 KB 0644
spinlock_types.h File 1.06 KB 0644
stack_pointer.h File 247 B 0644
stackprotector.h File 1.11 KB 0644
stacktrace.h File 2.53 KB 0644
stage2_pgtable-nopmd.h File 1.3 KB 0644
stage2_pgtable-nopud.h File 1.24 KB 0644
stage2_pgtable.h File 4.89 KB 0644
stat.h File 1.43 KB 0644
string.h File 2.33 KB 0644
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sync_bitops.h File 1.11 KB 0644
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sysreg.h File 25.1 KB 0644
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thread_info.h File 3.93 KB 0644
timex.h File 883 B 0644
tlb.h File 2.22 KB 0644
tlbflush.h File 5.38 KB 0644
topology.h File 1.29 KB 0644
traps.h File 3.33 KB 0644
uaccess.h File 12.01 KB 0644
unistd.h File 1.6 KB 0644
unistd32.h File 27.53 KB 0644
uprobes.h File 777 B 0644
vdso.h File 1.09 KB 0644
vdso_datapage.h File 1.53 KB 0644
vectors.h File 1.75 KB 0644
virt.h File 3 KB 0644
vmap_stack.h File 769 B 0644
word-at-a-time.h File 2.22 KB 0644