/* * Copyright 2005-2010 Analog Devices Inc. * * Licensed under the GPL-2 or later. */ #ifndef _MACH_PLL_H #define _MACH_PLL_H #ifndef __ASSEMBLY__ #ifdef CONFIG_SMP #include <asm/blackfin.h> #include <asm/irqflags.h> #include <mach/irq.h> #define SUPPLE_0_WAKEUP ((IRQ_SUPPLE_0 - (IRQ_CORETMR + 1)) % 32) #define SUPPLE_1_WAKEUP ((IRQ_SUPPLE_1 - (IRQ_CORETMR + 1)) % 32) static inline void bfin_iwr_restore(unsigned long iwr0, unsigned long iwr1, unsigned long iwr2) { unsigned long SICA_SICB_OFF = ((bfin_read_DSPID() & 0xff) ? 0x1000 : 0); bfin_write32(SIC_IWR0 + SICA_SICB_OFF, iwr0); bfin_write32(SIC_IWR1 + SICA_SICB_OFF, iwr1); } #define bfin_iwr_restore bfin_iwr_restore static inline void bfin_iwr_save(unsigned long niwr0, unsigned long niwr1, unsigned long niwr2, unsigned long *iwr0, unsigned long *iwr1, unsigned long *iwr2) { unsigned long SICA_SICB_OFF = ((bfin_read_DSPID() & 0xff) ? 0x1000 : 0); *iwr0 = bfin_read32(SIC_IWR0 + SICA_SICB_OFF); *iwr1 = bfin_read32(SIC_IWR1 + SICA_SICB_OFF); bfin_iwr_restore(niwr0, niwr1, niwr2); } #define bfin_iwr_save bfin_iwr_save static inline void bfin_iwr_set_sup0(unsigned long *iwr0, unsigned long *iwr1, unsigned long *iwr2) { bfin_iwr_save(0, IWR_ENABLE(SUPPLE_0_WAKEUP) | IWR_ENABLE(SUPPLE_1_WAKEUP), 0, iwr0, iwr1, iwr2); } #endif #endif #include <mach-common/pll.h> #endif
Name | Type | Size | Permission | Actions |
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anomaly.h | File | 17.94 KB | 0644 |
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bf561.h | File | 4.88 KB | 0644 |
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bfin_serial.h | File | 252 B | 0644 |
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blackfin.h | File | 1.39 KB | 0644 |
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cdefBF561.h | File | 107.56 KB | 0644 |
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defBF561.h | File | 87.88 KB | 0644 |
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dma.h | File | 968 B | 0644 |
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gpio.h | File | 1.27 KB | 0644 |
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irq.h | File | 8.24 KB | 0644 |
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mem_map.h | File | 5.88 KB | 0644 |
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pll.h | File | 1.35 KB | 0644 |
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portmux.h | File | 3.81 KB | 0644 |
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smp.h | File | 728 B | 0644 |
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