/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************/ /* * m528xsim.h -- ColdFire 5280/5282 System Integration Module support. * * (C) Copyright 2003, Greg Ungerer (gerg@snapgear.com) */ /****************************************************************************/ #ifndef m528xsim_h #define m528xsim_h /****************************************************************************/ #define CPU_NAME "COLDFIRE(m528x)" #define CPU_INSTR_PER_JIFFY 3 #define MCF_BUSCLK MCF_CLK #include <asm/m52xxacr.h> /* * Define the 5280/5282 SIM register set addresses. */ #define MCFICM_INTC0 (MCF_IPSBAR + 0x0c00) /* Base for Interrupt Ctrl 0 */ #define MCFICM_INTC1 (MCF_IPSBAR + 0x0d00) /* Base for Interrupt Ctrl 0 */ #define MCFINTC_IPRH 0x00 /* Interrupt pending 32-63 */ #define MCFINTC_IPRL 0x04 /* Interrupt pending 1-31 */ #define MCFINTC_IMRH 0x08 /* Interrupt mask 32-63 */ #define MCFINTC_IMRL 0x0c /* Interrupt mask 1-31 */ #define MCFINTC_INTFRCH 0x10 /* Interrupt force 32-63 */ #define MCFINTC_INTFRCL 0x14 /* Interrupt force 1-31 */ #define MCFINTC_IRLR 0x18 /* */ #define MCFINTC_IACKL 0x19 /* */ #define MCFINTC_ICR0 0x40 /* Base ICR register */ #define MCFINT_VECBASE 64 /* Vector base number */ #define MCFINT_UART0 13 /* Interrupt number for UART0 */ #define MCFINT_UART1 14 /* Interrupt number for UART1 */ #define MCFINT_UART2 15 /* Interrupt number for UART2 */ #define MCFINT_I2C0 17 /* Interrupt number for I2C */ #define MCFINT_QSPI 18 /* Interrupt number for QSPI */ #define MCFINT_FECRX0 23 /* Interrupt number for FEC */ #define MCFINT_FECTX0 27 /* Interrupt number for FEC */ #define MCFINT_FECENTC0 29 /* Interrupt number for FEC */ #define MCFINT_PIT1 55 /* Interrupt number for PIT1 */ #define MCF_IRQ_UART0 (MCFINT_VECBASE + MCFINT_UART0) #define MCF_IRQ_UART1 (MCFINT_VECBASE + MCFINT_UART1) #define MCF_IRQ_UART2 (MCFINT_VECBASE + MCFINT_UART2) #define MCF_IRQ_FECRX0 (MCFINT_VECBASE + MCFINT_FECRX0) #define MCF_IRQ_FECTX0 (MCFINT_VECBASE + MCFINT_FECTX0) #define MCF_IRQ_FECENTC0 (MCFINT_VECBASE + MCFINT_FECENTC0) #define MCF_IRQ_QSPI (MCFINT_VECBASE + MCFINT_QSPI) #define MCF_IRQ_PIT1 (MCFINT_VECBASE + MCFINT_PIT1) #define MCF_IRQ_I2C0 (MCFINT_VECBASE + MCFINT_I2C0) /* * SDRAM configuration registers. */ #define MCFSIM_DCR (MCF_IPSBAR + 0x00000044) /* Control */ #define MCFSIM_DACR0 (MCF_IPSBAR + 0x00000048) /* Base address 0 */ #define MCFSIM_DMR0 (MCF_IPSBAR + 0x0000004c) /* Address mask 0 */ #define MCFSIM_DACR1 (MCF_IPSBAR + 0x00000050) /* Base address 1 */ #define MCFSIM_DMR1 (MCF_IPSBAR + 0x00000054) /* Address mask 1 */ /* * DMA unit base addresses. */ #define MCFDMA_BASE0 (MCF_IPSBAR + 0x00000100) #define MCFDMA_BASE1 (MCF_IPSBAR + 0x00000140) #define MCFDMA_BASE2 (MCF_IPSBAR + 0x00000180) #define MCFDMA_BASE3 (MCF_IPSBAR + 0x000001C0) /* * UART module. */ #define MCFUART_BASE0 (MCF_IPSBAR + 0x00000200) #define MCFUART_BASE1 (MCF_IPSBAR + 0x00000240) #define MCFUART_BASE2 (MCF_IPSBAR + 0x00000280) /* * FEC ethernet module. */ #define MCFFEC_BASE0 (MCF_IPSBAR + 0x00001000) #define MCFFEC_SIZE0 0x800 /* * QSPI module. */ #define MCFQSPI_BASE (MCF_IPSBAR + 0x340) #define MCFQSPI_SIZE 0x40 #define MCFQSPI_CS0 147 #define MCFQSPI_CS1 148 #define MCFQSPI_CS2 149 #define MCFQSPI_CS3 150 /* * GPIO registers */ #define MCFGPIO_PODR_A (MCF_IPSBAR + 0x00100000) #define MCFGPIO_PODR_B (MCF_IPSBAR + 0x00100001) #define MCFGPIO_PODR_C (MCF_IPSBAR + 0x00100002) #define MCFGPIO_PODR_D (MCF_IPSBAR + 0x00100003) #define MCFGPIO_PODR_E (MCF_IPSBAR + 0x00100004) #define MCFGPIO_PODR_F (MCF_IPSBAR + 0x00100005) #define MCFGPIO_PODR_G (MCF_IPSBAR + 0x00100006) #define MCFGPIO_PODR_H (MCF_IPSBAR + 0x00100007) #define MCFGPIO_PODR_J (MCF_IPSBAR + 0x00100008) #define MCFGPIO_PODR_DD (MCF_IPSBAR + 0x00100009) #define MCFGPIO_PODR_EH (MCF_IPSBAR + 0x0010000A) #define MCFGPIO_PODR_EL (MCF_IPSBAR + 0x0010000B) #define MCFGPIO_PODR_AS (MCF_IPSBAR + 0x0010000C) #define MCFGPIO_PODR_QS (MCF_IPSBAR + 0x0010000D) #define MCFGPIO_PODR_SD (MCF_IPSBAR + 0x0010000E) #define MCFGPIO_PODR_TC (MCF_IPSBAR + 0x0010000F) #define MCFGPIO_PODR_TD (MCF_IPSBAR + 0x00100010) #define MCFGPIO_PODR_UA (MCF_IPSBAR + 0x00100011) #define MCFGPIO_PDDR_A (MCF_IPSBAR + 0x00100014) #define MCFGPIO_PDDR_B (MCF_IPSBAR + 0x00100015) #define MCFGPIO_PDDR_C (MCF_IPSBAR + 0x00100016) #define MCFGPIO_PDDR_D (MCF_IPSBAR + 0x00100017) #define MCFGPIO_PDDR_E (MCF_IPSBAR + 0x00100018) #define MCFGPIO_PDDR_F (MCF_IPSBAR + 0x00100019) #define MCFGPIO_PDDR_G (MCF_IPSBAR + 0x0010001A) #define MCFGPIO_PDDR_H (MCF_IPSBAR + 0x0010001B) #define MCFGPIO_PDDR_J (MCF_IPSBAR + 0x0010001C) #define MCFGPIO_PDDR_DD (MCF_IPSBAR + 0x0010001D) #define MCFGPIO_PDDR_EH (MCF_IPSBAR + 0x0010001E) #define MCFGPIO_PDDR_EL (MCF_IPSBAR + 0x0010001F) #define MCFGPIO_PDDR_AS (MCF_IPSBAR + 0x00100020) #define MCFGPIO_PDDR_QS (MCF_IPSBAR + 0x00100021) #define MCFGPIO_PDDR_SD (MCF_IPSBAR + 0x00100022) #define MCFGPIO_PDDR_TC (MCF_IPSBAR + 0x00100023) #define MCFGPIO_PDDR_TD (MCF_IPSBAR + 0x00100024) #define MCFGPIO_PDDR_UA (MCF_IPSBAR + 0x00100025) #define MCFGPIO_PPDSDR_A (MCF_IPSBAR + 0x00100028) #define MCFGPIO_PPDSDR_B (MCF_IPSBAR + 0x00100029) #define MCFGPIO_PPDSDR_C (MCF_IPSBAR + 0x0010002A) #define MCFGPIO_PPDSDR_D (MCF_IPSBAR + 0x0010002B) #define MCFGPIO_PPDSDR_E (MCF_IPSBAR + 0x0010002C) #define MCFGPIO_PPDSDR_F (MCF_IPSBAR + 0x0010002D) #define MCFGPIO_PPDSDR_G (MCF_IPSBAR + 0x0010002E) #define MCFGPIO_PPDSDR_H (MCF_IPSBAR + 0x0010002F) #define MCFGPIO_PPDSDR_J (MCF_IPSBAR + 0x00100030) #define MCFGPIO_PPDSDR_DD (MCF_IPSBAR + 0x00100031) #define MCFGPIO_PPDSDR_EH (MCF_IPSBAR + 0x00100032) #define MCFGPIO_PPDSDR_EL (MCF_IPSBAR + 0x00100033) #define MCFGPIO_PPDSDR_AS (MCF_IPSBAR + 0x00100034) #define MCFGPIO_PPDSDR_QS (MCF_IPSBAR + 0x00100035) #define MCFGPIO_PPDSDR_SD (MCF_IPSBAR + 0x00100036) #define MCFGPIO_PPDSDR_TC (MCF_IPSBAR + 0x00100037) #define MCFGPIO_PPDSDR_TD (MCF_IPSBAR + 0x00100038) #define MCFGPIO_PPDSDR_UA (MCF_IPSBAR + 0x00100039) #define MCFGPIO_PCLRR_A (MCF_IPSBAR + 0x0010003C) #define MCFGPIO_PCLRR_B (MCF_IPSBAR + 0x0010003D) #define MCFGPIO_PCLRR_C (MCF_IPSBAR + 0x0010003E) #define MCFGPIO_PCLRR_D (MCF_IPSBAR + 0x0010003F) #define MCFGPIO_PCLRR_E (MCF_IPSBAR + 0x00100040) #define MCFGPIO_PCLRR_F (MCF_IPSBAR + 0x00100041) #define MCFGPIO_PCLRR_G (MCF_IPSBAR + 0x00100042) #define MCFGPIO_PCLRR_H (MCF_IPSBAR + 0x00100043) #define MCFGPIO_PCLRR_J (MCF_IPSBAR + 0x00100044) #define MCFGPIO_PCLRR_DD (MCF_IPSBAR + 0x00100045) #define MCFGPIO_PCLRR_EH (MCF_IPSBAR + 0x00100046) #define MCFGPIO_PCLRR_EL (MCF_IPSBAR + 0x00100047) #define MCFGPIO_PCLRR_AS (MCF_IPSBAR + 0x00100048) #define MCFGPIO_PCLRR_QS (MCF_IPSBAR + 0x00100049) #define MCFGPIO_PCLRR_SD (MCF_IPSBAR + 0x0010004A) #define MCFGPIO_PCLRR_TC (MCF_IPSBAR + 0x0010004B) #define MCFGPIO_PCLRR_TD (MCF_IPSBAR + 0x0010004C) #define MCFGPIO_PCLRR_UA (MCF_IPSBAR + 0x0010004D) #define MCFGPIO_PBCDPAR (MCF_IPSBAR + 0x00100050) #define MCFGPIO_PFPAR (MCF_IPSBAR + 0x00100051) #define MCFGPIO_PEPAR (MCF_IPSBAR + 0x00100052) #define MCFGPIO_PJPAR (MCF_IPSBAR + 0x00100054) #define MCFGPIO_PSDPAR (MCF_IPSBAR + 0x00100055) #define MCFGPIO_PASPAR (MCF_IPSBAR + 0x00100056) #define MCFGPIO_PEHLPAR (MCF_IPSBAR + 0x00100058) #define MCFGPIO_PQSPAR (MCF_IPSBAR + 0x00100059) #define MCFGPIO_PTCPAR (MCF_IPSBAR + 0x0010005A) #define MCFGPIO_PTDPAR (MCF_IPSBAR + 0x0010005B) #define MCFGPIO_PUAPAR (MCF_IPSBAR + 0x0010005C) /* * PIT timer base addresses. */ #define MCFPIT_BASE1 (MCF_IPSBAR + 0x00150000) #define MCFPIT_BASE2 (MCF_IPSBAR + 0x00160000) #define MCFPIT_BASE3 (MCF_IPSBAR + 0x00170000) #define MCFPIT_BASE4 (MCF_IPSBAR + 0x00180000) /* * Edge Port registers */ #define MCFEPORT_EPPAR (MCF_IPSBAR + 0x00130000) #define MCFEPORT_EPDDR (MCF_IPSBAR + 0x00130002) #define MCFEPORT_EPIER (MCF_IPSBAR + 0x00130003) #define MCFEPORT_EPDR (MCF_IPSBAR + 0x00130004) #define MCFEPORT_EPPDR (MCF_IPSBAR + 0x00130005) #define MCFEPORT_EPFR (MCF_IPSBAR + 0x00130006) /* * Queued ADC registers */ #define MCFQADC_PORTQA (MCF_IPSBAR + 0x00190006) #define MCFQADC_PORTQB (MCF_IPSBAR + 0x00190007) #define MCFQADC_DDRQA (MCF_IPSBAR + 0x00190008) #define MCFQADC_DDRQB (MCF_IPSBAR + 0x00190009) /* * General Purpose Timers registers */ #define MCFGPTA_GPTPORT (MCF_IPSBAR + 0x001A001D) #define MCFGPTA_GPTDDR (MCF_IPSBAR + 0x001A001E) #define MCFGPTB_GPTPORT (MCF_IPSBAR + 0x001B001D) #define MCFGPTB_GPTDDR (MCF_IPSBAR + 0x001B001E) /* * * definitions for generic gpio support * */ #define MCFGPIO_PODR MCFGPIO_PODR_A /* port output data */ #define MCFGPIO_PDDR MCFGPIO_PDDR_A /* port data direction */ #define MCFGPIO_PPDR MCFGPIO_PPDSDR_A/* port pin data */ #define MCFGPIO_SETR MCFGPIO_PPDSDR_A/* set output */ #define MCFGPIO_CLRR MCFGPIO_PCLRR_A /* clr output */ #define MCFGPIO_IRQ_MAX 8 #define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE #define MCFGPIO_PIN_MAX 180 /* * Reset Control Unit (relative to IPSBAR). */ #define MCF_RCR (MCF_IPSBAR + 0x110000) #define MCF_RSR (MCF_IPSBAR + 0x110001) #define MCF_RCR_SWRESET 0x80 /* Software reset bit */ #define MCF_RCR_FRCSTOUT 0x40 /* Force external reset */ /* * I2C module */ #define MCFI2C_BASE0 (MCF_IPSBAR + 0x300) #define MCFI2C_SIZE0 0x40 /****************************************************************************/ #endif /* m528xsim_h */
Name | Type | Size | Permission | Actions |
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Kbuild | File | 599 B | 0644 |
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MC68328.h | File | 37.82 KB | 0644 |
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MC68EZ328.h | File | 37.74 KB | 0644 |
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MC68VZ328.h | File | 41.02 KB | 0644 |
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a.out-core.h | File | 1.98 KB | 0644 |
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adb_iop.h | File | 1.09 KB | 0644 |
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amigahw.h | File | 10.49 KB | 0644 |
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amigaints.h | File | 3.5 KB | 0644 |
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amigayle.h | File | 3.19 KB | 0644 |
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amipcmcia.h | File | 2.51 KB | 0644 |
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apollohw.h | File | 2.35 KB | 0644 |
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asm-offsets.h | File | 35 B | 0644 |
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asm-prototypes.h | File | 211 B | 0644 |
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atafd.h | File | 300 B | 0644 |
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atafdreg.h | File | 2.68 KB | 0644 |
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atari_joystick.h | File | 457 B | 0644 |
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atari_stdma.h | File | 514 B | 0644 |
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atari_stram.h | File | 528 B | 0644 |
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atarihw.h | File | 20.3 KB | 0644 |
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atariints.h | File | 5.56 KB | 0644 |
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atarikb.h | File | 1.4 KB | 0644 |
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atomic.h | File | 4.86 KB | 0644 |
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bitops.h | File | 12.19 KB | 0644 |
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blinken.h | File | 641 B | 0644 |
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bootinfo.h | File | 783 B | 0644 |
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bootstd.h | File | 4.64 KB | 0644 |
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bug.h | File | 659 B | 0644 |
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bugs.h | File | 369 B | 0644 |
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bvme6000hw.h | File | 3.45 KB | 0644 |
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cache.h | File | 296 B | 0644 |
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cacheflush.h | File | 133 B | 0644 |
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cacheflush_mm.h | File | 6.92 KB | 0644 |
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cacheflush_no.h | File | 2.61 KB | 0644 |
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checksum.h | File | 3.4 KB | 0644 |
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cmpxchg.h | File | 3.34 KB | 0644 |
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coldfire.h | File | 1.61 KB | 0644 |
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contregs.h | File | 3.31 KB | 0644 |
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current.h | File | 580 B | 0644 |
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delay.h | File | 3.43 KB | 0644 |
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div64.h | File | 858 B | 0644 |
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dma-mapping.h | File | 291 B | 0644 |
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dma.h | File | 16.65 KB | 0644 |
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dsp56k.h | File | 1.24 KB | 0644 |
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dvma.h | File | 9.67 KB | 0644 |
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elf.h | File | 3.07 KB | 0644 |
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entry.h | File | 5.76 KB | 0644 |
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export.h | File | 74 B | 0644 |
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fb.h | File | 921 B | 0644 |
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fbio.h | File | 9.87 KB | 0644 |
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flat.h | File | 1.02 KB | 0644 |
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floppy.h | File | 5.06 KB | 0644 |
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fpu.h | File | 535 B | 0644 |
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ftrace.h | File | 12 B | 0644 |
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gpio.h | File | 2.64 KB | 0644 |
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hardirq.h | File | 594 B | 0644 |
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hash.h | File | 2.07 KB | 0644 |
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hp300hw.h | File | 186 B | 0644 |
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hwtest.h | File | 467 B | 0644 |
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ide.h | File | 1.67 KB | 0644 |
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idprom.h | File | 725 B | 0644 |
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intersil.h | File | 1.11 KB | 0644 |
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io.h | File | 383 B | 0644 |
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io_mm.h | File | 16.19 KB | 0644 |
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io_no.h | File | 5.26 KB | 0644 |
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irq.h | File | 2.57 KB | 0644 |
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irqflags.h | File | 1.61 KB | 0644 |
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kexec.h | File | 732 B | 0644 |
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linkage.h | File | 1.55 KB | 0644 |
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m5206sim.h | File | 6.4 KB | 0644 |
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m520xsim.h | File | 7.15 KB | 0644 |
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m523xsim.h | File | 7.7 KB | 0644 |
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m525xsim.h | File | 10.57 KB | 0644 |
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m5272sim.h | File | 6.05 KB | 0644 |
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m527xsim.h | File | 13.51 KB | 0644 |
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m528xsim.h | File | 9.37 KB | 0644 |
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m52xxacr.h | File | 3.57 KB | 0644 |
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m5307sim.h | File | 7.52 KB | 0644 |
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m53xxacr.h | File | 3.6 KB | 0644 |
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m53xxsim.h | File | 53.97 KB | 0644 |
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m5407sim.h | File | 6.14 KB | 0644 |
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m5441xsim.h | File | 8.5 KB | 0644 |
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m54xxacr.h | File | 4.82 KB | 0644 |
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m54xxgpt.h | File | 3.66 KB | 0644 |
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m54xxpci.h | File | 6.13 KB | 0644 |
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m54xxsim.h | File | 3.8 KB | 0644 |
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mac_asc.h | File | 520 B | 0644 |
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mac_baboon.h | File | 999 B | 0644 |
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mac_iop.h | File | 5.37 KB | 0644 |
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mac_oss.h | File | 1.83 KB | 0644 |
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mac_psc.h | File | 7.25 KB | 0644 |
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mac_via.h | File | 11.44 KB | 0644 |
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machdep.h | File | 1.34 KB | 0644 |
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machines.h | File | 3.13 KB | 0644 |
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machw.h | File | 588 B | 0644 |
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macintosh.h | File | 2.02 KB | 0644 |
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macints.h | File | 3.28 KB | 0644 |
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math-emu.h | File | 6.74 KB | 0644 |
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mc146818rtc.h | File | 598 B | 0644 |
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mcf8390.h | File | 3.75 KB | 0644 |
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mcf_pgalloc.h | File | 2.37 KB | 0644 |
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mcf_pgtable.h | File | 9.89 KB | 0644 |
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mcfclk.h | File | 1.01 KB | 0644 |
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mcfdma.h | File | 6.51 KB | 0644 |
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mcfgpio.h | File | 8.48 KB | 0644 |
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mcfintc.h | File | 3.09 KB | 0644 |
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mcfmmu.h | File | 3.67 KB | 0644 |
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mcfpit.h | File | 2.22 KB | 0644 |
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mcfqspi.h | File | 1.82 KB | 0644 |
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mcfsim.h | File | 1.5 KB | 0644 |
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mcfslt.h | File | 1.21 KB | 0644 |
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mcftimer.h | File | 2.3 KB | 0644 |
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mcfuart.h | File | 6.91 KB | 0644 |
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mcfwdebug.h | File | 4.99 KB | 0644 |
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mmu.h | File | 243 B | 0644 |
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mmu_context.h | File | 7.2 KB | 0644 |
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mmzone.h | File | 264 B | 0644 |
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module.h | File | 847 B | 0644 |
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motorola_pgalloc.h | File | 2.26 KB | 0644 |
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motorola_pgtable.h | File | 9.2 KB | 0644 |
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movs.h | File | 1.44 KB | 0644 |
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mvme147hw.h | File | 2.81 KB | 0644 |
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mvme16xhw.h | File | 2.16 KB | 0644 |
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natfeat.h | File | 533 B | 0644 |
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nettel.h | File | 2.95 KB | 0644 |
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nubus.h | File | 1.21 KB | 0644 |
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openprom.h | File | 7.98 KB | 0644 |
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oplib.h | File | 9.54 KB | 0644 |
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page.h | File | 1.47 KB | 0644 |
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page_mm.h | File | 4.06 KB | 0644 |
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page_no.h | File | 1.28 KB | 0644 |
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page_offset.h | File | 256 B | 0644 |
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parport.h | File | 837 B | 0644 |
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pci.h | File | 458 B | 0644 |
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pgalloc.h | File | 444 B | 0644 |
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pgtable.h | File | 127 B | 0644 |
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pgtable_mm.h | File | 4.84 KB | 0644 |
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pgtable_no.h | File | 1.57 KB | 0644 |
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processor.h | File | 3.59 KB | 0644 |
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ptrace.h | File | 643 B | 0644 |
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q40_master.h | File | 2.28 KB | 0644 |
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q40ints.h | File | 749 B | 0644 |
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quicc_simple.h | File | 1.79 KB | 0644 |
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raw_io.h | File | 11.41 KB | 0644 |
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segment.h | File | 1.42 KB | 0644 |
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serial.h | File | 1.14 KB | 0644 |
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setup.h | File | 9.25 KB | 0644 |
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signal.h | File | 1.34 KB | 0644 |
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smp.h | File | 32 B | 0644 |
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string.h | File | 1.68 KB | 0644 |
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sun3-head.h | File | 353 B | 0644 |
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sun3_pgalloc.h | File | 2.26 KB | 0644 |
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sun3_pgtable.h | File | 7.65 KB | 0644 |
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sun3ints.h | File | 989 B | 0644 |
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sun3mmu.h | File | 4.91 KB | 0644 |
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sun3x.h | File | 868 B | 0644 |
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sun3xflop.h | File | 5.62 KB | 0644 |
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sun3xprom.h | File | 1.31 KB | 0644 |
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switch_to.h | File | 1.51 KB | 0644 |
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thread_info.h | File | 2.02 KB | 0644 |
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timex.h | File | 974 B | 0644 |
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tlb.h | File | 486 B | 0644 |
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tlbflush.h | File | 5.95 KB | 0644 |
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traps.h | File | 8.33 KB | 0644 |
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uaccess.h | File | 152 B | 0644 |
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uaccess_mm.h | File | 10.31 KB | 0644 |
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uaccess_no.h | File | 3.69 KB | 0644 |
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ucontext.h | File | 570 B | 0644 |
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unaligned.h | File | 600 B | 0644 |
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unistd.h | File | 952 B | 0644 |
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user.h | File | 3.78 KB | 0644 |
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vga.h | File | 651 B | 0644 |
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virtconvert.h | File | 947 B | 0644 |
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zorro.h | File | 1.17 KB | 0644 |
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