/* * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. * * Copyright (c) 1994 - 1997, 99, 2000, 06, 07 Ralf Baechle (ralf@linux-mips.org) * Copyright (c) 1999, 2000 Silicon Graphics, Inc. */ #ifndef _ASM_BITOPS_H #define _ASM_BITOPS_H #ifndef _LINUX_BITOPS_H #error only <linux/bitops.h> can be included directly #endif #include <linux/compiler.h> #include <linux/types.h> #include <asm/barrier.h> #include <asm/byteorder.h> /* sigh ... */ #include <asm/compiler.h> #include <asm/cpu-features.h> #include <asm/llsc.h> #include <asm/sgidefs.h> #include <asm/war.h> /* * These are the "slower" versions of the functions and are in bitops.c. * These functions call raw_local_irq_{save,restore}(). */ void __mips_set_bit(unsigned long nr, volatile unsigned long *addr); void __mips_clear_bit(unsigned long nr, volatile unsigned long *addr); void __mips_change_bit(unsigned long nr, volatile unsigned long *addr); int __mips_test_and_set_bit(unsigned long nr, volatile unsigned long *addr); int __mips_test_and_set_bit_lock(unsigned long nr, volatile unsigned long *addr); int __mips_test_and_clear_bit(unsigned long nr, volatile unsigned long *addr); int __mips_test_and_change_bit(unsigned long nr, volatile unsigned long *addr); /* * set_bit - Atomically set a bit in memory * @nr: the bit to set * @addr: the address to start counting from * * This function is atomic and may not be reordered. See __set_bit() * if you do not require the atomic guarantees. * Note that @nr may be almost arbitrarily large; this function is not * restricted to acting on a single-word quantity. */ static inline void set_bit(unsigned long nr, volatile unsigned long *addr) { unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG); int bit = nr & SZLONG_MASK; unsigned long temp; if (kernel_uses_llsc && R10000_LLSC_WAR) { __asm__ __volatile__( " .set arch=r4000 \n" "1: " __LL "%0, %1 # set_bit \n" " or %0, %2 \n" " " __SC "%0, %1 \n" " beqzl %0, 1b \n" " .set mips0 \n" : "=&r" (temp), "=" GCC_OFF_SMALL_ASM() (*m) : "ir" (1UL << bit), GCC_OFF_SMALL_ASM() (*m)); #if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6) } else if (kernel_uses_llsc && __builtin_constant_p(bit)) { do { __asm__ __volatile__( " " __LL "%0, %1 # set_bit \n" " " __INS "%0, %3, %2, 1 \n" " " __SC "%0, %1 \n" : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m) : "ir" (bit), "r" (~0)); } while (unlikely(!temp)); #endif /* CONFIG_CPU_MIPSR2 || CONFIG_CPU_MIPSR6 */ } else if (kernel_uses_llsc) { do { __asm__ __volatile__( " .set "MIPS_ISA_ARCH_LEVEL" \n" " " __LL "%0, %1 # set_bit \n" " or %0, %2 \n" " " __SC "%0, %1 \n" " .set mips0 \n" : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m) : "ir" (1UL << bit)); } while (unlikely(!temp)); } else __mips_set_bit(nr, addr); } /* * clear_bit - Clears a bit in memory * @nr: Bit to clear * @addr: Address to start counting from * * clear_bit() is atomic and may not be reordered. However, it does * not contain a memory barrier, so if it is used for locking purposes, * you should call smp_mb__before_atomic() and/or smp_mb__after_atomic() * in order to ensure changes are visible on other processors. */ static inline void clear_bit(unsigned long nr, volatile unsigned long *addr) { unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG); int bit = nr & SZLONG_MASK; unsigned long temp; if (kernel_uses_llsc && R10000_LLSC_WAR) { __asm__ __volatile__( " .set arch=r4000 \n" "1: " __LL "%0, %1 # clear_bit \n" " and %0, %2 \n" " " __SC "%0, %1 \n" " beqzl %0, 1b \n" " .set mips0 \n" : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m) : "ir" (~(1UL << bit))); #if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6) } else if (kernel_uses_llsc && __builtin_constant_p(bit)) { do { __asm__ __volatile__( " " __LL "%0, %1 # clear_bit \n" " " __INS "%0, $0, %2, 1 \n" " " __SC "%0, %1 \n" : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m) : "ir" (bit)); } while (unlikely(!temp)); #endif /* CONFIG_CPU_MIPSR2 || CONFIG_CPU_MIPSR6 */ } else if (kernel_uses_llsc) { do { __asm__ __volatile__( " .set "MIPS_ISA_ARCH_LEVEL" \n" " " __LL "%0, %1 # clear_bit \n" " and %0, %2 \n" " " __SC "%0, %1 \n" " .set mips0 \n" : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m) : "ir" (~(1UL << bit))); } while (unlikely(!temp)); } else __mips_clear_bit(nr, addr); } /* * clear_bit_unlock - Clears a bit in memory * @nr: Bit to clear * @addr: Address to start counting from * * clear_bit() is atomic and implies release semantics before the memory * operation. It can be used for an unlock. */ static inline void clear_bit_unlock(unsigned long nr, volatile unsigned long *addr) { smp_mb__before_atomic(); clear_bit(nr, addr); } /* * change_bit - Toggle a bit in memory * @nr: Bit to change * @addr: Address to start counting from * * change_bit() is atomic and may not be reordered. * Note that @nr may be almost arbitrarily large; this function is not * restricted to acting on a single-word quantity. */ static inline void change_bit(unsigned long nr, volatile unsigned long *addr) { int bit = nr & SZLONG_MASK; if (kernel_uses_llsc && R10000_LLSC_WAR) { unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG); unsigned long temp; __asm__ __volatile__( " .set arch=r4000 \n" "1: " __LL "%0, %1 # change_bit \n" " xor %0, %2 \n" " " __SC "%0, %1 \n" " beqzl %0, 1b \n" " .set mips0 \n" : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m) : "ir" (1UL << bit)); } else if (kernel_uses_llsc) { unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG); unsigned long temp; do { __asm__ __volatile__( " .set "MIPS_ISA_ARCH_LEVEL" \n" " " __LL "%0, %1 # change_bit \n" " xor %0, %2 \n" " " __SC "%0, %1 \n" " .set mips0 \n" : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m) : "ir" (1UL << bit)); } while (unlikely(!temp)); } else __mips_change_bit(nr, addr); } /* * test_and_set_bit - Set a bit and return its old value * @nr: Bit to set * @addr: Address to count from * * This operation is atomic and cannot be reordered. * It also implies a memory barrier. */ static inline int test_and_set_bit(unsigned long nr, volatile unsigned long *addr) { int bit = nr & SZLONG_MASK; unsigned long res; smp_mb__before_llsc(); if (kernel_uses_llsc && R10000_LLSC_WAR) { unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG); unsigned long temp; __asm__ __volatile__( " .set arch=r4000 \n" "1: " __LL "%0, %1 # test_and_set_bit \n" " or %2, %0, %3 \n" " " __SC "%2, %1 \n" " beqzl %2, 1b \n" " and %2, %0, %3 \n" " .set mips0 \n" : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res) : "r" (1UL << bit) : "memory"); } else if (kernel_uses_llsc) { unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG); unsigned long temp; do { __asm__ __volatile__( " .set "MIPS_ISA_ARCH_LEVEL" \n" " " __LL "%0, %1 # test_and_set_bit \n" " or %2, %0, %3 \n" " " __SC "%2, %1 \n" " .set mips0 \n" : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res) : "r" (1UL << bit) : "memory"); } while (unlikely(!res)); res = temp & (1UL << bit); } else res = __mips_test_and_set_bit(nr, addr); smp_llsc_mb(); return res != 0; } /* * test_and_set_bit_lock - Set a bit and return its old value * @nr: Bit to set * @addr: Address to count from * * This operation is atomic and implies acquire ordering semantics * after the memory operation. */ static inline int test_and_set_bit_lock(unsigned long nr, volatile unsigned long *addr) { int bit = nr & SZLONG_MASK; unsigned long res; if (kernel_uses_llsc && R10000_LLSC_WAR) { unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG); unsigned long temp; __asm__ __volatile__( " .set arch=r4000 \n" "1: " __LL "%0, %1 # test_and_set_bit \n" " or %2, %0, %3 \n" " " __SC "%2, %1 \n" " beqzl %2, 1b \n" " and %2, %0, %3 \n" " .set mips0 \n" : "=&r" (temp), "+m" (*m), "=&r" (res) : "r" (1UL << bit) : "memory"); } else if (kernel_uses_llsc) { unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG); unsigned long temp; do { __asm__ __volatile__( " .set "MIPS_ISA_ARCH_LEVEL" \n" " " __LL "%0, %1 # test_and_set_bit \n" " or %2, %0, %3 \n" " " __SC "%2, %1 \n" " .set mips0 \n" : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res) : "r" (1UL << bit) : "memory"); } while (unlikely(!res)); res = temp & (1UL << bit); } else res = __mips_test_and_set_bit_lock(nr, addr); smp_llsc_mb(); return res != 0; } /* * test_and_clear_bit - Clear a bit and return its old value * @nr: Bit to clear * @addr: Address to count from * * This operation is atomic and cannot be reordered. * It also implies a memory barrier. */ static inline int test_and_clear_bit(unsigned long nr, volatile unsigned long *addr) { int bit = nr & SZLONG_MASK; unsigned long res; smp_mb__before_llsc(); if (kernel_uses_llsc && R10000_LLSC_WAR) { unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG); unsigned long temp; __asm__ __volatile__( " .set arch=r4000 \n" "1: " __LL "%0, %1 # test_and_clear_bit \n" " or %2, %0, %3 \n" " xor %2, %3 \n" " " __SC "%2, %1 \n" " beqzl %2, 1b \n" " and %2, %0, %3 \n" " .set mips0 \n" : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res) : "r" (1UL << bit) : "memory"); #if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6) } else if (kernel_uses_llsc && __builtin_constant_p(nr)) { unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG); unsigned long temp; do { __asm__ __volatile__( " " __LL "%0, %1 # test_and_clear_bit \n" " " __EXT "%2, %0, %3, 1 \n" " " __INS "%0, $0, %3, 1 \n" " " __SC "%0, %1 \n" : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res) : "ir" (bit) : "memory"); } while (unlikely(!temp)); #endif } else if (kernel_uses_llsc) { unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG); unsigned long temp; do { __asm__ __volatile__( " .set "MIPS_ISA_ARCH_LEVEL" \n" " " __LL "%0, %1 # test_and_clear_bit \n" " or %2, %0, %3 \n" " xor %2, %3 \n" " " __SC "%2, %1 \n" " .set mips0 \n" : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res) : "r" (1UL << bit) : "memory"); } while (unlikely(!res)); res = temp & (1UL << bit); } else res = __mips_test_and_clear_bit(nr, addr); smp_llsc_mb(); return res != 0; } /* * test_and_change_bit - Change a bit and return its old value * @nr: Bit to change * @addr: Address to count from * * This operation is atomic and cannot be reordered. * It also implies a memory barrier. */ static inline int test_and_change_bit(unsigned long nr, volatile unsigned long *addr) { int bit = nr & SZLONG_MASK; unsigned long res; smp_mb__before_llsc(); if (kernel_uses_llsc && R10000_LLSC_WAR) { unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG); unsigned long temp; __asm__ __volatile__( " .set arch=r4000 \n" "1: " __LL "%0, %1 # test_and_change_bit \n" " xor %2, %0, %3 \n" " " __SC "%2, %1 \n" " beqzl %2, 1b \n" " and %2, %0, %3 \n" " .set mips0 \n" : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res) : "r" (1UL << bit) : "memory"); } else if (kernel_uses_llsc) { unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG); unsigned long temp; do { __asm__ __volatile__( " .set "MIPS_ISA_ARCH_LEVEL" \n" " " __LL "%0, %1 # test_and_change_bit \n" " xor %2, %0, %3 \n" " " __SC "\t%2, %1 \n" " .set mips0 \n" : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res) : "r" (1UL << bit) : "memory"); } while (unlikely(!res)); res = temp & (1UL << bit); } else res = __mips_test_and_change_bit(nr, addr); smp_llsc_mb(); return res != 0; } #include <asm-generic/bitops/non-atomic.h> /* * __clear_bit_unlock - Clears a bit in memory * @nr: Bit to clear * @addr: Address to start counting from * * __clear_bit() is non-atomic and implies release semantics before the memory * operation. It can be used for an unlock if no other CPUs can concurrently * modify other bits in the word. */ static inline void __clear_bit_unlock(unsigned long nr, volatile unsigned long *addr) { smp_mb__before_llsc(); __clear_bit(nr, addr); nudge_writes(); } /* * Return the bit position (0..63) of the most significant 1 bit in a word * Returns -1 if no 1 bit exists */ static inline unsigned long __fls(unsigned long word) { int num; if (BITS_PER_LONG == 32 && !__builtin_constant_p(word) && __builtin_constant_p(cpu_has_clo_clz) && cpu_has_clo_clz) { __asm__( " .set push \n" " .set "MIPS_ISA_LEVEL" \n" " clz %0, %1 \n" " .set pop \n" : "=r" (num) : "r" (word)); return 31 - num; } if (BITS_PER_LONG == 64 && !__builtin_constant_p(word) && __builtin_constant_p(cpu_has_mips64) && cpu_has_mips64) { __asm__( " .set push \n" " .set "MIPS_ISA_LEVEL" \n" " dclz %0, %1 \n" " .set pop \n" : "=r" (num) : "r" (word)); return 63 - num; } num = BITS_PER_LONG - 1; #if BITS_PER_LONG == 64 if (!(word & (~0ul << 32))) { num -= 32; word <<= 32; } #endif if (!(word & (~0ul << (BITS_PER_LONG-16)))) { num -= 16; word <<= 16; } if (!(word & (~0ul << (BITS_PER_LONG-8)))) { num -= 8; word <<= 8; } if (!(word & (~0ul << (BITS_PER_LONG-4)))) { num -= 4; word <<= 4; } if (!(word & (~0ul << (BITS_PER_LONG-2)))) { num -= 2; word <<= 2; } if (!(word & (~0ul << (BITS_PER_LONG-1)))) num -= 1; return num; } /* * __ffs - find first bit in word. * @word: The word to search * * Returns 0..SZLONG-1 * Undefined if no bit exists, so code should check against 0 first. */ static inline unsigned long __ffs(unsigned long word) { return __fls(word & -word); } /* * fls - find last bit set. * @word: The word to search * * This is defined the same way as ffs. * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32. */ static inline int fls(int x) { int r; if (!__builtin_constant_p(x) && __builtin_constant_p(cpu_has_clo_clz) && cpu_has_clo_clz) { __asm__( " .set push \n" " .set "MIPS_ISA_LEVEL" \n" " clz %0, %1 \n" " .set pop \n" : "=r" (x) : "r" (x)); return 32 - x; } r = 32; if (!x) return 0; if (!(x & 0xffff0000u)) { x <<= 16; r -= 16; } if (!(x & 0xff000000u)) { x <<= 8; r -= 8; } if (!(x & 0xf0000000u)) { x <<= 4; r -= 4; } if (!(x & 0xc0000000u)) { x <<= 2; r -= 2; } if (!(x & 0x80000000u)) { x <<= 1; r -= 1; } return r; } #include <asm-generic/bitops/fls64.h> /* * ffs - find first bit set. * @word: The word to search * * This is defined the same way as * the libc and compiler builtin ffs routines, therefore * differs in spirit from the above ffz (man ffs). */ static inline int ffs(int word) { if (!word) return 0; return fls(word & -word); } #include <asm-generic/bitops/ffz.h> #include <asm-generic/bitops/find.h> #ifdef __KERNEL__ #include <asm-generic/bitops/sched.h> #include <asm/arch_hweight.h> #include <asm-generic/bitops/const_hweight.h> #include <asm-generic/bitops/le.h> #include <asm-generic/bitops/ext2-atomic.h> #endif /* __KERNEL__ */ #endif /* _ASM_BITOPS_H */
Name | Type | Size | Permission | Actions |
---|---|---|---|---|
dec | Folder | 0755 |
|
|
emma | Folder | 0755 |
|
|
fw | Folder | 0755 |
|
|
ip32 | Folder | 0755 |
|
|
lasat | Folder | 0755 |
|
|
mach-ar7 | Folder | 0755 |
|
|
mach-ath25 | Folder | 0755 |
|
|
mach-ath79 | Folder | 0755 |
|
|
mach-au1x00 | Folder | 0755 |
|
|
mach-bcm47xx | Folder | 0755 |
|
|
mach-bcm63xx | Folder | 0755 |
|
|
mach-bmips | Folder | 0755 |
|
|
mach-cavium-octeon | Folder | 0755 |
|
|
mach-cobalt | Folder | 0755 |
|
|
mach-db1x00 | Folder | 0755 |
|
|
mach-dec | Folder | 0755 |
|
|
mach-emma2rh | Folder | 0755 |
|
|
mach-generic | Folder | 0755 |
|
|
mach-ip22 | Folder | 0755 |
|
|
mach-ip27 | Folder | 0755 |
|
|
mach-ip28 | Folder | 0755 |
|
|
mach-ip32 | Folder | 0755 |
|
|
mach-jazz | Folder | 0755 |
|
|
mach-jz4740 | Folder | 0755 |
|
|
mach-lantiq | Folder | 0755 |
|
|
mach-lasat | Folder | 0755 |
|
|
mach-loongson32 | Folder | 0755 |
|
|
mach-loongson64 | Folder | 0755 |
|
|
mach-malta | Folder | 0755 |
|
|
mach-netlogic | Folder | 0755 |
|
|
mach-paravirt | Folder | 0755 |
|
|
mach-pic32 | Folder | 0755 |
|
|
mach-pistachio | Folder | 0755 |
|
|
mach-pmcs-msp71xx | Folder | 0755 |
|
|
mach-pnx833x | Folder | 0755 |
|
|
mach-ralink | Folder | 0755 |
|
|
mach-rc32434 | Folder | 0755 |
|
|
mach-rm | Folder | 0755 |
|
|
mach-sibyte | Folder | 0755 |
|
|
mach-tx39xx | Folder | 0755 |
|
|
mach-tx49xx | Folder | 0755 |
|
|
mach-vr41xx | Folder | 0755 |
|
|
mach-xilfpga | Folder | 0755 |
|
|
mips-boards | Folder | 0755 |
|
|
netlogic | Folder | 0755 |
|
|
octeon | Folder | 0755 |
|
|
pci | Folder | 0755 |
|
|
sgi | Folder | 0755 |
|
|
sibyte | Folder | 0755 |
|
|
sn | Folder | 0755 |
|
|
txx9 | Folder | 0755 |
|
|
vr41xx | Folder | 0755 |
|
|
xtalk | Folder | 0755 |
|
|
Kbuild | File | 577 B | 0644 |
|
abi.h | File | 853 B | 0644 |
|
addrspace.h | File | 4.1 KB | 0644 |
|
amon.h | File | 409 B | 0644 |
|
arch_hweight.h | File | 792 B | 0644 |
|
asm-eva.h | File | 6.82 KB | 0644 |
|
asm-offsets.h | File | 35 B | 0644 |
|
asm-prototypes.h | File | 197 B | 0644 |
|
asm.h | File | 8.47 KB | 0644 |
|
asmmacro-32.h | File | 2.47 KB | 0644 |
|
asmmacro-64.h | File | 1.22 KB | 0644 |
|
asmmacro.h | File | 14.07 KB | 0644 |
|
atomic.h | File | 19.73 KB | 0644 |
|
barrier.h | File | 8.03 KB | 0644 |
|
bcache.h | File | 2.04 KB | 0644 |
|
bitops.h | File | 15.46 KB | 0644 |
|
bitrev.h | File | 608 B | 0644 |
|
bmips-spaces.h | File | 268 B | 0644 |
|
bmips.h | File | 3.45 KB | 0644 |
|
bootinfo.h | File | 5.08 KB | 0644 |
|
branch.h | File | 2.35 KB | 0644 |
|
break.h | File | 787 B | 0644 |
|
bug.h | File | 759 B | 0644 |
|
bugs.h | File | 944 B | 0644 |
|
cache.h | File | 546 B | 0644 |
|
cacheflush.h | File | 4.99 KB | 0644 |
|
cacheops.h | File | 3.71 KB | 0644 |
|
cdmm.h | File | 3.67 KB | 0644 |
|
cevt-r4k.h | File | 823 B | 0644 |
|
checksum.h | File | 6.43 KB | 0644 |
|
clock.h | File | 997 B | 0644 |
|
clocksource.h | File | 884 B | 0644 |
|
cmp.h | File | 492 B | 0644 |
|
cmpxchg.h | File | 5.28 KB | 0644 |
|
compat-signal.h | File | 640 B | 0644 |
|
compat.h | File | 6.66 KB | 0644 |
|
compiler.h | File | 2.96 KB | 0644 |
|
cop2.h | File | 1.77 KB | 0644 |
|
cpu-features.h | File | 19.46 KB | 0644 |
|
cpu-info.h | File | 5.84 KB | 0644 |
|
cpu-type.h | File | 4.13 KB | 0644 |
|
cpu.h | File | 15.54 KB | 0644 |
|
cpufeature.h | File | 717 B | 0644 |
|
debug.h | File | 654 B | 0644 |
|
delay.h | File | 841 B | 0644 |
|
device.h | File | 347 B | 0644 |
|
div64.h | File | 2.17 KB | 0644 |
|
dma-coherence.h | File | 813 B | 0644 |
|
dma-mapping.h | File | 981 B | 0644 |
|
dma.h | File | 9.92 KB | 0644 |
|
ds1287.h | File | 1019 B | 0644 |
|
dsemul.h | File | 3.24 KB | 0644 |
|
dsp.h | File | 1.91 KB | 0644 |
|
edac.h | File | 819 B | 0644 |
|
elf.h | File | 15.04 KB | 0644 |
|
errno.h | File | 429 B | 0644 |
|
eva.h | File | 796 B | 0644 |
|
exec.h | File | 579 B | 0644 |
|
extable.h | File | 241 B | 0644 |
|
fb.h | File | 372 B | 0644 |
|
fixmap.h | File | 2.29 KB | 0644 |
|
floppy.h | File | 1.57 KB | 0644 |
|
fpregdef.h | File | 2.66 KB | 0644 |
|
fpu.h | File | 5.21 KB | 0644 |
|
fpu_emulator.h | File | 5.74 KB | 0644 |
|
ftrace.h | File | 2.11 KB | 0644 |
|
futex.h | File | 4.87 KB | 0644 |
|
gio_device.h | File | 1.5 KB | 0644 |
|
gt64120.h | File | 19.37 KB | 0644 |
|
hardirq.h | File | 544 B | 0644 |
|
hazards.h | File | 8.36 KB | 0644 |
|
highmem.h | File | 1.72 KB | 0644 |
|
hpet.h | File | 1.93 KB | 0644 |
|
hugetlb.h | File | 2.76 KB | 0644 |
|
hw_irq.h | File | 475 B | 0644 |
|
i8259.h | File | 2.52 KB | 0644 |
|
ide.h | File | 330 B | 0644 |
|
idle.h | File | 689 B | 0644 |
|
inst.h | File | 2.34 KB | 0644 |
|
io.h | File | 18.44 KB | 0644 |
|
irq.h | File | 2.26 KB | 0644 |
|
irq_cpu.h | File | 708 B | 0644 |
|
irq_gt641xx.h | File | 2.69 KB | 0644 |
|
irq_regs.h | File | 744 B | 0644 |
|
irqflags.h | File | 4.04 KB | 0644 |
|
isa-rev.h | File | 556 B | 0644 |
|
isadep.h | File | 603 B | 0644 |
|
jazz.h | File | 8 KB | 0644 |
|
jazzdma.h | File | 2.97 KB | 0644 |
|
jump_label.h | File | 1.4 KB | 0644 |
|
kdebug.h | File | 303 B | 0644 |
|
kexec.h | File | 1.53 KB | 0644 |
|
kgdb.h | File | 1.19 KB | 0644 |
|
kmap_types.h | File | 221 B | 0644 |
|
kprobes.h | File | 2.68 KB | 0644 |
|
kvm_host.h | File | 37.88 KB | 0644 |
|
kvm_para.h | File | 2.09 KB | 0644 |
|
linkage.h | File | 306 B | 0644 |
|
llsc.h | File | 623 B | 0644 |
|
local.h | File | 4.99 KB | 0644 |
|
m48t37.h | File | 732 B | 0644 |
|
maar.h | File | 4.04 KB | 0644 |
|
machine.h | File | 2.93 KB | 0644 |
|
mc146818-time.h | File | 3.69 KB | 0644 |
|
mc146818rtc.h | File | 450 B | 0644 |
|
mips-cm.h | File | 15.86 KB | 0644 |
|
mips-cpc.h | File | 5.83 KB | 0644 |
|
mips-cps.h | File | 6.55 KB | 0644 |
|
mips-gic.h | File | 12.3 KB | 0644 |
|
mips-r2-to-r6-emul.h | File | 2.05 KB | 0644 |
|
mips_machine.h | File | 1.32 KB | 0644 |
|
mips_mt.h | File | 707 B | 0644 |
|
mipsmtregs.h | File | 10.9 KB | 0644 |
|
mipsprom.h | File | 2.1 KB | 0644 |
|
mipsregs.h | File | 88.1 KB | 0644 |
|
mmu.h | File | 550 B | 0644 |
|
mmu_context.h | File | 5.41 KB | 0644 |
|
mmzone.h | File | 561 B | 0644 |
|
module.h | File | 4.45 KB | 0644 |
|
msa.h | File | 8.01 KB | 0644 |
|
msc01_ic.h | File | 6.55 KB | 0644 |
|
nile4.h | File | 10.33 KB | 0644 |
|
paccess.h | File | 3.07 KB | 0644 |
|
page.h | File | 7.19 KB | 0644 |
|
pci.h | File | 4.08 KB | 0644 |
|
perf_event.h | File | 482 B | 0644 |
|
pgalloc.h | File | 3.21 KB | 0644 |
|
pgtable-32.h | File | 7.31 KB | 0644 |
|
pgtable-64.h | File | 10.87 KB | 0644 |
|
pgtable-bits.h | File | 7.36 KB | 0644 |
|
pgtable.h | File | 17.34 KB | 0644 |
|
pm-cps.h | File | 1.68 KB | 0644 |
|
pm.h | File | 3.99 KB | 0644 |
|
pmon.h | File | 1.64 KB | 0644 |
|
prefetch.h | File | 2.1 KB | 0644 |
|
processor.h | File | 11.71 KB | 0644 |
|
prom.h | File | 845 B | 0644 |
|
ptrace.h | File | 5.55 KB | 0644 |
|
r4k-timer.h | File | 604 B | 0644 |
|
r4kcache.h | File | 26.34 KB | 0644 |
|
reboot.h | File | 440 B | 0644 |
|
reg.h | File | 26 B | 0644 |
|
regdef.h | File | 2.63 KB | 0644 |
|
rtlx.h | File | 2.1 KB | 0644 |
|
seccomp.h | File | 800 B | 0644 |
|
serial.h | File | 607 B | 0644 |
|
setup.h | File | 884 B | 0644 |
|
sgialib.h | File | 2.45 KB | 0644 |
|
sgiarcs.h | File | 15.32 KB | 0644 |
|
shmparam.h | File | 352 B | 0644 |
|
sigcontext.h | File | 1.04 KB | 0644 |
|
signal.h | File | 1.02 KB | 0644 |
|
sim.h | File | 2.32 KB | 0644 |
|
smp-cps.h | File | 1.18 KB | 0644 |
|
smp-ops.h | File | 2.33 KB | 0644 |
|
smp.h | File | 3.31 KB | 0644 |
|
sni.h | File | 7.27 KB | 0644 |
|
socket.h | File | 1.34 KB | 0644 |
|
sparsemem.h | File | 486 B | 0644 |
|
spinlock.h | File | 459 B | 0644 |
|
spinlock_types.h | File | 188 B | 0644 |
|
spram.h | File | 262 B | 0644 |
|
stackframe.h | File | 10.82 KB | 0644 |
|
stackprotector.h | File | 1.15 KB | 0644 |
|
stacktrace.h | File | 2.15 KB | 0644 |
|
string.h | File | 2.94 KB | 0644 |
|
switch_to.h | File | 4.19 KB | 0644 |
|
syscall.h | File | 3.57 KB | 0644 |
|
termios.h | File | 2.89 KB | 0644 |
|
thread_info.h | File | 6.63 KB | 0644 |
|
time.h | File | 2.13 KB | 0644 |
|
timex.h | File | 2.87 KB | 0644 |
|
tlb.h | File | 1.09 KB | 0644 |
|
tlbdebug.h | File | 403 B | 0644 |
|
tlbex.h | File | 788 B | 0644 |
|
tlbflush.h | File | 1.67 KB | 0644 |
|
tlbmisc.h | File | 320 B | 0644 |
|
topology.h | File | 619 B | 0644 |
|
traps.h | File | 1.25 KB | 0644 |
|
txx9irq.h | File | 743 B | 0644 |
|
txx9pio.h | File | 592 B | 0644 |
|
txx9tmr.h | File | 1.59 KB | 0644 |
|
types.h | File | 487 B | 0644 |
|
uaccess.h | File | 22.2 KB | 0644 |
|
uasm.h | File | 9.18 KB | 0644 |
|
unistd.h | File | 1.9 KB | 0644 |
|
uprobes.h | File | 1.11 KB | 0644 |
|
vdso.h | File | 3.72 KB | 0644 |
|
vga.h | File | 1.26 KB | 0644 |
|
vpe.h | File | 2.7 KB | 0644 |
|
war.h | File | 7.48 KB | 0644 |
|
watch.h | File | 827 B | 0644 |
|
wbflush.h | File | 694 B | 0644 |
|
yamon-dt.h | File | 1.88 KB | 0644 |
|