/* SPDX-License-Identifier: GPL-2.0 */ /* * linux/include/asm/dma.h: Defines for using and allocating dma channels. * Written by Hennus Bergman, 1992. * High DMA channel support & info by Hannu Savolainen * and John Boyd, Nov. 1992. * * NOTE: all this is true *only* for ISA/EISA expansions on Mips boards * and can only be used for expansion cards. Onboard DMA controllers, such * as the R4030 on Jazz boards behave totally different! */ #ifndef _ASM_DMA_H #define _ASM_DMA_H #include <asm/io.h> /* need byte IO */ #include <linux/spinlock.h> /* And spinlocks */ #include <linux/delay.h> #ifdef HAVE_REALLY_SLOW_DMA_CONTROLLER #define dma_outb outb_p #else #define dma_outb outb #endif #define dma_inb inb /* * NOTES about DMA transfers: * * controller 1: channels 0-3, byte operations, ports 00-1F * controller 2: channels 4-7, word operations, ports C0-DF * * - ALL registers are 8 bits only, regardless of transfer size * - channel 4 is not used - cascades 1 into 2. * - channels 0-3 are byte - addresses/counts are for physical bytes * - channels 5-7 are word - addresses/counts are for physical words * - transfers must not cross physical 64K (0-3) or 128K (5-7) boundaries * - transfer count loaded to registers is 1 less than actual count * - controller 2 offsets are all even (2x offsets for controller 1) * - page registers for 5-7 don't use data bit 0, represent 128K pages * - page registers for 0-3 use bit 0, represent 64K pages * * DMA transfers are limited to the lower 16MB of _physical_ memory. * Note that addresses loaded into registers must be _physical_ addresses, * not logical addresses (which may differ if paging is active). * * Address mapping for channels 0-3: * * A23 ... A16 A15 ... A8 A7 ... A0 (Physical addresses) * | ... | | ... | | ... | * | ... | | ... | | ... | * | ... | | ... | | ... | * P7 ... P0 A7 ... A0 A7 ... A0 * | Page | Addr MSB | Addr LSB | (DMA registers) * * Address mapping for channels 5-7: * * A23 ... A17 A16 A15 ... A9 A8 A7 ... A1 A0 (Physical addresses) * | ... | \ \ ... \ \ \ ... \ \ * | ... | \ \ ... \ \ \ ... \ (not used) * | ... | \ \ ... \ \ \ ... \ * P7 ... P1 (0) A7 A6 ... A0 A7 A6 ... A0 * | Page | Addr MSB | Addr LSB | (DMA registers) * * Again, channels 5-7 transfer _physical_ words (16 bits), so addresses * and counts _must_ be word-aligned (the lowest address bit is _ignored_ at * the hardware level, so odd-byte transfers aren't possible). * * Transfer count (_not # bytes_) is limited to 64K, represented as actual * count - 1 : 64K => 0xFFFF, 1 => 0x0000. Thus, count is always 1 or more, * and up to 128K bytes may be transferred on channels 5-7 in one operation. * */ #ifndef CONFIG_GENERIC_ISA_DMA_SUPPORT_BROKEN #define MAX_DMA_CHANNELS 8 #endif /* * The maximum address in KSEG0 that we can perform a DMA transfer to on this * platform. This describes only the PC style part of the DMA logic like on * Deskstations or Acer PICA but not the much more versatile DMA logic used * for the local devices on Acer PICA or Magnums. */ #if defined(CONFIG_SGI_IP22) || defined(CONFIG_SGI_IP28) /* don't care; ISA bus master won't work, ISA slave DMA supports 32bit addr */ #define MAX_DMA_ADDRESS PAGE_OFFSET #else #define MAX_DMA_ADDRESS (PAGE_OFFSET + 0x01000000) #endif #define MAX_DMA_PFN PFN_DOWN(virt_to_phys((void *)MAX_DMA_ADDRESS)) #ifndef MAX_DMA32_PFN #define MAX_DMA32_PFN (1UL << (32 - PAGE_SHIFT)) #endif /* 8237 DMA controllers */ #define IO_DMA1_BASE 0x00 /* 8 bit slave DMA, channels 0..3 */ #define IO_DMA2_BASE 0xC0 /* 16 bit master DMA, ch 4(=slave input)..7 */ /* DMA controller registers */ #define DMA1_CMD_REG 0x08 /* command register (w) */ #define DMA1_STAT_REG 0x08 /* status register (r) */ #define DMA1_REQ_REG 0x09 /* request register (w) */ #define DMA1_MASK_REG 0x0A /* single-channel mask (w) */ #define DMA1_MODE_REG 0x0B /* mode register (w) */ #define DMA1_CLEAR_FF_REG 0x0C /* clear pointer flip-flop (w) */ #define DMA1_TEMP_REG 0x0D /* Temporary Register (r) */ #define DMA1_RESET_REG 0x0D /* Master Clear (w) */ #define DMA1_CLR_MASK_REG 0x0E /* Clear Mask */ #define DMA1_MASK_ALL_REG 0x0F /* all-channels mask (w) */ #define DMA2_CMD_REG 0xD0 /* command register (w) */ #define DMA2_STAT_REG 0xD0 /* status register (r) */ #define DMA2_REQ_REG 0xD2 /* request register (w) */ #define DMA2_MASK_REG 0xD4 /* single-channel mask (w) */ #define DMA2_MODE_REG 0xD6 /* mode register (w) */ #define DMA2_CLEAR_FF_REG 0xD8 /* clear pointer flip-flop (w) */ #define DMA2_TEMP_REG 0xDA /* Temporary Register (r) */ #define DMA2_RESET_REG 0xDA /* Master Clear (w) */ #define DMA2_CLR_MASK_REG 0xDC /* Clear Mask */ #define DMA2_MASK_ALL_REG 0xDE /* all-channels mask (w) */ #define DMA_ADDR_0 0x00 /* DMA address registers */ #define DMA_ADDR_1 0x02 #define DMA_ADDR_2 0x04 #define DMA_ADDR_3 0x06 #define DMA_ADDR_4 0xC0 #define DMA_ADDR_5 0xC4 #define DMA_ADDR_6 0xC8 #define DMA_ADDR_7 0xCC #define DMA_CNT_0 0x01 /* DMA count registers */ #define DMA_CNT_1 0x03 #define DMA_CNT_2 0x05 #define DMA_CNT_3 0x07 #define DMA_CNT_4 0xC2 #define DMA_CNT_5 0xC6 #define DMA_CNT_6 0xCA #define DMA_CNT_7 0xCE #define DMA_PAGE_0 0x87 /* DMA page registers */ #define DMA_PAGE_1 0x83 #define DMA_PAGE_2 0x81 #define DMA_PAGE_3 0x82 #define DMA_PAGE_5 0x8B #define DMA_PAGE_6 0x89 #define DMA_PAGE_7 0x8A #define DMA_MODE_READ 0x44 /* I/O to memory, no autoinit, increment, single mode */ #define DMA_MODE_WRITE 0x48 /* memory to I/O, no autoinit, increment, single mode */ #define DMA_MODE_CASCADE 0xC0 /* pass thru DREQ->HRQ, DACK<-HLDA only */ #define DMA_AUTOINIT 0x10 extern spinlock_t dma_spin_lock; static __inline__ unsigned long claim_dma_lock(void) { unsigned long flags; spin_lock_irqsave(&dma_spin_lock, flags); return flags; } static __inline__ void release_dma_lock(unsigned long flags) { spin_unlock_irqrestore(&dma_spin_lock, flags); } /* enable/disable a specific DMA channel */ static __inline__ void enable_dma(unsigned int dmanr) { if (dmanr<=3) dma_outb(dmanr, DMA1_MASK_REG); else dma_outb(dmanr & 3, DMA2_MASK_REG); } static __inline__ void disable_dma(unsigned int dmanr) { if (dmanr<=3) dma_outb(dmanr | 4, DMA1_MASK_REG); else dma_outb((dmanr & 3) | 4, DMA2_MASK_REG); } /* Clear the 'DMA Pointer Flip Flop'. * Write 0 for LSB/MSB, 1 for MSB/LSB access. * Use this once to initialize the FF to a known state. * After that, keep track of it. :-) * --- In order to do that, the DMA routines below should --- * --- only be used while holding the DMA lock ! --- */ static __inline__ void clear_dma_ff(unsigned int dmanr) { if (dmanr<=3) dma_outb(0, DMA1_CLEAR_FF_REG); else dma_outb(0, DMA2_CLEAR_FF_REG); } /* set mode (above) for a specific DMA channel */ static __inline__ void set_dma_mode(unsigned int dmanr, char mode) { if (dmanr<=3) dma_outb(mode | dmanr, DMA1_MODE_REG); else dma_outb(mode | (dmanr&3), DMA2_MODE_REG); } /* Set only the page register bits of the transfer address. * This is used for successive transfers when we know the contents of * the lower 16 bits of the DMA current address register, but a 64k boundary * may have been crossed. */ static __inline__ void set_dma_page(unsigned int dmanr, char pagenr) { switch(dmanr) { case 0: dma_outb(pagenr, DMA_PAGE_0); break; case 1: dma_outb(pagenr, DMA_PAGE_1); break; case 2: dma_outb(pagenr, DMA_PAGE_2); break; case 3: dma_outb(pagenr, DMA_PAGE_3); break; case 5: dma_outb(pagenr & 0xfe, DMA_PAGE_5); break; case 6: dma_outb(pagenr & 0xfe, DMA_PAGE_6); break; case 7: dma_outb(pagenr & 0xfe, DMA_PAGE_7); break; } } /* Set transfer address & page bits for specific DMA channel. * Assumes dma flipflop is clear. */ static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int a) { set_dma_page(dmanr, a>>16); if (dmanr <= 3) { dma_outb( a & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE ); dma_outb( (a>>8) & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE ); } else { dma_outb( (a>>1) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE ); dma_outb( (a>>9) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE ); } } /* Set transfer size (max 64k for DMA0..3, 128k for DMA5..7) for * a specific DMA channel. * You must ensure the parameters are valid. * NOTE: from a manual: "the number of transfers is one more * than the initial word count"! This is taken into account. * Assumes dma flip-flop is clear. * NOTE 2: "count" represents _bytes_ and must be even for channels 5-7. */ static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count) { count--; if (dmanr <= 3) { dma_outb( count & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE ); dma_outb( (count>>8) & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE ); } else { dma_outb( (count>>1) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE ); dma_outb( (count>>9) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE ); } } /* Get DMA residue count. After a DMA transfer, this * should return zero. Reading this while a DMA transfer is * still in progress will return unpredictable results. * If called before the channel has been used, it may return 1. * Otherwise, it returns the number of _bytes_ left to transfer. * * Assumes DMA flip-flop is clear. */ static __inline__ int get_dma_residue(unsigned int dmanr) { unsigned int io_port = (dmanr<=3)? ((dmanr&3)<<1) + 1 + IO_DMA1_BASE : ((dmanr&3)<<2) + 2 + IO_DMA2_BASE; /* using short to get 16-bit wrap around */ unsigned short count; count = 1 + dma_inb(io_port); count += dma_inb(io_port) << 8; return (dmanr<=3)? count : (count<<1); } /* These are in kernel/dma.c: */ extern int request_dma(unsigned int dmanr, const char * device_id); /* reserve a DMA channel */ extern void free_dma(unsigned int dmanr); /* release it again */ /* From PCI */ #ifdef CONFIG_PCI extern int isa_dma_bridge_buggy; #else #define isa_dma_bridge_buggy (0) #endif #endif /* _ASM_DMA_H */
Name | Type | Size | Permission | Actions |
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fw | Folder | 0755 |
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mach-bmips | Folder | 0755 |
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mach-cavium-octeon | Folder | 0755 |
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mach-dec | Folder | 0755 |
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mach-emma2rh | Folder | 0755 |
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mach-generic | Folder | 0755 |
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mach-ip22 | Folder | 0755 |
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mach-ip27 | Folder | 0755 |
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mach-ip28 | Folder | 0755 |
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mach-paravirt | Folder | 0755 |
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mach-pic32 | Folder | 0755 |
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mach-pistachio | Folder | 0755 |
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mach-pmcs-msp71xx | Folder | 0755 |
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mach-ralink | Folder | 0755 |
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mach-rc32434 | Folder | 0755 |
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mach-rm | Folder | 0755 |
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mach-sibyte | Folder | 0755 |
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mach-vr41xx | Folder | 0755 |
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mach-xilfpga | Folder | 0755 |
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mips-boards | Folder | 0755 |
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netlogic | Folder | 0755 |
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octeon | Folder | 0755 |
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pci | Folder | 0755 |
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sgi | Folder | 0755 |
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sibyte | Folder | 0755 |
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sn | Folder | 0755 |
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txx9 | Folder | 0755 |
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vr41xx | Folder | 0755 |
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xtalk | Folder | 0755 |
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Kbuild | File | 577 B | 0644 |
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abi.h | File | 853 B | 0644 |
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addrspace.h | File | 4.1 KB | 0644 |
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amon.h | File | 409 B | 0644 |
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arch_hweight.h | File | 792 B | 0644 |
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asm-eva.h | File | 6.82 KB | 0644 |
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asm-offsets.h | File | 35 B | 0644 |
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asm-prototypes.h | File | 197 B | 0644 |
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asm.h | File | 8.47 KB | 0644 |
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cevt-r4k.h | File | 823 B | 0644 |
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compiler.h | File | 2.96 KB | 0644 |
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cpu-features.h | File | 19.46 KB | 0644 |
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delay.h | File | 841 B | 0644 |
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device.h | File | 347 B | 0644 |
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div64.h | File | 2.17 KB | 0644 |
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dma-coherence.h | File | 813 B | 0644 |
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dma-mapping.h | File | 981 B | 0644 |
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dma.h | File | 9.92 KB | 0644 |
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ds1287.h | File | 1019 B | 0644 |
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dsemul.h | File | 3.24 KB | 0644 |
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dsp.h | File | 1.91 KB | 0644 |
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elf.h | File | 15.04 KB | 0644 |
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errno.h | File | 429 B | 0644 |
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exec.h | File | 579 B | 0644 |
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extable.h | File | 241 B | 0644 |
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fb.h | File | 372 B | 0644 |
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fixmap.h | File | 2.29 KB | 0644 |
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floppy.h | File | 1.57 KB | 0644 |
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fpu_emulator.h | File | 5.74 KB | 0644 |
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futex.h | File | 4.87 KB | 0644 |
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gio_device.h | File | 1.5 KB | 0644 |
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gt64120.h | File | 19.37 KB | 0644 |
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hardirq.h | File | 544 B | 0644 |
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highmem.h | File | 1.72 KB | 0644 |
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hpet.h | File | 1.93 KB | 0644 |
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hugetlb.h | File | 2.76 KB | 0644 |
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hw_irq.h | File | 475 B | 0644 |
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i8259.h | File | 2.52 KB | 0644 |
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ide.h | File | 330 B | 0644 |
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idle.h | File | 689 B | 0644 |
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inst.h | File | 2.34 KB | 0644 |
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io.h | File | 18.44 KB | 0644 |
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irq.h | File | 2.26 KB | 0644 |
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irq_cpu.h | File | 708 B | 0644 |
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irq_gt641xx.h | File | 2.69 KB | 0644 |
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irq_regs.h | File | 744 B | 0644 |
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irqflags.h | File | 4.04 KB | 0644 |
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isa-rev.h | File | 556 B | 0644 |
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isadep.h | File | 603 B | 0644 |
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jazz.h | File | 8 KB | 0644 |
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jazzdma.h | File | 2.97 KB | 0644 |
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jump_label.h | File | 1.4 KB | 0644 |
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kdebug.h | File | 303 B | 0644 |
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kexec.h | File | 1.53 KB | 0644 |
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kgdb.h | File | 1.19 KB | 0644 |
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kmap_types.h | File | 221 B | 0644 |
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kprobes.h | File | 2.68 KB | 0644 |
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kvm_host.h | File | 37.88 KB | 0644 |
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kvm_para.h | File | 2.09 KB | 0644 |
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linkage.h | File | 306 B | 0644 |
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llsc.h | File | 623 B | 0644 |
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local.h | File | 4.99 KB | 0644 |
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m48t37.h | File | 732 B | 0644 |
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maar.h | File | 4.04 KB | 0644 |
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machine.h | File | 2.93 KB | 0644 |
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mc146818-time.h | File | 3.69 KB | 0644 |
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mc146818rtc.h | File | 450 B | 0644 |
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mips-cm.h | File | 15.86 KB | 0644 |
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mips-cpc.h | File | 5.83 KB | 0644 |
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mips-cps.h | File | 6.55 KB | 0644 |
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mips-gic.h | File | 12.3 KB | 0644 |
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mips-r2-to-r6-emul.h | File | 2.05 KB | 0644 |
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mips_machine.h | File | 1.32 KB | 0644 |
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mips_mt.h | File | 707 B | 0644 |
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mipsmtregs.h | File | 10.9 KB | 0644 |
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mipsprom.h | File | 2.1 KB | 0644 |
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mipsregs.h | File | 88.1 KB | 0644 |
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mmu.h | File | 550 B | 0644 |
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mmu_context.h | File | 5.41 KB | 0644 |
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mmzone.h | File | 561 B | 0644 |
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module.h | File | 4.45 KB | 0644 |
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msa.h | File | 8.01 KB | 0644 |
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msc01_ic.h | File | 6.55 KB | 0644 |
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nile4.h | File | 10.33 KB | 0644 |
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paccess.h | File | 3.07 KB | 0644 |
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page.h | File | 7.19 KB | 0644 |
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pci.h | File | 4.08 KB | 0644 |
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perf_event.h | File | 482 B | 0644 |
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pgalloc.h | File | 3.21 KB | 0644 |
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pgtable-32.h | File | 7.31 KB | 0644 |
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pgtable-64.h | File | 10.87 KB | 0644 |
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pgtable-bits.h | File | 7.36 KB | 0644 |
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pgtable.h | File | 17.34 KB | 0644 |
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pm-cps.h | File | 1.68 KB | 0644 |
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pm.h | File | 3.99 KB | 0644 |
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pmon.h | File | 1.64 KB | 0644 |
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prefetch.h | File | 2.1 KB | 0644 |
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processor.h | File | 11.71 KB | 0644 |
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prom.h | File | 845 B | 0644 |
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ptrace.h | File | 5.55 KB | 0644 |
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r4k-timer.h | File | 604 B | 0644 |
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r4kcache.h | File | 26.34 KB | 0644 |
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reboot.h | File | 440 B | 0644 |
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reg.h | File | 26 B | 0644 |
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regdef.h | File | 2.63 KB | 0644 |
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rtlx.h | File | 2.1 KB | 0644 |
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seccomp.h | File | 800 B | 0644 |
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serial.h | File | 607 B | 0644 |
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setup.h | File | 884 B | 0644 |
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sgialib.h | File | 2.45 KB | 0644 |
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sgiarcs.h | File | 15.32 KB | 0644 |
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shmparam.h | File | 352 B | 0644 |
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sigcontext.h | File | 1.04 KB | 0644 |
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signal.h | File | 1.02 KB | 0644 |
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sim.h | File | 2.32 KB | 0644 |
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smp-cps.h | File | 1.18 KB | 0644 |
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smp-ops.h | File | 2.33 KB | 0644 |
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smp.h | File | 3.31 KB | 0644 |
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sni.h | File | 7.27 KB | 0644 |
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socket.h | File | 1.34 KB | 0644 |
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sparsemem.h | File | 486 B | 0644 |
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spinlock.h | File | 459 B | 0644 |
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spinlock_types.h | File | 188 B | 0644 |
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spram.h | File | 262 B | 0644 |
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stackframe.h | File | 10.82 KB | 0644 |
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stackprotector.h | File | 1.15 KB | 0644 |
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stacktrace.h | File | 2.15 KB | 0644 |
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string.h | File | 2.94 KB | 0644 |
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switch_to.h | File | 4.19 KB | 0644 |
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syscall.h | File | 3.57 KB | 0644 |
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termios.h | File | 2.89 KB | 0644 |
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thread_info.h | File | 6.63 KB | 0644 |
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time.h | File | 2.13 KB | 0644 |
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timex.h | File | 2.87 KB | 0644 |
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tlb.h | File | 1.09 KB | 0644 |
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tlbdebug.h | File | 403 B | 0644 |
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tlbex.h | File | 788 B | 0644 |
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tlbflush.h | File | 1.67 KB | 0644 |
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tlbmisc.h | File | 320 B | 0644 |
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topology.h | File | 619 B | 0644 |
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traps.h | File | 1.25 KB | 0644 |
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txx9irq.h | File | 743 B | 0644 |
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txx9pio.h | File | 592 B | 0644 |
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txx9tmr.h | File | 1.59 KB | 0644 |
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types.h | File | 487 B | 0644 |
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uaccess.h | File | 22.2 KB | 0644 |
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uasm.h | File | 9.18 KB | 0644 |
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unistd.h | File | 1.9 KB | 0644 |
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uprobes.h | File | 1.11 KB | 0644 |
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vdso.h | File | 3.72 KB | 0644 |
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vga.h | File | 1.26 KB | 0644 |
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vpe.h | File | 2.7 KB | 0644 |
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war.h | File | 7.48 KB | 0644 |
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watch.h | File | 827 B | 0644 |
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wbflush.h | File | 694 B | 0644 |
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yamon-dt.h | File | 1.88 KB | 0644 |
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