/* MN10300 MMU context management * * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved. * Modified by David Howells (dhowells@redhat.com) * - Derived from include/asm-m32r/mmu_context.h * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public Licence * as published by the Free Software Foundation; either version * 2 of the Licence, or (at your option) any later version. * * * This implements an algorithm to provide TLB PID mappings to provide * selective access to the TLB for processes, thus reducing the number of TLB * flushes required. * * Note, however, that the M32R algorithm is technically broken as it does not * handle version wrap-around, and could, theoretically, have a problem with a * very long lived program that sleeps long enough for the version number to * wrap all the way around so that its TLB mappings appear valid once again. */ #ifndef _ASM_MMU_CONTEXT_H #define _ASM_MMU_CONTEXT_H #include <linux/atomic.h> #include <linux/mm_types.h> #include <asm/pgalloc.h> #include <asm/tlbflush.h> #include <asm-generic/mm_hooks.h> #define MMU_CONTEXT_TLBPID_NR 256 #define MMU_CONTEXT_TLBPID_MASK 0x000000ffUL #define MMU_CONTEXT_VERSION_MASK 0xffffff00UL #define MMU_CONTEXT_FIRST_VERSION 0x00000100UL #define MMU_NO_CONTEXT 0x00000000UL #define MMU_CONTEXT_TLBPID_LOCK_NR 0 #define enter_lazy_tlb(mm, tsk) do {} while (0) static inline void cpu_ran_vm(int cpu, struct mm_struct *mm) { #ifdef CONFIG_SMP cpumask_set_cpu(cpu, mm_cpumask(mm)); #endif } static inline bool cpu_maybe_ran_vm(int cpu, struct mm_struct *mm) { #ifdef CONFIG_SMP return cpumask_test_and_set_cpu(cpu, mm_cpumask(mm)); #else return true; #endif } #ifdef CONFIG_MN10300_TLB_USE_PIDR extern unsigned long mmu_context_cache[NR_CPUS]; #define mm_context(mm) (mm->context.tlbpid[smp_processor_id()]) /** * allocate_mmu_context - Allocate storage for the arch-specific MMU data * @mm: The userspace VM context being set up */ static inline unsigned long allocate_mmu_context(struct mm_struct *mm) { unsigned long *pmc = &mmu_context_cache[smp_processor_id()]; unsigned long mc = ++(*pmc); if (!(mc & MMU_CONTEXT_TLBPID_MASK)) { /* we exhausted the TLB PIDs of this version on this CPU, so we * flush this CPU's TLB in its entirety and start new cycle */ local_flush_tlb_all(); /* fix the TLB version if needed (we avoid version #0 so as to * distinguish MMU_NO_CONTEXT) */ if (!mc) *pmc = mc = MMU_CONTEXT_FIRST_VERSION; } mm_context(mm) = mc; return mc; } /* * get an MMU context if one is needed */ static inline unsigned long get_mmu_context(struct mm_struct *mm) { unsigned long mc = MMU_NO_CONTEXT, cache; if (mm) { cache = mmu_context_cache[smp_processor_id()]; mc = mm_context(mm); /* if we have an old version of the context, replace it */ if ((mc ^ cache) & MMU_CONTEXT_VERSION_MASK) mc = allocate_mmu_context(mm); } return mc; } /* * initialise the context related info for a new mm_struct instance */ static inline int init_new_context(struct task_struct *tsk, struct mm_struct *mm) { int num_cpus = NR_CPUS, i; for (i = 0; i < num_cpus; i++) mm->context.tlbpid[i] = MMU_NO_CONTEXT; return 0; } /* * after we have set current->mm to a new value, this activates the context for * the new mm so we see the new mappings. */ static inline void activate_context(struct mm_struct *mm) { PIDR = get_mmu_context(mm) & MMU_CONTEXT_TLBPID_MASK; } #else /* CONFIG_MN10300_TLB_USE_PIDR */ #define init_new_context(tsk, mm) (0) #define activate_context(mm) local_flush_tlb() #endif /* CONFIG_MN10300_TLB_USE_PIDR */ /** * destroy_context - Destroy mm context information * @mm: The MM being destroyed. * * Destroy context related info for an mm_struct that is about to be put to * rest */ #define destroy_context(mm) do {} while (0) /** * switch_mm - Change between userspace virtual memory contexts * @prev: The outgoing MM context. * @next: The incoming MM context. * @tsk: The incoming task. */ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, struct task_struct *tsk) { int cpu = smp_processor_id(); if (prev != next) { #ifdef CONFIG_SMP per_cpu(cpu_tlbstate, cpu).active_mm = next; #endif cpu_ran_vm(cpu, next); PTBR = (unsigned long) next->pgd; activate_context(next); } } #define deactivate_mm(tsk, mm) do {} while (0) #define activate_mm(prev, next) switch_mm((prev), (next), NULL) #endif /* _ASM_MMU_CONTEXT_H */
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asm-offsets.h | File | 35 B | 0644 |
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atomic.h | File | 4.02 KB | 0644 |
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bitops.h | File | 5.42 KB | 0644 |
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bug.h | File | 864 B | 0644 |
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bugs.h | File | 561 B | 0644 |
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busctl-regs.h | File | 7.8 KB | 0644 |
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cache.h | File | 2.06 KB | 0644 |
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cacheflush.h | File | 7.6 KB | 0644 |
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checksum.h | File | 2.09 KB | 0644 |
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cmpxchg.h | File | 2.65 KB | 0644 |
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cpu-regs.h | File | 16.61 KB | 0644 |
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current.h | File | 922 B | 0644 |
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debugger.h | File | 1.2 KB | 0644 |
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delay.h | File | 597 B | 0644 |
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div64.h | File | 3.21 KB | 0644 |
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dma-mapping.h | File | 636 B | 0644 |
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dma.h | File | 3.09 KB | 0644 |
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dmactl-regs.h | File | 532 B | 0644 |
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elf.h | File | 4.49 KB | 0644 |
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emergency-restart.h | File | 43 B | 0644 |
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exceptions.h | File | 4.74 KB | 0644 |
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fpu.h | File | 3.57 KB | 0644 |
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frame.inc | File | 2.37 KB | 0644 |
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ftrace.h | File | 12 B | 0644 |
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futex.h | File | 31 B | 0644 |
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gdb-stub.h | File | 5.42 KB | 0644 |
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hardirq.h | File | 1.68 KB | 0644 |
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highmem.h | File | 3.01 KB | 0644 |
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hw_irq.h | File | 483 B | 0644 |
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intctl-regs.h | File | 2.26 KB | 0644 |
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io.h | File | 7.67 KB | 0644 |
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irq.h | File | 1.11 KB | 0644 |
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irq_regs.h | File | 751 B | 0644 |
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irqflags.h | File | 4.05 KB | 0644 |
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kdebug.h | File | 561 B | 0644 |
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kgdb.h | File | 1.7 KB | 0644 |
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kmap_types.h | File | 160 B | 0644 |
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kprobes.h | File | 1.59 KB | 0644 |
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linkage.h | File | 593 B | 0644 |
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local.h | File | 31 B | 0644 |
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local64.h | File | 33 B | 0644 |
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mc146818rtc.h | File | 26 B | 0644 |
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mmu.h | File | 434 B | 0644 |
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mmu_context.h | File | 4.44 KB | 0644 |
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module.h | File | 677 B | 0644 |
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nmi.h | File | 500 B | 0644 |
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page.h | File | 3.63 KB | 0644 |
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page_offset.h | File | 302 B | 0644 |
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pci.h | File | 2.17 KB | 0644 |
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percpu.h | File | 32 B | 0644 |
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pgalloc.h | File | 1.49 KB | 0644 |
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pgtable.h | File | 15.68 KB | 0644 |
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pio-regs.h | File | 7.53 KB | 0644 |
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processor.h | File | 4.12 KB | 0644 |
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ptrace.h | File | 805 B | 0644 |
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reset-regs.h | File | 1.8 KB | 0644 |
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rtc-regs.h | File | 3.57 KB | 0644 |
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rtc.h | File | 692 B | 0644 |
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rwlock.h | File | 2.98 KB | 0644 |
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serial-regs.h | File | 8.85 KB | 0644 |
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serial.h | File | 1.02 KB | 0644 |
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setup.h | File | 574 B | 0644 |
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shmparam.h | File | 182 B | 0644 |
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signal.h | File | 888 B | 0644 |
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smp.h | File | 3.06 KB | 0644 |
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smsc911x.h | File | 27 B | 0644 |
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spinlock.h | File | 3.84 KB | 0644 |
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spinlock_types.h | File | 445 B | 0644 |
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string.h | File | 1.03 KB | 0644 |
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switch_to.h | File | 1.49 KB | 0644 |
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syscall.h | File | 2.38 KB | 0644 |
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termios.h | File | 387 B | 0644 |
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thread_info.h | File | 4.36 KB | 0644 |
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timer-regs.h | File | 20.72 KB | 0644 |
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timex.h | File | 843 B | 0644 |
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tlb.h | File | 941 B | 0644 |
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tlbflush.h | File | 3.45 KB | 0644 |
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topology.h | File | 34 B | 0644 |
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types.h | File | 620 B | 0644 |
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uaccess.h | File | 7.78 KB | 0644 |
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ucontext.h | File | 673 B | 0644 |
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unaligned.h | File | 678 B | 0644 |
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unistd.h | File | 1.34 KB | 0644 |
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user.h | File | 1.91 KB | 0644 |
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vga.h | File | 471 B | 0644 |
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xor.h | File | 29 B | 0644 |
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