/* Freescale Local Bus Controller * * Copyright © 2006-2007, 2010 Freescale Semiconductor * * Authors: Nick Spence <nick.spence@freescale.com>, * Scott Wood <scottwood@freescale.com> * Jack Lan <jack.lan@freescale.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ #ifndef __ASM_FSL_LBC_H #define __ASM_FSL_LBC_H #include <linux/compiler.h> #include <linux/types.h> #include <linux/io.h> #include <linux/device.h> #include <linux/spinlock.h> struct fsl_lbc_bank { __be32 br; /**< Base Register */ #define BR_BA 0xFFFF8000 #define BR_BA_SHIFT 15 #define BR_PS 0x00001800 #define BR_PS_SHIFT 11 #define BR_PS_8 0x00000800 /* Port Size 8 bit */ #define BR_PS_16 0x00001000 /* Port Size 16 bit */ #define BR_PS_32 0x00001800 /* Port Size 32 bit */ #define BR_DECC 0x00000600 #define BR_DECC_SHIFT 9 #define BR_DECC_OFF 0x00000000 /* HW ECC checking and generation off */ #define BR_DECC_CHK 0x00000200 /* HW ECC checking on, generation off */ #define BR_DECC_CHK_GEN 0x00000400 /* HW ECC checking and generation on */ #define BR_WP 0x00000100 #define BR_WP_SHIFT 8 #define BR_MSEL 0x000000E0 #define BR_MSEL_SHIFT 5 #define BR_MS_GPCM 0x00000000 /* GPCM */ #define BR_MS_FCM 0x00000020 /* FCM */ #define BR_MS_SDRAM 0x00000060 /* SDRAM */ #define BR_MS_UPMA 0x00000080 /* UPMA */ #define BR_MS_UPMB 0x000000A0 /* UPMB */ #define BR_MS_UPMC 0x000000C0 /* UPMC */ #define BR_V 0x00000001 #define BR_V_SHIFT 0 #define BR_RES ~(BR_BA|BR_PS|BR_DECC|BR_WP|BR_MSEL|BR_V) __be32 or; /**< Base Register */ #define OR0 0x5004 #define OR1 0x500C #define OR2 0x5014 #define OR3 0x501C #define OR4 0x5024 #define OR5 0x502C #define OR6 0x5034 #define OR7 0x503C #define OR_FCM_AM 0xFFFF8000 #define OR_FCM_AM_SHIFT 15 #define OR_FCM_BCTLD 0x00001000 #define OR_FCM_BCTLD_SHIFT 12 #define OR_FCM_PGS 0x00000400 #define OR_FCM_PGS_SHIFT 10 #define OR_FCM_CSCT 0x00000200 #define OR_FCM_CSCT_SHIFT 9 #define OR_FCM_CST 0x00000100 #define OR_FCM_CST_SHIFT 8 #define OR_FCM_CHT 0x00000080 #define OR_FCM_CHT_SHIFT 7 #define OR_FCM_SCY 0x00000070 #define OR_FCM_SCY_SHIFT 4 #define OR_FCM_SCY_1 0x00000010 #define OR_FCM_SCY_2 0x00000020 #define OR_FCM_SCY_3 0x00000030 #define OR_FCM_SCY_4 0x00000040 #define OR_FCM_SCY_5 0x00000050 #define OR_FCM_SCY_6 0x00000060 #define OR_FCM_SCY_7 0x00000070 #define OR_FCM_RST 0x00000008 #define OR_FCM_RST_SHIFT 3 #define OR_FCM_TRLX 0x00000004 #define OR_FCM_TRLX_SHIFT 2 #define OR_FCM_EHTR 0x00000002 #define OR_FCM_EHTR_SHIFT 1 #define OR_GPCM_AM 0xFFFF8000 #define OR_GPCM_AM_SHIFT 15 }; struct fsl_lbc_regs { struct fsl_lbc_bank bank[12]; u8 res0[0x8]; __be32 mar; /**< UPM Address Register */ u8 res1[0x4]; __be32 mamr; /**< UPMA Mode Register */ #define MxMR_OP_NO (0 << 28) /**< normal operation */ #define MxMR_OP_WA (1 << 28) /**< write array */ #define MxMR_OP_RA (2 << 28) /**< read array */ #define MxMR_OP_RP (3 << 28) /**< run pattern */ #define MxMR_MAD 0x3f /**< machine address */ __be32 mbmr; /**< UPMB Mode Register */ __be32 mcmr; /**< UPMC Mode Register */ u8 res2[0x8]; __be32 mrtpr; /**< Memory Refresh Timer Prescaler Register */ __be32 mdr; /**< UPM Data Register */ u8 res3[0x4]; __be32 lsor; /**< Special Operation Initiation Register */ __be32 lsdmr; /**< SDRAM Mode Register */ u8 res4[0x8]; __be32 lurt; /**< UPM Refresh Timer */ __be32 lsrt; /**< SDRAM Refresh Timer */ u8 res5[0x8]; __be32 ltesr; /**< Transfer Error Status Register */ #define LTESR_BM 0x80000000 #define LTESR_FCT 0x40000000 #define LTESR_PAR 0x20000000 #define LTESR_WP 0x04000000 #define LTESR_ATMW 0x00800000 #define LTESR_ATMR 0x00400000 #define LTESR_CS 0x00080000 #define LTESR_UPM 0x00000002 #define LTESR_CC 0x00000001 #define LTESR_NAND_MASK (LTESR_FCT | LTESR_PAR | LTESR_CC) #define LTESR_MASK (LTESR_BM | LTESR_FCT | LTESR_PAR | LTESR_WP \ | LTESR_ATMW | LTESR_ATMR | LTESR_CS | LTESR_UPM \ | LTESR_CC) #define LTESR_CLEAR 0xFFFFFFFF #define LTECCR_CLEAR 0xFFFFFFFF #define LTESR_STATUS LTESR_MASK #define LTEIR_ENABLE LTESR_MASK #define LTEDR_ENABLE 0x00000000 __be32 ltedr; /**< Transfer Error Disable Register */ __be32 lteir; /**< Transfer Error Interrupt Register */ __be32 lteatr; /**< Transfer Error Attributes Register */ __be32 ltear; /**< Transfer Error Address Register */ __be32 lteccr; /**< Transfer Error ECC Register */ u8 res6[0x8]; __be32 lbcr; /**< Configuration Register */ #define LBCR_LDIS 0x80000000 #define LBCR_LDIS_SHIFT 31 #define LBCR_BCTLC 0x00C00000 #define LBCR_BCTLC_SHIFT 22 #define LBCR_AHD 0x00200000 #define LBCR_LPBSE 0x00020000 #define LBCR_LPBSE_SHIFT 17 #define LBCR_EPAR 0x00010000 #define LBCR_EPAR_SHIFT 16 #define LBCR_BMT 0x0000FF00 #define LBCR_BMT_SHIFT 8 #define LBCR_BMTPS 0x0000000F #define LBCR_BMTPS_SHIFT 0 #define LBCR_INIT 0x00040000 __be32 lcrr; /**< Clock Ratio Register */ #define LCRR_DBYP 0x80000000 #define LCRR_DBYP_SHIFT 31 #define LCRR_BUFCMDC 0x30000000 #define LCRR_BUFCMDC_SHIFT 28 #define LCRR_ECL 0x03000000 #define LCRR_ECL_SHIFT 24 #define LCRR_EADC 0x00030000 #define LCRR_EADC_SHIFT 16 #define LCRR_CLKDIV 0x0000000F #define LCRR_CLKDIV_SHIFT 0 u8 res7[0x8]; __be32 fmr; /**< Flash Mode Register */ #define FMR_CWTO 0x0000F000 #define FMR_CWTO_SHIFT 12 #define FMR_BOOT 0x00000800 #define FMR_ECCM 0x00000100 #define FMR_AL 0x00000030 #define FMR_AL_SHIFT 4 #define FMR_OP 0x00000003 #define FMR_OP_SHIFT 0 __be32 fir; /**< Flash Instruction Register */ #define FIR_OP0 0xF0000000 #define FIR_OP0_SHIFT 28 #define FIR_OP1 0x0F000000 #define FIR_OP1_SHIFT 24 #define FIR_OP2 0x00F00000 #define FIR_OP2_SHIFT 20 #define FIR_OP3 0x000F0000 #define FIR_OP3_SHIFT 16 #define FIR_OP4 0x0000F000 #define FIR_OP4_SHIFT 12 #define FIR_OP5 0x00000F00 #define FIR_OP5_SHIFT 8 #define FIR_OP6 0x000000F0 #define FIR_OP6_SHIFT 4 #define FIR_OP7 0x0000000F #define FIR_OP7_SHIFT 0 #define FIR_OP_NOP 0x0 /* No operation and end of sequence */ #define FIR_OP_CA 0x1 /* Issue current column address */ #define FIR_OP_PA 0x2 /* Issue current block+page address */ #define FIR_OP_UA 0x3 /* Issue user defined address */ #define FIR_OP_CM0 0x4 /* Issue command from FCR[CMD0] */ #define FIR_OP_CM1 0x5 /* Issue command from FCR[CMD1] */ #define FIR_OP_CM2 0x6 /* Issue command from FCR[CMD2] */ #define FIR_OP_CM3 0x7 /* Issue command from FCR[CMD3] */ #define FIR_OP_WB 0x8 /* Write FBCR bytes from FCM buffer */ #define FIR_OP_WS 0x9 /* Write 1 or 2 bytes from MDR[AS] */ #define FIR_OP_RB 0xA /* Read FBCR bytes to FCM buffer */ #define FIR_OP_RS 0xB /* Read 1 or 2 bytes to MDR[AS] */ #define FIR_OP_CW0 0xC /* Wait then issue FCR[CMD0] */ #define FIR_OP_CW1 0xD /* Wait then issue FCR[CMD1] */ #define FIR_OP_RBW 0xE /* Wait then read FBCR bytes */ #define FIR_OP_RSW 0xE /* Wait then read 1 or 2 bytes */ __be32 fcr; /**< Flash Command Register */ #define FCR_CMD0 0xFF000000 #define FCR_CMD0_SHIFT 24 #define FCR_CMD1 0x00FF0000 #define FCR_CMD1_SHIFT 16 #define FCR_CMD2 0x0000FF00 #define FCR_CMD2_SHIFT 8 #define FCR_CMD3 0x000000FF #define FCR_CMD3_SHIFT 0 __be32 fbar; /**< Flash Block Address Register */ #define FBAR_BLK 0x00FFFFFF __be32 fpar; /**< Flash Page Address Register */ #define FPAR_SP_PI 0x00007C00 #define FPAR_SP_PI_SHIFT 10 #define FPAR_SP_MS 0x00000200 #define FPAR_SP_CI 0x000001FF #define FPAR_SP_CI_SHIFT 0 #define FPAR_LP_PI 0x0003F000 #define FPAR_LP_PI_SHIFT 12 #define FPAR_LP_MS 0x00000800 #define FPAR_LP_CI 0x000007FF #define FPAR_LP_CI_SHIFT 0 __be32 fbcr; /**< Flash Byte Count Register */ #define FBCR_BC 0x00000FFF }; /* * FSL UPM routines */ struct fsl_upm { __be32 __iomem *mxmr; int width; }; extern u32 fsl_lbc_addr(phys_addr_t addr_base); extern int fsl_lbc_find(phys_addr_t addr_base); extern int fsl_upm_find(phys_addr_t addr_base, struct fsl_upm *upm); /** * fsl_upm_start_pattern - start UPM patterns execution * @upm: pointer to the fsl_upm structure obtained via fsl_upm_find * @pat_offset: UPM pattern offset for the command to be executed * * This routine programmes UPM so the next memory access that hits an UPM * will trigger pattern execution, starting at pat_offset. */ static inline void fsl_upm_start_pattern(struct fsl_upm *upm, u8 pat_offset) { clrsetbits_be32(upm->mxmr, MxMR_MAD, MxMR_OP_RP | pat_offset); } /** * fsl_upm_end_pattern - end UPM patterns execution * @upm: pointer to the fsl_upm structure obtained via fsl_upm_find * * This routine reverts UPM to normal operation mode. */ static inline void fsl_upm_end_pattern(struct fsl_upm *upm) { clrbits32(upm->mxmr, MxMR_OP_RP); while (in_be32(upm->mxmr) & MxMR_OP_RP) cpu_relax(); } /* overview of the fsl lbc controller */ struct fsl_lbc_ctrl { /* device info */ struct device *dev; struct fsl_lbc_regs __iomem *regs; int irq[2]; wait_queue_head_t irq_wait; spinlock_t lock; void *nand; /* status read from LTESR by irq handler */ unsigned int irq_status; #ifdef CONFIG_SUSPEND /* save regs when system go to deep-sleep */ struct fsl_lbc_regs *saved_regs; #endif }; extern int fsl_upm_run_pattern(struct fsl_upm *upm, void __iomem *io_base, u32 mar); extern struct fsl_lbc_ctrl *fsl_lbc_ctrl_dev; #endif /* __ASM_FSL_LBC_H */
Name | Type | Size | Permission | Actions |
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book3s | Folder | 0755 |
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nohash | Folder | 0755 |
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8xx_immap.h | File | 13.77 KB | 0644 |
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Kbuild | File | 248 B | 0644 |
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accounting.h | File | 1 KB | 0644 |
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agp.h | File | 525 B | 0644 |
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archrandom.h | File | 1016 B | 0644 |
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asm-compat.h | File | 2.53 KB | 0644 |
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asm-offsets.h | File | 35 B | 0644 |
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asm-prototypes.h | File | 4.78 KB | 0644 |
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async_tx.h | File | 1.64 KB | 0644 |
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atomic.h | File | 13.57 KB | 0644 |
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backlight.h | File | 1.09 KB | 0644 |
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barrier.h | File | 3.57 KB | 0644 |
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bitops.h | File | 7.8 KB | 0644 |
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bootx.h | File | 1.12 KB | 0644 |
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btext.h | File | 926 B | 0644 |
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bug.h | File | 3.55 KB | 0644 |
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bugs.h | File | 486 B | 0644 |
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cache.h | File | 2.47 KB | 0644 |
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cacheflush.h | File | 3.76 KB | 0644 |
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cell-pmu.h | File | 4.04 KB | 0644 |
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cell-regs.h | File | 9.57 KB | 0644 |
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checksum.h | File | 5.85 KB | 0644 |
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cmpxchg.h | File | 12.16 KB | 0644 |
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code-patching-asm.h | File | 397 B | 0644 |
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code-patching.h | File | 5.01 KB | 0644 |
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compat.h | File | 6.26 KB | 0644 |
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context_tracking.h | File | 245 B | 0644 |
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copro.h | File | 769 B | 0644 |
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cpm.h | File | 5.09 KB | 0644 |
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cpm1.h | File | 21.08 KB | 0644 |
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cpm2.h | File | 48.43 KB | 0644 |
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cpu_has_feature.h | File | 1.31 KB | 0644 |
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cpufeature.h | File | 1.18 KB | 0644 |
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cpuidle.h | File | 3.31 KB | 0644 |
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cputable.h | File | 22.56 KB | 0644 |
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cputhreads.h | File | 2.92 KB | 0644 |
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cputime.h | File | 1.59 KB | 0644 |
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current.h | File | 835 B | 0644 |
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dbdma.h | File | 3.72 KB | 0644 |
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dbell.h | File | 2.78 KB | 0644 |
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dcr-generic.h | File | 1.58 KB | 0644 |
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dcr-mmio.h | File | 1.68 KB | 0644 |
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dcr-native.h | File | 4.42 KB | 0644 |
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dcr-regs.h | File | 5.71 KB | 0644 |
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dcr.h | File | 2.73 KB | 0644 |
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debug.h | File | 1.97 KB | 0644 |
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debugfs.h | File | 489 B | 0644 |
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delay.h | File | 3.42 KB | 0644 |
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device.h | File | 1.1 KB | 0644 |
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disassemble.h | File | 2.73 KB | 0644 |
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dma-mapping.h | File | 4.12 KB | 0644 |
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dma.h | File | 10.51 KB | 0644 |
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dt_cpu_ftrs.h | File | 816 B | 0644 |
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edac.h | File | 1.08 KB | 0644 |
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eeh.h | File | 14.44 KB | 0644 |
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eeh_event.h | File | 1.36 KB | 0644 |
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ehv_pic.h | File | 963 B | 0644 |
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elf.h | File | 6.29 KB | 0644 |
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emergency-restart.h | File | 43 B | 0644 |
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emulated_ops.h | File | 2.58 KB | 0644 |
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epapr_hcalls.h | File | 16.44 KB | 0644 |
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exception-64e.h | File | 7.21 KB | 0644 |
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exception-64s.h | File | 22.72 KB | 0644 |
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exec.h | File | 246 B | 0644 |
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extable.h | File | 904 B | 0644 |
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fadump.h | File | 6.1 KB | 0644 |
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fb.h | File | 483 B | 0644 |
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feature-fixups.h | File | 8.76 KB | 0644 |
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firmware.h | File | 4.71 KB | 0644 |
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fixmap.h | File | 2.33 KB | 0644 |
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floppy.h | File | 4.86 KB | 0644 |
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fs_pd.h | File | 1.02 KB | 0644 |
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fsl_85xx_cache_sram.h | File | 1.43 KB | 0644 |
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fsl_gtm.h | File | 1.38 KB | 0644 |
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fsl_hcalls.h | File | 17.2 KB | 0644 |
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fsl_lbc.h | File | 10.9 KB | 0644 |
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fsl_pamu_stash.h | File | 1.1 KB | 0644 |
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fsl_pm.h | File | 1.36 KB | 0644 |
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ftrace.h | File | 2.1 KB | 0644 |
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futex.h | File | 2.4 KB | 0644 |
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grackle.h | File | 331 B | 0644 |
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hardirq.h | File | 1.15 KB | 0644 |
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head-64.h | File | 13.86 KB | 0644 |
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heathrow.h | File | 2.53 KB | 0644 |
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highmem.h | File | 2.41 KB | 0644 |
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hmi.h | File | 1.49 KB | 0644 |
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hugetlb.h | File | 4.73 KB | 0644 |
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hvcall.h | File | 15.35 KB | 0644 |
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hvconsole.h | File | 1.37 KB | 0644 |
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hvcserver.h | File | 2.09 KB | 0644 |
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hvsi.h | File | 2.78 KB | 0644 |
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hw_breakpoint.h | File | 3.07 KB | 0644 |
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hw_irq.h | File | 5.24 KB | 0644 |
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hydra.h | File | 2.91 KB | 0644 |
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i8259.h | File | 361 B | 0644 |
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ibmebus.h | File | 2.15 KB | 0644 |
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icswx.h | File | 4.71 KB | 0644 |
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ide.h | File | 586 B | 0644 |
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ima.h | File | 772 B | 0644 |
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imc-pmu.h | File | 2.87 KB | 0644 |
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immap_cpm2.h | File | 10.5 KB | 0644 |
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io-defs.h | File | 3.09 KB | 0644 |
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io-workarounds.h | File | 1.54 KB | 0644 |
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io.h | File | 28.02 KB | 0644 |
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io_event_irq.h | File | 1.91 KB | 0644 |
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iommu.h | File | 10.16 KB | 0644 |
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ipic.h | File | 3.51 KB | 0644 |
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irq.h | File | 1.83 KB | 0644 |
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irq_work.h | File | 252 B | 0644 |
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irqflags.h | File | 1.7 KB | 0644 |
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isa-bridge.h | File | 654 B | 0644 |
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jump_label.h | File | 1.62 KB | 0644 |
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kdebug.h | File | 291 B | 0644 |
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kdump.h | File | 1.37 KB | 0644 |
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kexec.h | File | 4.02 KB | 0644 |
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keylargo.h | File | 10.8 KB | 0644 |
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kgdb.h | File | 2.06 KB | 0644 |
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kmap_types.h | File | 434 B | 0644 |
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kprobes.h | File | 3.75 KB | 0644 |
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kup.h | File | 1021 B | 0644 |
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kvm_asm.h | File | 5.46 KB | 0644 |
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kvm_book3s.h | File | 12.06 KB | 0644 |
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kvm_book3s_32.h | File | 1.39 KB | 0644 |
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kvm_book3s_64.h | File | 12.62 KB | 0644 |
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kvm_book3s_asm.h | File | 4.4 KB | 0644 |
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kvm_booke.h | File | 2.68 KB | 0644 |
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kvm_booke_hv_asm.h | File | 2.03 KB | 0644 |
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kvm_fpu.h | File | 2.74 KB | 0644 |
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kvm_host.h | File | 19.92 KB | 0644 |
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kvm_para.h | File | 1.49 KB | 0644 |
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kvm_ppc.h | File | 34.83 KB | 0644 |
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libata-portmap.h | File | 249 B | 0644 |
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linkage.h | File | 501 B | 0644 |
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livepatch.h | File | 1.65 KB | 0644 |
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local.h | File | 3.79 KB | 0644 |
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lppaca.h | File | 5.02 KB | 0644 |
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lv1call.h | File | 18.74 KB | 0644 |
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machdep.h | File | 9.7 KB | 0644 |
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macio.h | File | 3.89 KB | 0644 |
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mc146818rtc.h | File | 943 B | 0644 |
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mce.h | File | 5.58 KB | 0644 |
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mediabay.h | File | 1.34 KB | 0644 |
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mm-arch-hooks.h | File | 839 B | 0644 |
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mman.h | File | 1.33 KB | 0644 |
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mmu-40x.h | File | 1.94 KB | 0644 |
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mmu-44x.h | File | 5.56 KB | 0644 |
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mmu-8xx.h | File | 8.6 KB | 0644 |
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mmu-book3e.h | File | 9.47 KB | 0644 |
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mmu.h | File | 9.2 KB | 0644 |
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mmu_context.h | File | 6.26 KB | 0644 |
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mmzone.h | File | 1.08 KB | 0644 |
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module.h | File | 2.47 KB | 0644 |
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mpc5121.h | File | 3.82 KB | 0644 |
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mpc52xx.h | File | 10.85 KB | 0644 |
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mpc52xx_psc.h | File | 9.89 KB | 0644 |
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mpc5xxx.h | File | 641 B | 0644 |
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mpc6xx.h | File | 143 B | 0644 |
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mpc8260.h | File | 742 B | 0644 |
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mpc85xx.h | File | 2.52 KB | 0644 |
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mpic.h | File | 13.97 KB | 0644 |
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mpic_msgr.h | File | 3.52 KB | 0644 |
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mpic_timer.h | File | 1.39 KB | 0644 |
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msi_bitmap.h | File | 1.01 KB | 0644 |
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nmi.h | File | 238 B | 0644 |
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nvram.h | File | 3.21 KB | 0644 |
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ohare.h | File | 1.64 KB | 0644 |
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opal-api.h | File | 29.34 KB | 0644 |
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opal.h | File | 16.53 KB | 0644 |
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oprofile_impl.h | File | 3 KB | 0644 |
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paca.h | File | 8.06 KB | 0644 |
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page.h | File | 10.65 KB | 0644 |
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page_32.h | File | 1.57 KB | 0644 |
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page_64.h | File | 2.93 KB | 0644 |
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parport.h | File | 956 B | 0644 |
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pasemi_dma.h | File | 23.32 KB | 0644 |
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pci-bridge.h | File | 9.21 KB | 0644 |
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pci.h | File | 4.58 KB | 0644 |
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percpu.h | File | 468 B | 0644 |
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perf_event.h | File | 1.23 KB | 0644 |
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perf_event_fsl_emb.h | File | 1.42 KB | 0644 |
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perf_event_server.h | File | 6.3 KB | 0644 |
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pgalloc.h | File | 620 B | 0644 |
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pgtable-be-types.h | File | 2.76 KB | 0644 |
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pgtable-types.h | File | 1.94 KB | 0644 |
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pgtable.h | File | 2.45 KB | 0644 |
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plpar_wrappers.h | File | 8.35 KB | 0644 |
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pmac_feature.h | File | 13.08 KB | 0644 |
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pmac_low_i2c.h | File | 3.24 KB | 0644 |
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pmac_pfunc.h | File | 8.01 KB | 0644 |
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pmc.h | File | 1.35 KB | 0644 |
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pmi.h | File | 1.77 KB | 0644 |
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pnv-ocxl.h | File | 1.4 KB | 0644 |
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pnv-pci.h | File | 3.22 KB | 0644 |
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powernv.h | File | 1.57 KB | 0644 |
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ppc-opcode.h | File | 19.05 KB | 0644 |
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ppc-pci.h | File | 2.69 KB | 0644 |
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ppc4xx.h | File | 530 B | 0644 |
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ppc4xx_ocm.h | File | 1.41 KB | 0644 |
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ppc_asm.h | File | 21.63 KB | 0644 |
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probes.h | File | 2.11 KB | 0644 |
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processor.h | File | 15 KB | 0644 |
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prom.h | File | 7.17 KB | 0644 |
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ps3.h | File | 15.44 KB | 0644 |
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ps3av.h | File | 23.49 KB | 0644 |
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ps3gpu.h | File | 2.44 KB | 0644 |
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ps3stor.h | File | 1.99 KB | 0644 |
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pte-common.h | File | 6.27 KB | 0644 |
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pte-walk.h | File | 1.11 KB | 0644 |
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ptrace.h | File | 7.14 KB | 0644 |
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reg.h | File | 61.61 KB | 0644 |
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reg_8xx.h | File | 4.96 KB | 0644 |
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reg_a2.h | File | 6.16 KB | 0644 |
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reg_booke.h | File | 36.17 KB | 0644 |
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reg_fsl_emb.h | File | 3.65 KB | 0644 |
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rheap.h | File | 2.43 KB | 0644 |
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rio.h | File | 637 B | 0644 |
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rtas.h | File | 14.67 KB | 0644 |
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runlatch.h | File | 1.16 KB | 0644 |
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scom.h | File | 4.92 KB | 0644 |
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seccomp.h | File | 249 B | 0644 |
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sections.h | File | 1.9 KB | 0644 |
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security_features.h | File | 3.03 KB | 0644 |
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serial.h | File | 677 B | 0644 |
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setjmp.h | File | 630 B | 0644 |
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setup.h | File | 2.44 KB | 0644 |
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sfp-machine.h | File | 12.38 KB | 0644 |
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shmparam.h | File | 206 B | 0644 |
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signal.h | File | 225 B | 0644 |
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slice.h | File | 1.12 KB | 0644 |
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smp.h | File | 6.13 KB | 0644 |
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smu.h | File | 19.33 KB | 0644 |
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sparsemem.h | File | 1.1 KB | 0644 |
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spinlock.h | File | 7.04 KB | 0644 |
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spinlock_types.h | File | 424 B | 0644 |
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spu.h | File | 25.28 KB | 0644 |
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spu_csa.h | File | 6.64 KB | 0644 |
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spu_info.h | File | 908 B | 0644 |
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spu_priv1.h | File | 5.68 KB | 0644 |
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sstep.h | File | 4.58 KB | 0644 |
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string.h | File | 1.74 KB | 0644 |
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swab.h | File | 377 B | 0644 |
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swiotlb.h | File | 810 B | 0644 |
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switch_to.h | File | 2.66 KB | 0644 |
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synch.h | File | 1.36 KB | 0644 |
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syscall.h | File | 2.8 KB | 0644 |
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syscalls.h | File | 684 B | 0644 |
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systbl.h | File | 9.28 KB | 0644 |
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tce.h | File | 1.72 KB | 0644 |
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termios.h | File | 860 B | 0644 |
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thread_info.h | File | 5.31 KB | 0644 |
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time.h | File | 4.82 KB | 0644 |
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timex.h | File | 967 B | 0644 |
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tlb.h | File | 2.47 KB | 0644 |
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tlbflush.h | File | 2.93 KB | 0644 |
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tm.h | File | 690 B | 0644 |
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topology.h | File | 2.92 KB | 0644 |
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trace.h | File | 4.17 KB | 0644 |
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trace_clock.h | File | 517 B | 0644 |
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tsi108.h | File | 3.39 KB | 0644 |
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tsi108_irq.h | File | 4.48 KB | 0644 |
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tsi108_pci.h | File | 1.82 KB | 0644 |
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types.h | File | 1 KB | 0644 |
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uaccess.h | File | 13.21 KB | 0644 |
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udbg.h | File | 2.16 KB | 0644 |
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uic.h | File | 616 B | 0644 |
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unaligned.h | File | 548 B | 0644 |
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uninorth.h | File | 8.21 KB | 0644 |
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unistd.h | File | 1.52 KB | 0644 |
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uprobes.h | File | 1.41 KB | 0644 |
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user.h | File | 2.14 KB | 0644 |
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vas.h | File | 4.61 KB | 0644 |
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vdso.h | File | 1.53 KB | 0644 |
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vdso_datapage.h | File | 4.4 KB | 0644 |
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vga.h | File | 1.24 KB | 0644 |
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vio.h | File | 4.79 KB | 0644 |
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word-at-a-time.h | File | 4.75 KB | 0644 |
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xics.h | File | 4.31 KB | 0644 |
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xilinx_intc.h | File | 598 B | 0644 |
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xilinx_pci.h | File | 551 B | 0644 |
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xive-regs.h | File | 3.73 KB | 0644 |
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xive.h | File | 5.35 KB | 0644 |
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xmon.h | File | 927 B | 0644 |
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xor.h | File | 2.11 KB | 0644 |
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