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/* SPDX-License-Identifier: GPL-2.0 */
/*
 * uninorth.h: definitions for using the "UniNorth" host bridge chip
 *             from Apple. This chip is used on "Core99" machines
 *	       This also includes U2 used on more recent MacRISC2/3
 *             machines and U3 (G5) 
 *
 */
#ifdef __KERNEL__
#ifndef __ASM_UNINORTH_H__
#define __ASM_UNINORTH_H__

/*
 * Uni-N and U3 config space reg. definitions
 *
 * (Little endian)
 */

/* Address ranges selection. This one should work with Bandit too */
/* Not U3 */
#define UNI_N_ADDR_SELECT		0x48
#define UNI_N_ADDR_COARSE_MASK		0xffff0000	/* 256Mb regions at *0000000 */
#define UNI_N_ADDR_FINE_MASK		0x0000ffff	/*  16Mb regions at f*000000 */

/* AGP registers */
/* Not U3 */
#define UNI_N_CFG_GART_BASE		0x8c
#define UNI_N_CFG_AGP_BASE		0x90
#define UNI_N_CFG_GART_CTRL		0x94
#define UNI_N_CFG_INTERNAL_STATUS	0x98
#define UNI_N_CFG_GART_DUMMY_PAGE	0xa4

/* UNI_N_CFG_GART_CTRL bits definitions */
#define UNI_N_CFG_GART_INVAL		0x00000001
#define UNI_N_CFG_GART_ENABLE		0x00000100
#define UNI_N_CFG_GART_2xRESET		0x00010000
#define UNI_N_CFG_GART_DISSBADET	0x00020000
/* The following seems to only be used only on U3 <j.glisse@gmail.com> */
#define U3_N_CFG_GART_SYNCMODE		0x00040000
#define U3_N_CFG_GART_PERFRD		0x00080000
#define U3_N_CFG_GART_B2BGNT		0x00200000
#define U3_N_CFG_GART_FASTDDR		0x00400000

/* My understanding of UniNorth AGP as of UniNorth rev 1.0x,
 * revision 1.5 (x4 AGP) may need further changes.
 *
 * AGP_BASE register contains the base address of the AGP aperture on
 * the AGP bus. It doesn't seem to be visible to the CPU as of UniNorth 1.x,
 * even if decoding of this address range is enabled in the address select
 * register. Apparently, the only supported bases are 256Mb multiples
 * (high 4 bits of that register).
 *
 * GART_BASE register appear to contain the physical address of the GART
 * in system memory in the high address bits (page aligned), and the
 * GART size in the low order bits (number of GART pages)
 *
 * The GART format itself is one 32bits word per physical memory page.
 * This word contains, in little-endian format (!!!), the physical address
 * of the page in the high bits, and what appears to be an "enable" bit
 * in the LSB bit (0) that must be set to 1 when the entry is valid.
 *
 * Obviously, the GART is not cache coherent and so any change to it
 * must be flushed to memory (or maybe just make the GART space non
 * cachable). AGP memory itself doesn't seem to be cache coherent neither.
 *
 * In order to invalidate the GART (which is probably necessary to inval
 * the bridge internal TLBs), the following sequence has to be written,
 * in order, to the GART_CTRL register:
 *
 *   UNI_N_CFG_GART_ENABLE | UNI_N_CFG_GART_INVAL
 *   UNI_N_CFG_GART_ENABLE
 *   UNI_N_CFG_GART_ENABLE | UNI_N_CFG_GART_2xRESET
 *   UNI_N_CFG_GART_ENABLE
 *
 * As far as AGP "features" are concerned, it looks like fast write may
 * not be supported but this has to be confirmed.
 *
 * Turning on AGP seem to require a double invalidate operation, one before
 * setting the AGP command register, on after.
 *
 * Turning off AGP seems to require the following sequence: first wait
 * for the AGP to be idle by reading the internal status register, then
 * write in that order to the GART_CTRL register:
 *
 *   UNI_N_CFG_GART_ENABLE | UNI_N_CFG_GART_INVAL
 *   0
 *   UNI_N_CFG_GART_2xRESET
 *   0
 */

/*
 * Uni-N memory mapped reg. definitions
 *
 * Those registers are Big-Endian !!
 *
 * Their meaning come from either Darwin and/or from experiments I made with
 * the bootrom, I'm not sure about their exact meaning yet
 *
 */

/* Version of the UniNorth chip */
#define UNI_N_VERSION			0x0000		/* Known versions: 3,7 and 8 */

#define UNI_N_VERSION_107		0x0003		/* 1.0.7 */
#define UNI_N_VERSION_10A		0x0007		/* 1.0.10 */
#define UNI_N_VERSION_150		0x0011		/* 1.5 */
#define UNI_N_VERSION_200		0x0024		/* 2.0 */
#define UNI_N_VERSION_PANGEA		0x00C0		/* Integrated U1 + K */
#define UNI_N_VERSION_INTREPID		0x00D2		/* Integrated U2 + K */
#define UNI_N_VERSION_300		0x0030		/* 3.0 (U3 on G5) */

/* This register is used to enable/disable various clocks */
#define UNI_N_CLOCK_CNTL		0x0020
#define UNI_N_CLOCK_CNTL_PCI		0x00000001	/* PCI2 clock control */
#define UNI_N_CLOCK_CNTL_GMAC		0x00000002	/* GMAC clock control */
#define UNI_N_CLOCK_CNTL_FW		0x00000004	/* FireWire clock control */
#define UNI_N_CLOCK_CNTL_ATA100		0x00000010	/* ATA-100 clock control (U2) */

/* Power Management control */
#define UNI_N_POWER_MGT			0x0030
#define UNI_N_POWER_MGT_NORMAL		0x00
#define UNI_N_POWER_MGT_IDLE2		0x01
#define UNI_N_POWER_MGT_SLEEP		0x02

/* This register is configured by Darwin depending on the UniN
 * revision
 */
#define UNI_N_ARB_CTRL			0x0040
#define UNI_N_ARB_CTRL_QACK_DELAY_SHIFT	15
#define UNI_N_ARB_CTRL_QACK_DELAY_MASK	0x0e1f8000
#define UNI_N_ARB_CTRL_QACK_DELAY	0x30
#define UNI_N_ARB_CTRL_QACK_DELAY105	0x00

/* This one _might_ return the CPU number of the CPU reading it;
 * the bootROM decides whether to boot or to sleep/spinloop depending
 * on this register being 0 or not
 */
#define UNI_N_CPU_NUMBER		0x0050

/* This register appear to be read by the bootROM to decide what
 *  to do on a non-recoverable reset (powerup or wakeup)
 */
#define UNI_N_HWINIT_STATE		0x0070
#define UNI_N_HWINIT_STATE_SLEEPING	0x01
#define UNI_N_HWINIT_STATE_RUNNING	0x02
/* This last bit appear to be used by the bootROM to know the second
 * CPU has started and will enter it's sleep loop with IP=0
 */
#define UNI_N_HWINIT_STATE_CPU1_FLAG	0x10000000

/* This register controls AACK delay, which is set when 2004 iBook/PowerBook
 * is in low speed mode.
 */
#define UNI_N_AACK_DELAY		0x0100
#define UNI_N_AACK_DELAY_ENABLE		0x00000001

/* Clock status for Intrepid */
#define UNI_N_CLOCK_STOP_STATUS0	0x0150
#define UNI_N_CLOCK_STOPPED_EXTAGP	0x00200000
#define UNI_N_CLOCK_STOPPED_AGPDEL	0x00100000
#define UNI_N_CLOCK_STOPPED_I2S0_45_49	0x00080000
#define UNI_N_CLOCK_STOPPED_I2S0_18	0x00040000
#define UNI_N_CLOCK_STOPPED_I2S1_45_49	0x00020000
#define UNI_N_CLOCK_STOPPED_I2S1_18	0x00010000
#define UNI_N_CLOCK_STOPPED_TIMER	0x00008000
#define UNI_N_CLOCK_STOPPED_SCC_RTCLK18	0x00004000
#define UNI_N_CLOCK_STOPPED_SCC_RTCLK32	0x00002000
#define UNI_N_CLOCK_STOPPED_SCC_VIA32	0x00001000
#define UNI_N_CLOCK_STOPPED_SCC_SLOT0	0x00000800
#define UNI_N_CLOCK_STOPPED_SCC_SLOT1	0x00000400
#define UNI_N_CLOCK_STOPPED_SCC_SLOT2	0x00000200
#define UNI_N_CLOCK_STOPPED_PCI_FBCLKO	0x00000100
#define UNI_N_CLOCK_STOPPED_VEO0	0x00000080
#define UNI_N_CLOCK_STOPPED_VEO1	0x00000040
#define UNI_N_CLOCK_STOPPED_USB0	0x00000020
#define UNI_N_CLOCK_STOPPED_USB1	0x00000010
#define UNI_N_CLOCK_STOPPED_USB2	0x00000008
#define UNI_N_CLOCK_STOPPED_32		0x00000004
#define UNI_N_CLOCK_STOPPED_45		0x00000002
#define UNI_N_CLOCK_STOPPED_49		0x00000001

#define UNI_N_CLOCK_STOP_STATUS1	0x0160
#define UNI_N_CLOCK_STOPPED_PLL4REF	0x00080000
#define UNI_N_CLOCK_STOPPED_CPUDEL	0x00040000
#define UNI_N_CLOCK_STOPPED_CPU		0x00020000
#define UNI_N_CLOCK_STOPPED_BUF_REFCKO	0x00010000
#define UNI_N_CLOCK_STOPPED_PCI2	0x00008000
#define UNI_N_CLOCK_STOPPED_FW		0x00004000
#define UNI_N_CLOCK_STOPPED_GB		0x00002000
#define UNI_N_CLOCK_STOPPED_ATA66	0x00001000
#define UNI_N_CLOCK_STOPPED_ATA100	0x00000800
#define UNI_N_CLOCK_STOPPED_MAX		0x00000400
#define UNI_N_CLOCK_STOPPED_PCI1	0x00000200
#define UNI_N_CLOCK_STOPPED_KLPCI	0x00000100
#define UNI_N_CLOCK_STOPPED_USB0PCI	0x00000080
#define UNI_N_CLOCK_STOPPED_USB1PCI	0x00000040
#define UNI_N_CLOCK_STOPPED_USB2PCI	0x00000020
#define UNI_N_CLOCK_STOPPED_7PCI1	0x00000008
#define UNI_N_CLOCK_STOPPED_AGP		0x00000004
#define UNI_N_CLOCK_STOPPED_PCI0	0x00000002
#define UNI_N_CLOCK_STOPPED_18		0x00000001

/* Intrepid registe to OF do-platform-clockspreading */
#define UNI_N_CLOCK_SPREADING		0x190

/* Uninorth 1.5 rev. has additional perf. monitor registers at 0xf00-0xf50 */


/*
 * U3 specific registers
 */


/* U3 Toggle */
#define U3_TOGGLE_REG			0x00e0
#define U3_PMC_START_STOP		0x0001
#define U3_MPIC_RESET			0x0002
#define U3_MPIC_OUTPUT_ENABLE		0x0004

/* U3 API PHY Config 1 */
#define U3_API_PHY_CONFIG_1		0x23030

/* U3 HyperTransport registers */
#define U3_HT_CONFIG_BASE      		0x70000
#define U3_HT_LINK_COMMAND		0x100
#define U3_HT_LINK_CONFIG		0x110
#define U3_HT_LINK_FREQ			0x120

#endif /* __ASM_UNINORTH_H__ */
#endif /* __KERNEL__ */

Filemanager

Name Type Size Permission Actions
book3s Folder 0755
nohash Folder 0755
8xx_immap.h File 13.77 KB 0644
Kbuild File 248 B 0644
accounting.h File 1 KB 0644
agp.h File 525 B 0644
archrandom.h File 1016 B 0644
asm-compat.h File 2.53 KB 0644
asm-offsets.h File 35 B 0644
asm-prototypes.h File 4.78 KB 0644
async_tx.h File 1.64 KB 0644
atomic.h File 13.57 KB 0644
backlight.h File 1.09 KB 0644
barrier.h File 3.57 KB 0644
bitops.h File 7.8 KB 0644
bootx.h File 1.12 KB 0644
btext.h File 926 B 0644
bug.h File 3.55 KB 0644
bugs.h File 486 B 0644
cache.h File 2.47 KB 0644
cacheflush.h File 3.76 KB 0644
cell-pmu.h File 4.04 KB 0644
cell-regs.h File 9.57 KB 0644
checksum.h File 5.85 KB 0644
cmpxchg.h File 12.16 KB 0644
code-patching-asm.h File 397 B 0644
code-patching.h File 5.01 KB 0644
compat.h File 6.26 KB 0644
context_tracking.h File 245 B 0644
copro.h File 769 B 0644
cpm.h File 5.09 KB 0644
cpm1.h File 21.08 KB 0644
cpm2.h File 48.43 KB 0644
cpu_has_feature.h File 1.31 KB 0644
cpufeature.h File 1.18 KB 0644
cpuidle.h File 3.31 KB 0644
cputable.h File 22.56 KB 0644
cputhreads.h File 2.92 KB 0644
cputime.h File 1.59 KB 0644
current.h File 835 B 0644
dbdma.h File 3.72 KB 0644
dbell.h File 2.78 KB 0644
dcr-generic.h File 1.58 KB 0644
dcr-mmio.h File 1.68 KB 0644
dcr-native.h File 4.42 KB 0644
dcr-regs.h File 5.71 KB 0644
dcr.h File 2.73 KB 0644
debug.h File 1.97 KB 0644
debugfs.h File 489 B 0644
delay.h File 3.42 KB 0644
device.h File 1.1 KB 0644
disassemble.h File 2.73 KB 0644
dma-mapping.h File 4.12 KB 0644
dma.h File 10.51 KB 0644
dt_cpu_ftrs.h File 816 B 0644
edac.h File 1.08 KB 0644
eeh.h File 14.44 KB 0644
eeh_event.h File 1.36 KB 0644
ehv_pic.h File 963 B 0644
elf.h File 6.29 KB 0644
emergency-restart.h File 43 B 0644
emulated_ops.h File 2.58 KB 0644
epapr_hcalls.h File 16.44 KB 0644
exception-64e.h File 7.21 KB 0644
exception-64s.h File 22.72 KB 0644
exec.h File 246 B 0644
extable.h File 904 B 0644
fadump.h File 6.1 KB 0644
fb.h File 483 B 0644
feature-fixups.h File 8.76 KB 0644
firmware.h File 4.71 KB 0644
fixmap.h File 2.33 KB 0644
floppy.h File 4.86 KB 0644
fs_pd.h File 1.02 KB 0644
fsl_85xx_cache_sram.h File 1.43 KB 0644
fsl_gtm.h File 1.38 KB 0644
fsl_hcalls.h File 17.2 KB 0644
fsl_lbc.h File 10.9 KB 0644
fsl_pamu_stash.h File 1.1 KB 0644
fsl_pm.h File 1.36 KB 0644
ftrace.h File 2.1 KB 0644
futex.h File 2.4 KB 0644
grackle.h File 331 B 0644
hardirq.h File 1.15 KB 0644
head-64.h File 13.86 KB 0644
heathrow.h File 2.53 KB 0644
highmem.h File 2.41 KB 0644
hmi.h File 1.49 KB 0644
hugetlb.h File 4.73 KB 0644
hvcall.h File 15.35 KB 0644
hvconsole.h File 1.37 KB 0644
hvcserver.h File 2.09 KB 0644
hvsi.h File 2.78 KB 0644
hw_breakpoint.h File 3.07 KB 0644
hw_irq.h File 5.24 KB 0644
hydra.h File 2.91 KB 0644
i8259.h File 361 B 0644
ibmebus.h File 2.15 KB 0644
icswx.h File 4.71 KB 0644
ide.h File 586 B 0644
ima.h File 772 B 0644
imc-pmu.h File 2.87 KB 0644
immap_cpm2.h File 10.5 KB 0644
io-defs.h File 3.09 KB 0644
io-workarounds.h File 1.54 KB 0644
io.h File 28.02 KB 0644
io_event_irq.h File 1.91 KB 0644
iommu.h File 10.16 KB 0644
ipic.h File 3.51 KB 0644
irq.h File 1.83 KB 0644
irq_work.h File 252 B 0644
irqflags.h File 1.7 KB 0644
isa-bridge.h File 654 B 0644
jump_label.h File 1.62 KB 0644
kdebug.h File 291 B 0644
kdump.h File 1.37 KB 0644
kexec.h File 4.02 KB 0644
keylargo.h File 10.8 KB 0644
kgdb.h File 2.06 KB 0644
kmap_types.h File 434 B 0644
kprobes.h File 3.75 KB 0644
kup.h File 1021 B 0644
kvm_asm.h File 5.46 KB 0644
kvm_book3s.h File 12.06 KB 0644
kvm_book3s_32.h File 1.39 KB 0644
kvm_book3s_64.h File 12.62 KB 0644
kvm_book3s_asm.h File 4.4 KB 0644
kvm_booke.h File 2.68 KB 0644
kvm_booke_hv_asm.h File 2.03 KB 0644
kvm_fpu.h File 2.74 KB 0644
kvm_host.h File 19.92 KB 0644
kvm_para.h File 1.49 KB 0644
kvm_ppc.h File 34.83 KB 0644
libata-portmap.h File 249 B 0644
linkage.h File 501 B 0644
livepatch.h File 1.65 KB 0644
local.h File 3.79 KB 0644
lppaca.h File 5.02 KB 0644
lv1call.h File 18.74 KB 0644
machdep.h File 9.7 KB 0644
macio.h File 3.89 KB 0644
mc146818rtc.h File 943 B 0644
mce.h File 5.58 KB 0644
mediabay.h File 1.34 KB 0644
mm-arch-hooks.h File 839 B 0644
mman.h File 1.33 KB 0644
mmu-40x.h File 1.94 KB 0644
mmu-44x.h File 5.56 KB 0644
mmu-8xx.h File 8.6 KB 0644
mmu-book3e.h File 9.47 KB 0644
mmu.h File 9.2 KB 0644
mmu_context.h File 6.26 KB 0644
mmzone.h File 1.08 KB 0644
module.h File 2.47 KB 0644
mpc5121.h File 3.82 KB 0644
mpc52xx.h File 10.85 KB 0644
mpc52xx_psc.h File 9.89 KB 0644
mpc5xxx.h File 641 B 0644
mpc6xx.h File 143 B 0644
mpc8260.h File 742 B 0644
mpc85xx.h File 2.52 KB 0644
mpic.h File 13.97 KB 0644
mpic_msgr.h File 3.52 KB 0644
mpic_timer.h File 1.39 KB 0644
msi_bitmap.h File 1.01 KB 0644
nmi.h File 238 B 0644
nvram.h File 3.21 KB 0644
ohare.h File 1.64 KB 0644
opal-api.h File 29.34 KB 0644
opal.h File 16.53 KB 0644
oprofile_impl.h File 3 KB 0644
paca.h File 8.06 KB 0644
page.h File 10.65 KB 0644
page_32.h File 1.57 KB 0644
page_64.h File 2.93 KB 0644
parport.h File 956 B 0644
pasemi_dma.h File 23.32 KB 0644
pci-bridge.h File 9.21 KB 0644
pci.h File 4.58 KB 0644
percpu.h File 468 B 0644
perf_event.h File 1.23 KB 0644
perf_event_fsl_emb.h File 1.42 KB 0644
perf_event_server.h File 6.3 KB 0644
pgalloc.h File 620 B 0644
pgtable-be-types.h File 2.76 KB 0644
pgtable-types.h File 1.94 KB 0644
pgtable.h File 2.45 KB 0644
plpar_wrappers.h File 8.35 KB 0644
pmac_feature.h File 13.08 KB 0644
pmac_low_i2c.h File 3.24 KB 0644
pmac_pfunc.h File 8.01 KB 0644
pmc.h File 1.35 KB 0644
pmi.h File 1.77 KB 0644
pnv-ocxl.h File 1.4 KB 0644
pnv-pci.h File 3.22 KB 0644
powernv.h File 1.57 KB 0644
ppc-opcode.h File 19.05 KB 0644
ppc-pci.h File 2.69 KB 0644
ppc4xx.h File 530 B 0644
ppc4xx_ocm.h File 1.41 KB 0644
ppc_asm.h File 21.63 KB 0644
probes.h File 2.11 KB 0644
processor.h File 15 KB 0644
prom.h File 7.17 KB 0644
ps3.h File 15.44 KB 0644
ps3av.h File 23.49 KB 0644
ps3gpu.h File 2.44 KB 0644
ps3stor.h File 1.99 KB 0644
pte-common.h File 6.27 KB 0644
pte-walk.h File 1.11 KB 0644
ptrace.h File 7.14 KB 0644
reg.h File 61.61 KB 0644
reg_8xx.h File 4.96 KB 0644
reg_a2.h File 6.16 KB 0644
reg_booke.h File 36.17 KB 0644
reg_fsl_emb.h File 3.65 KB 0644
rheap.h File 2.43 KB 0644
rio.h File 637 B 0644
rtas.h File 14.67 KB 0644
runlatch.h File 1.16 KB 0644
scom.h File 4.92 KB 0644
seccomp.h File 249 B 0644
sections.h File 1.9 KB 0644
security_features.h File 3.03 KB 0644
serial.h File 677 B 0644
setjmp.h File 630 B 0644
setup.h File 2.44 KB 0644
sfp-machine.h File 12.38 KB 0644
shmparam.h File 206 B 0644
signal.h File 225 B 0644
slice.h File 1.12 KB 0644
smp.h File 6.13 KB 0644
smu.h File 19.33 KB 0644
sparsemem.h File 1.1 KB 0644
spinlock.h File 7.04 KB 0644
spinlock_types.h File 424 B 0644
spu.h File 25.28 KB 0644
spu_csa.h File 6.64 KB 0644
spu_info.h File 908 B 0644
spu_priv1.h File 5.68 KB 0644
sstep.h File 4.58 KB 0644
string.h File 1.74 KB 0644
swab.h File 377 B 0644
swiotlb.h File 810 B 0644
switch_to.h File 2.66 KB 0644
synch.h File 1.36 KB 0644
syscall.h File 2.8 KB 0644
syscalls.h File 684 B 0644
systbl.h File 9.28 KB 0644
tce.h File 1.72 KB 0644
termios.h File 860 B 0644
thread_info.h File 5.31 KB 0644
time.h File 4.82 KB 0644
timex.h File 967 B 0644
tlb.h File 2.47 KB 0644
tlbflush.h File 2.93 KB 0644
tm.h File 690 B 0644
topology.h File 2.92 KB 0644
trace.h File 4.17 KB 0644
trace_clock.h File 517 B 0644
tsi108.h File 3.39 KB 0644
tsi108_irq.h File 4.48 KB 0644
tsi108_pci.h File 1.82 KB 0644
types.h File 1 KB 0644
uaccess.h File 13.21 KB 0644
udbg.h File 2.16 KB 0644
uic.h File 616 B 0644
unaligned.h File 548 B 0644
uninorth.h File 8.21 KB 0644
unistd.h File 1.52 KB 0644
uprobes.h File 1.41 KB 0644
user.h File 2.14 KB 0644
vas.h File 4.61 KB 0644
vdso.h File 1.53 KB 0644
vdso_datapage.h File 4.4 KB 0644
vga.h File 1.24 KB 0644
vio.h File 4.79 KB 0644
word-at-a-time.h File 4.75 KB 0644
xics.h File 4.31 KB 0644
xilinx_intc.h File 598 B 0644
xilinx_pci.h File 551 B 0644
xive-regs.h File 3.73 KB 0644
xive.h File 5.35 KB 0644
xmon.h File 927 B 0644
xor.h File 2.11 KB 0644