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/*
 * Copyright (C) 2012 Regents of the University of California
 * Copyright (C) 2017 SiFive
 *
 *   This program is free software; you can redistribute it and/or
 *   modify it under the terms of the GNU General Public License
 *   as published by the Free Software Foundation, version 2.
 *
 *   This program is distributed in the hope that it will be useful,
 *   but WITHOUT ANY WARRANTY; without even the implied warranty of
 *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *   GNU General Public License for more details.
 */

#ifndef _ASM_RISCV_MMU_CONTEXT_H
#define _ASM_RISCV_MMU_CONTEXT_H

#include <linux/mm_types.h>
#include <asm-generic/mm_hooks.h>

#include <linux/mm.h>
#include <linux/sched.h>
#include <asm/tlbflush.h>
#include <asm/cacheflush.h>

static inline void enter_lazy_tlb(struct mm_struct *mm,
	struct task_struct *task)
{
}

/* Initialize context-related info for a new mm_struct */
static inline int init_new_context(struct task_struct *task,
	struct mm_struct *mm)
{
	return 0;
}

static inline void destroy_context(struct mm_struct *mm)
{
}

static inline pgd_t *current_pgdir(void)
{
	return pfn_to_virt(csr_read(sptbr) & SPTBR_PPN);
}

static inline void set_pgdir(pgd_t *pgd)
{
	csr_write(sptbr, virt_to_pfn(pgd) | SPTBR_MODE);
}

/*
 * When necessary, performs a deferred icache flush for the given MM context,
 * on the local CPU.  RISC-V has no direct mechanism for instruction cache
 * shoot downs, so instead we send an IPI that informs the remote harts they
 * need to flush their local instruction caches.  To avoid pathologically slow
 * behavior in a common case (a bunch of single-hart processes on a many-hart
 * machine, ie 'make -j') we avoid the IPIs for harts that are not currently
 * executing a MM context and instead schedule a deferred local instruction
 * cache flush to be performed before execution resumes on each hart.  This
 * actually performs that local instruction cache flush, which implicitly only
 * refers to the current hart.
 */
static inline void flush_icache_deferred(struct mm_struct *mm)
{
#ifdef CONFIG_SMP
	unsigned int cpu = smp_processor_id();
	cpumask_t *mask = &mm->context.icache_stale_mask;

	if (cpumask_test_cpu(cpu, mask)) {
		cpumask_clear_cpu(cpu, mask);
		/*
		 * Ensure the remote hart's writes are visible to this hart.
		 * This pairs with a barrier in flush_icache_mm.
		 */
		smp_mb();
		local_flush_icache_all();
	}
#endif
}

static inline void switch_mm(struct mm_struct *prev,
	struct mm_struct *next, struct task_struct *task)
{
	if (likely(prev != next)) {
		/*
		 * Mark the current MM context as inactive, and the next as
		 * active.  This is at least used by the icache flushing
		 * routines in order to determine who should
		 */
		unsigned int cpu = smp_processor_id();

		cpumask_clear_cpu(cpu, mm_cpumask(prev));
		cpumask_set_cpu(cpu, mm_cpumask(next));

		set_pgdir(next->pgd);
		local_flush_tlb_all();

		flush_icache_deferred(next);
	}
}

static inline void activate_mm(struct mm_struct *prev,
			       struct mm_struct *next)
{
	switch_mm(prev, next, NULL);
}

static inline void deactivate_mm(struct task_struct *task,
	struct mm_struct *mm)
{
}

#endif /* _ASM_RISCV_MMU_CONTEXT_H */

Filemanager

Name Type Size Permission Actions
Kbuild File 1.37 KB 0644
asm-offsets.h File 35 B 0644
asm-prototypes.h File 176 B 0644
asm.h File 1.78 KB 0644
atomic.h File 11.31 KB 0644
barrier.h File 2.59 KB 0644
bitops.h File 6.23 KB 0644
bug.h File 2.12 KB 0644
cache.h File 745 B 0644
cacheflush.h File 1.7 KB 0644
cmpxchg.h File 3.35 KB 0644
compat.h File 924 B 0644
csr.h File 3.8 KB 0644
current.h File 1.27 KB 0644
delay.h File 881 B 0644
dma-mapping.h File 1.19 KB 0644
elf.h File 2.3 KB 0644
fence.h File 279 B 0644
hwcap.h File 1013 B 0644
io.h File 11.81 KB 0644
irq.h File 841 B 0644
irqflags.h File 1.54 KB 0644
kprobes.h File 679 B 0644
linkage.h File 677 B 0644
mmu.h File 829 B 0644
mmu_context.h File 3.14 KB 0644
page.h File 3.76 KB 0644
pci.h File 1.16 KB 0644
pgalloc.h File 3.06 KB 0644
pgtable-32.h File 870 B 0644
pgtable-64.h File 2.08 KB 0644
pgtable-bits.h File 1.81 KB 0644
pgtable.h File 11.17 KB 0644
processor.h File 2.44 KB 0644
ptrace.h File 2.69 KB 0644
sbi.h File 2.6 KB 0644
smp.h File 1.59 KB 0644
spinlock.h File 2.85 KB 0644
spinlock_types.h File 906 B 0644
string.h File 838 B 0644
switch_to.h File 1.86 KB 0644
syscall.h File 2.59 KB 0644
thread_info.h File 3.11 KB 0644
timex.h File 1.29 KB 0644
tlb.h File 717 B 0644
tlbflush.h File 1.83 KB 0644
uaccess.h File 14 KB 0644
unistd.h File 638 B 0644
vdso.h File 1.49 KB 0644
word-at-a-time.h File 1.48 KB 0644