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/* SPDX-License-Identifier: GPL-2.0 */
/*
 * Copyright (C) 1999 Niibe Yutaka
 * Copyright (C) 2003 - 2007 Paul Mundt
 *
 * ASID handling idea taken from MIPS implementation.
 */
#ifndef __ASM_SH_MMU_CONTEXT_H
#define __ASM_SH_MMU_CONTEXT_H

#ifdef __KERNEL__
#include <cpu/mmu_context.h>
#include <asm/tlbflush.h>
#include <linux/uaccess.h>
#include <linux/mm_types.h>

#include <asm/io.h>
#include <asm-generic/mm_hooks.h>

/*
 * The MMU "context" consists of two things:
 *    (a) TLB cache version (or round, cycle whatever expression you like)
 *    (b) ASID (Address Space IDentifier)
 */
#ifdef CONFIG_CPU_HAS_PTEAEX
#define MMU_CONTEXT_ASID_MASK		0x0000ffff
#else
#define MMU_CONTEXT_ASID_MASK		0x000000ff
#endif

#define MMU_CONTEXT_VERSION_MASK	(~0UL & ~MMU_CONTEXT_ASID_MASK)
#define MMU_CONTEXT_FIRST_VERSION	(MMU_CONTEXT_ASID_MASK + 1)

/* Impossible ASID value, to differentiate from NO_CONTEXT. */
#define MMU_NO_ASID			MMU_CONTEXT_FIRST_VERSION
#define NO_CONTEXT			0UL

#define asid_cache(cpu)		(cpu_data[cpu].asid_cache)

#ifdef CONFIG_MMU
#define cpu_context(cpu, mm)	((mm)->context.id[cpu])

#define cpu_asid(cpu, mm)	\
	(cpu_context((cpu), (mm)) & MMU_CONTEXT_ASID_MASK)

/*
 * Virtual Page Number mask
 */
#define MMU_VPN_MASK	0xfffff000

#if defined(CONFIG_SUPERH32)
#include <asm/mmu_context_32.h>
#else
#include <asm/mmu_context_64.h>
#endif

/*
 * Get MMU context if needed.
 */
static inline void get_mmu_context(struct mm_struct *mm, unsigned int cpu)
{
	unsigned long asid = asid_cache(cpu);

	/* Check if we have old version of context. */
	if (((cpu_context(cpu, mm) ^ asid) & MMU_CONTEXT_VERSION_MASK) == 0)
		/* It's up to date, do nothing */
		return;

	/* It's old, we need to get new context with new version. */
	if (!(++asid & MMU_CONTEXT_ASID_MASK)) {
		/*
		 * We exhaust ASID of this version.
		 * Flush all TLB and start new cycle.
		 */
		local_flush_tlb_all();

#ifdef CONFIG_SUPERH64
		/*
		 * The SH-5 cache uses the ASIDs, requiring both the I and D
		 * cache to be flushed when the ASID is exhausted. Weak.
		 */
		flush_cache_all();
#endif

		/*
		 * Fix version; Note that we avoid version #0
		 * to distinguish NO_CONTEXT.
		 */
		if (!asid)
			asid = MMU_CONTEXT_FIRST_VERSION;
	}

	cpu_context(cpu, mm) = asid_cache(cpu) = asid;
}

/*
 * Initialize the context related info for a new mm_struct
 * instance.
 */
static inline int init_new_context(struct task_struct *tsk,
				   struct mm_struct *mm)
{
	int i;

	for_each_online_cpu(i)
		cpu_context(i, mm) = NO_CONTEXT;

	return 0;
}

/*
 * After we have set current->mm to a new value, this activates
 * the context for the new mm so we see the new mappings.
 */
static inline void activate_context(struct mm_struct *mm, unsigned int cpu)
{
	get_mmu_context(mm, cpu);
	set_asid(cpu_asid(cpu, mm));
}

static inline void switch_mm(struct mm_struct *prev,
			     struct mm_struct *next,
			     struct task_struct *tsk)
{
	unsigned int cpu = smp_processor_id();

	if (likely(prev != next)) {
		cpumask_set_cpu(cpu, mm_cpumask(next));
		set_TTB(next->pgd);
		activate_context(next, cpu);
	} else
		if (!cpumask_test_and_set_cpu(cpu, mm_cpumask(next)))
			activate_context(next, cpu);
}

#define activate_mm(prev, next)		switch_mm((prev),(next),NULL)
#define deactivate_mm(tsk,mm)		do { } while (0)
#define enter_lazy_tlb(mm,tsk)		do { } while (0)

#else

#define set_asid(asid)			do { } while (0)
#define get_asid()			(0)
#define cpu_asid(cpu, mm)		({ (void)cpu; NO_CONTEXT; })
#define switch_and_save_asid(asid)	(0)
#define set_TTB(pgd)			do { } while (0)
#define get_TTB()			(0)

#include <asm-generic/mmu_context.h>

#endif /* CONFIG_MMU */

#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4)
/*
 * If this processor has an MMU, we need methods to turn it off/on ..
 * paging_init() will also have to be updated for the processor in
 * question.
 */
static inline void enable_mmu(void)
{
	unsigned int cpu = smp_processor_id();

	/* Enable MMU */
	__raw_writel(MMU_CONTROL_INIT, MMUCR);
	ctrl_barrier();

	if (asid_cache(cpu) == NO_CONTEXT)
		asid_cache(cpu) = MMU_CONTEXT_FIRST_VERSION;

	set_asid(asid_cache(cpu) & MMU_CONTEXT_ASID_MASK);
}

static inline void disable_mmu(void)
{
	unsigned long cr;

	cr = __raw_readl(MMUCR);
	cr &= ~MMU_CONTROL_INIT;
	__raw_writel(cr, MMUCR);

	ctrl_barrier();
}
#else
/*
 * MMU control handlers for processors lacking memory
 * management hardware.
 */
#define enable_mmu()	do { } while (0)
#define disable_mmu()	do { } while (0)
#endif

#endif /* __KERNEL__ */
#endif /* __ASM_SH_MMU_CONTEXT_H */

Filemanager

Name Type Size Permission Actions
Kbuild File 467 B 0644
adc.h File 253 B 0644
addrspace.h File 2.03 KB 0644
alignment.h File 654 B 0644
asm-offsets.h File 35 B 0644
atomic-grb.h File 2.6 KB 0644
atomic-irq.h File 1.63 KB 0644
atomic-llsc.h File 2.12 KB 0644
atomic.h File 1.78 KB 0644
barrier.h File 1.52 KB 0644
bitops-cas.h File 1.73 KB 0644
bitops-grb.h File 6.21 KB 0644
bitops-llsc.h File 2.79 KB 0644
bitops-op32.h File 3.78 KB 0644
bitops.h File 2.38 KB 0644
bl_bit.h File 216 B 0644
bl_bit_32.h File 639 B 0644
bl_bit_64.h File 979 B 0644
bug.h File 2.77 KB 0644
bugs.h File 1.38 KB 0644
cache.h File 1.2 KB 0644
cache_insns.h File 242 B 0644
cache_insns_32.h File 642 B 0644
cache_insns_64.h File 839 B 0644
cacheflush.h File 3.58 KB 0644
checksum.h File 140 B 0644
checksum_32.h File 5.21 KB 0644
clock.h File 436 B 0644
cmpxchg-cas.h File 549 B 0644
cmpxchg-grb.h File 2.8 KB 0644
cmpxchg-irq.h File 1.04 KB 0644
cmpxchg-llsc.h File 1.06 KB 0644
cmpxchg-xchg.h File 1.33 KB 0644
cmpxchg.h File 1.77 KB 0644
device.h File 450 B 0644
dma-mapping.h File 694 B 0644
dma-register.h File 1.8 KB 0644
dma.h File 3.74 KB 0644
dmabrg.h File 536 B 0644
dwarf.h File 9.8 KB 0644
elf.h File 7.28 KB 0644
entry-macros.S File 1.85 KB 0644
extable.h File 227 B 0644
fb.h File 375 B 0644
fixmap.h File 2.92 KB 0644
flat.h File 1.23 KB 0644
fpu.h File 1.77 KB 0644
freq.h File 472 B 0644
ftrace.h File 1.11 KB 0644
futex-cas.h File 728 B 0644
futex-irq.h File 482 B 0644
futex-llsc.h File 870 B 0644
futex.h File 1.5 KB 0644
gpio.h File 1017 B 0644
hardirq.h File 440 B 0644
hd64461.h File 11.79 KB 0644
heartbeat.h File 383 B 0644
hugetlb.h File 1.96 KB 0644
hw_breakpoint.h File 1.88 KB 0644
hw_irq.h File 915 B 0644
i2c-sh7760.h File 406 B 0644
io.h File 11.33 KB 0644
io_generic.h File 661 B 0644
io_noioport.h File 1.09 KB 0644
io_trapped.h File 1.44 KB 0644
irq.h File 1.68 KB 0644
irqflags.h File 226 B 0644
kdebug.h File 406 B 0644
kexec.h File 2.61 KB 0644
kgdb.h File 851 B 0644
kmap_types.h File 265 B 0644
kprobes.h File 1.51 KB 0644
linkage.h File 154 B 0644
machvec.h File 939 B 0644
mmu.h File 2.18 KB 0644
mmu_context.h File 4.44 KB 0644
mmu_context_32.h File 1.28 KB 0644
mmu_context_64.h File 1.97 KB 0644
mmzone.h File 1.1 KB 0644
module.h File 1005 B 0644
page.h File 6.06 KB 0644
pci.h File 3.19 KB 0644
perf_event.h File 797 B 0644
pgalloc.h File 1.86 KB 0644
pgtable-2level.h File 598 B 0644
pgtable-3level.h File 1.54 KB 0644
pgtable.h File 4 KB 0644
pgtable_32.h File 16.37 KB 0644
pgtable_64.h File 11.32 KB 0644
posix_types.h File 146 B 0644
processor.h File 4.41 KB 0644
processor_32.h File 4.67 KB 0644
processor_64.h File 5.54 KB 0644
ptrace.h File 3.39 KB 0644
ptrace_32.h File 307 B 0644
ptrace_64.h File 312 B 0644
push-switch.h File 755 B 0644
reboot.h File 472 B 0644
romimage-macros.h File 1.1 KB 0644
rtc.h File 383 B 0644
seccomp.h File 280 B 0644
sections.h File 307 B 0644
segment.h File 879 B 0644
setup.h File 725 B 0644
sfp-machine.h File 3.43 KB 0644
sh7760fb.h File 5.61 KB 0644
sh_bios.h File 743 B 0644
shmparam.h File 629 B 0644
siu.h File 539 B 0644
smc37c93x.h File 5.56 KB 0644
smp-ops.h File 1012 B 0644
smp.h File 1.83 KB 0644
sparsemem.h File 443 B 0644
spi.h File 265 B 0644
spinlock-cas.h File 2.09 KB 0644
spinlock-llsc.h File 4.13 KB 0644
spinlock.h File 578 B 0644
spinlock_types.h File 463 B 0644
sram.h File 670 B 0644
stackprotector.h File 711 B 0644
stacktrace.h File 606 B 0644
string.h File 131 B 0644
string_32.h File 2.66 KB 0644
string_64.h File 499 B 0644
suspend.h File 2.52 KB 0644
switch_to.h File 492 B 0644
switch_to_32.h File 3.55 KB 0644
switch_to_64.h File 968 B 0644
syscall.h File 267 B 0644
syscall_32.h File 2.42 KB 0644
syscall_64.h File 1.79 KB 0644
syscalls.h File 564 B 0644
syscalls_32.h File 1022 B 0644
syscalls_64.h File 441 B 0644
thread_info.h File 5.32 KB 0644
timex.h File 637 B 0644
tlb.h File 4.12 KB 0644
tlb_64.h File 2.08 KB 0644
tlbflush.h File 1.77 KB 0644
topology.h File 645 B 0644
traps.h File 487 B 0644
traps_32.h File 1.31 KB 0644
traps_64.h File 851 B 0644
types.h File 411 B 0644
uaccess.h File 4.83 KB 0644
uaccess_32.h File 3.77 KB 0644
uaccess_64.h File 2.2 KB 0644
unaligned-sh4a.h File 4.51 KB 0644
unaligned.h File 359 B 0644
uncached.h File 1.34 KB 0644
unistd.h File 952 B 0644
unwinder.h File 856 B 0644
user.h File 2.52 KB 0644
vga.h File 98 B 0644
vmlinux.lds.h File 558 B 0644
watchdog.h File 4.14 KB 0644
word-at-a-time.h File 1.29 KB 0644