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/* SPDX-License-Identifier: GPL-2.0 */
/* fhc.h: FHC and Clock board register definitions.
 *
 * Copyright (C) 1997, 1999 David S. Miller (davem@redhat.com)
 */

#ifndef _SPARC64_FHC_H
#define _SPARC64_FHC_H

/* Clock board register offsets. */
#define CLOCK_CTRL	0x00UL	/* Main control */
#define CLOCK_STAT1	0x10UL	/* Status one */
#define CLOCK_STAT2	0x20UL	/* Status two */
#define CLOCK_PWRSTAT	0x30UL	/* Power status */
#define CLOCK_PWRPRES	0x40UL	/* Power presence */
#define CLOCK_TEMP	0x50UL	/* Temperature */
#define CLOCK_IRQDIAG	0x60UL	/* IRQ diagnostics */
#define CLOCK_PWRSTAT2	0x70UL	/* Power status two */

#define CLOCK_CTRL_LLED		0x04	/* Left LED, 0 == on */
#define CLOCK_CTRL_MLED		0x02	/* Mid LED, 1 == on */
#define CLOCK_CTRL_RLED		0x01	/* RIght LED, 1 == on */

/* Firehose controller register offsets */
#define FHC_PREGS_ID	0x00UL	/* FHC ID */
#define  FHC_ID_VERS		0xf0000000 /* Version of this FHC		*/
#define  FHC_ID_PARTID		0x0ffff000 /* Part ID code (0x0f9f == FHC)	*/
#define  FHC_ID_MANUF		0x0000007e /* Manufacturer (0x3e == SUN's JEDEC)*/
#define  FHC_ID_RESV		0x00000001 /* Read as one			*/
#define FHC_PREGS_RCS	0x10UL	/* FHC Reset Control/Status Register */
#define  FHC_RCS_POR		0x80000000 /* Last reset was a power cycle	*/
#define  FHC_RCS_SPOR		0x40000000 /* Last reset was sw power on reset	*/
#define  FHC_RCS_SXIR		0x20000000 /* Last reset was sw XIR reset	*/
#define  FHC_RCS_BPOR		0x10000000 /* Last reset was due to POR button	*/
#define  FHC_RCS_BXIR		0x08000000 /* Last reset was due to XIR button	*/
#define  FHC_RCS_WEVENT		0x04000000 /* CPU reset was due to wakeup event	*/
#define  FHC_RCS_CFATAL		0x02000000 /* Centerplane Fatal Error signalled	*/
#define  FHC_RCS_FENAB		0x01000000 /* Fatal errors elicit system reset	*/
#define FHC_PREGS_CTRL	0x20UL	/* FHC Control Register */
#define  FHC_CONTROL_ICS	0x00100000 /* Ignore Centerplane Signals	*/
#define  FHC_CONTROL_FRST	0x00080000 /* Fatal Error Reset Enable		*/
#define  FHC_CONTROL_LFAT	0x00040000 /* AC/DC signalled a local error	*/
#define  FHC_CONTROL_SLINE	0x00010000 /* Firmware Synchronization Line	*/
#define  FHC_CONTROL_DCD	0x00008000 /* DC-->DC Converter Disable		*/
#define  FHC_CONTROL_POFF	0x00004000 /* AC/DC Controller PLL Disable	*/
#define  FHC_CONTROL_FOFF	0x00002000 /* FHC Controller PLL Disable	*/
#define  FHC_CONTROL_AOFF	0x00001000 /* CPU A SRAM/SBD Low Power Mode	*/
#define  FHC_CONTROL_BOFF	0x00000800 /* CPU B SRAM/SBD Low Power Mode	*/
#define  FHC_CONTROL_PSOFF	0x00000400 /* Turns off this FHC's power supply	*/
#define  FHC_CONTROL_IXIST	0x00000200 /* 0=FHC tells clock board it exists	*/
#define  FHC_CONTROL_XMSTR	0x00000100 /* 1=Causes this FHC to be XIR master*/
#define  FHC_CONTROL_LLED	0x00000040 /* 0=Left LED ON			*/
#define  FHC_CONTROL_MLED	0x00000020 /* 1=Middle LED ON			*/
#define  FHC_CONTROL_RLED	0x00000010 /* 1=Right LED			*/
#define  FHC_CONTROL_BPINS	0x00000003 /* Spare Bidirectional Pins		*/
#define FHC_PREGS_BSR	0x30UL	/* FHC Board Status Register */
#define  FHC_BSR_DA64		0x00040000 /* Port A: 0=128bit 1=64bit data path */
#define  FHC_BSR_DB64		0x00020000 /* Port B: 0=128bit 1=64bit data path */
#define  FHC_BSR_BID		0x0001e000 /* Board ID                           */
#define  FHC_BSR_SA		0x00001c00 /* Port A UPA Speed (from the pins)   */
#define  FHC_BSR_SB		0x00000380 /* Port B UPA Speed (from the pins)   */
#define  FHC_BSR_NDIAG		0x00000040 /* Not in Diag Mode                   */
#define  FHC_BSR_NTBED		0x00000020 /* Not in TestBED Mode                */
#define  FHC_BSR_NIA		0x0000001c /* Jumper, bit 18 in PROM space       */
#define  FHC_BSR_SI		0x00000001 /* Spare input pin value              */
#define FHC_PREGS_ECC	0x40UL	/* FHC ECC Control Register (16 bits) */
#define FHC_PREGS_JCTRL	0xf0UL	/* FHC JTAG Control Register */
#define  FHC_JTAG_CTRL_MENAB	0x80000000 /* Indicates this is JTAG Master	 */
#define  FHC_JTAG_CTRL_MNONE	0x40000000 /* Indicates no JTAG Master present	 */
#define FHC_PREGS_JCMD	0x100UL	/* FHC JTAG Command Register */
#define FHC_IREG_IGN	0x00UL	/* This FHC's IGN */
#define FHC_FFREGS_IMAP	0x00UL	/* FHC Fanfail IMAP */
#define FHC_FFREGS_ICLR	0x10UL	/* FHC Fanfail ICLR */
#define FHC_SREGS_IMAP	0x00UL	/* FHC System IMAP */
#define FHC_SREGS_ICLR	0x10UL	/* FHC System ICLR */
#define FHC_UREGS_IMAP	0x00UL	/* FHC Uart IMAP */
#define FHC_UREGS_ICLR	0x10UL	/* FHC Uart ICLR */
#define FHC_TREGS_IMAP	0x00UL	/* FHC TOD IMAP */
#define FHC_TREGS_ICLR	0x10UL	/* FHC TOD ICLR */

#endif /* !(_SPARC64_FHC_H) */

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Name Type Size Permission Actions
Kbuild File 491 B 0644
agp.h File 434 B 0644
apb.h File 1.06 KB 0644
asm-offsets.h File 35 B 0644
asm-prototypes.h File 727 B 0644
asm.h File 1.08 KB 0644
asmmacro.h File 1.16 KB 0644
atomic.h File 219 B 0644
atomic_32.h File 2.26 KB 0644
atomic_64.h File 3.34 KB 0644
auxio.h File 310 B 0644
auxio_32.h File 2.55 KB 0644
auxio_64.h File 3.18 KB 0644
backoff.h File 2.7 KB 0644
barrier.h File 223 B 0644
barrier_32.h File 160 B 0644
barrier_64.h File 1.96 KB 0644
bbc.h File 9.76 KB 0644
bitext.h File 631 B 0644
bitops.h File 219 B 0644
bitops_32.h File 2.79 KB 0644
bitops_64.h File 1.64 KB 0644
btext.h File 145 B 0644
bug.h File 588 B 0644
bugs.h File 404 B 0644
cache.h File 649 B 0644
cacheflush.h File 373 B 0644
cacheflush_32.h File 1.97 KB 0644
cacheflush_64.h File 2.56 KB 0644
cachetlb_32.h File 882 B 0644
chafsr.h File 9.48 KB 0644
checksum.h File 227 B 0644
checksum_32.h File 6.81 KB 0644
checksum_64.h File 4.4 KB 0644
chmctrl.h File 7.91 KB 0644
clock.h File 231 B 0644
clocksource.h File 407 B 0644
cmpxchg.h File 223 B 0644
cmpxchg_32.h File 2.4 KB 0644
cmpxchg_64.h File 5.13 KB 0644
compat.h File 6.45 KB 0644
compat_signal.h File 565 B 0644
contregs.h File 1.9 KB 0644
cpu_type.h File 579 B 0644
cpudata.h File 378 B 0644
cpudata_32.h File 729 B 0644
cpudata_64.h File 1.13 KB 0644
current.h File 991 B 0644
dcr.h File 728 B 0644
dcu.h File 1.48 KB 0644
delay.h File 215 B 0644
delay_32.h File 907 B 0644
delay_64.h File 403 B 0644
device.h File 565 B 0644
dma-mapping.h File 632 B 0644
dma.h File 6.6 KB 0644
ebus_dma.h File 1.07 KB 0644
ecc.h File 4.34 KB 0644
eeprom.h File 254 B 0644
elf.h File 207 B 0644
elf_32.h File 3.19 KB 0644
elf_64.h File 6.47 KB 0644
estate.h File 2.23 KB 0644
extable_64.h File 727 B 0644
fb.h File 680 B 0644
fbio.h File 2.26 KB 0644
fhc.h File 4.43 KB 0644
floppy.h File 219 B 0644
floppy_32.h File 9.74 KB 0644
floppy_64.h File 18.83 KB 0644
fpumacro.h File 710 B 0644
ftrace.h File 800 B 0644
futex.h File 215 B 0644
futex_32.h File 82 B 0644
futex_64.h File 2.15 KB 0644
hardirq.h File 223 B 0644
hardirq_32.h File 334 B 0644
hardirq_64.h File 417 B 0644
head.h File 211 B 0644
head_32.h File 2.56 KB 0644
head_64.h File 2.13 KB 0644
hibernate.h File 421 B 0644
highmem.h File 2.02 KB 0644
hugetlb.h File 2.09 KB 0644
hvtramp.h File 782 B 0644
hw_irq.h File 88 B 0644
hypervisor.h File 110.71 KB 0644
ide.h File 2.19 KB 0644
idprom.h File 656 B 0644
intr_queue.h File 794 B 0644
io-unit.h File 2.41 KB 0644
io.h File 620 B 0644
io_32.h File 3.51 KB 0644
io_64.h File 10.66 KB 0644
ioctls.h File 358 B 0644
iommu.h File 215 B 0644
iommu_32.h File 5.73 KB 0644
iommu_64.h File 2.43 KB 0644
irq.h File 207 B 0644
irq_32.h File 526 B 0644
irq_64.h File 3.06 KB 0644
irqflags.h File 227 B 0644
irqflags_32.h File 1.03 KB 0644
irqflags_64.h File 1.91 KB 0644
jump_label.h File 1.01 KB 0644
kdebug.h File 219 B 0644
kdebug_32.h File 1.99 KB 0644
kdebug_64.h File 393 B 0644
kgdb.h File 1014 B 0644
kmap_types.h File 233 B 0644
kprobes.h File 1.41 KB 0644
ldc.h File 4.37 KB 0644
leon.h File 7.37 KB 0644
leon_amba.h File 8.09 KB 0644
leon_pci.h File 512 B 0644
lsu.h File 1.04 KB 0644
machines.h File 1.5 KB 0644
mbus.h File 2.93 KB 0644
mc146818rtc.h File 298 B 0644
mc146818rtc_32.h File 699 B 0644
mc146818rtc_64.h File 689 B 0644
mdesc.h File 2.99 KB 0644
memctrl.h File 311 B 0644
mman.h File 304 B 0644
mmu.h File 207 B 0644
mmu_32.h File 209 B 0644
mmu_64.h File 3.14 KB 0644
mmu_context.h File 239 B 0644
mmu_context_32.h File 1.07 KB 0644
mmu_context_64.h File 4.15 KB 0644
mmzone.h File 393 B 0644
msi.h File 774 B 0644
mxcc.h File 4.33 KB 0644
nmi.h File 354 B 0644
ns87303.h File 3.22 KB 0644
obio.h File 6.26 KB 0644
openprom.h File 7.3 KB 0644
oplib.h File 215 B 0644
oplib_32.h File 5.92 KB 0644
oplib_64.h File 8.12 KB 0644
page.h File 274 B 0644
page_32.h File 3.91 KB 0644
page_64.h File 4.49 KB 0644
parport.h File 5.68 KB 0644
pbm.h File 1.47 KB 0644
pci.h File 207 B 0644
pci_32.h File 1.09 KB 0644
pci_64.h File 1.49 KB 0644
pcic.h File 5.77 KB 0644
pcr.h File 1.85 KB 0644
percpu.h File 219 B 0644
percpu_32.h File 168 B 0644
percpu_64.h File 515 B 0644
perf_event.h File 802 B 0644
pgalloc.h File 223 B 0644
pgalloc_32.h File 1.91 KB 0644
pgalloc_64.h File 2.85 KB 0644
pgtable.h File 223 B 0644
pgtable_32.h File 11.35 KB 0644
pgtable_64.h File 30.71 KB 0644
pgtsrmmu.h File 6.05 KB 0644
pil.h File 1.08 KB 0644
processor.h File 231 B 0644
processor_32.h File 3.13 KB 0644
processor_64.h File 7.58 KB 0644
prom.h File 2.02 KB 0644
psr.h File 1.38 KB 0644
ptrace.h File 4.19 KB 0644
qrwlock.h File 205 B 0644
qspinlock.h File 215 B 0644
ross.h File 5.52 KB 0644
sbi.h File 3.34 KB 0644
scratchpad.h File 547 B 0644
seccomp.h File 225 B 0644
sections.h File 289 B 0644
setup.h File 1.52 KB 0644
sfafsr.h File 3.14 KB 0644
sfp-machine.h File 239 B 0644
sfp-machine_32.h File 6.79 KB 0644
sfp-machine_64.h File 3.1 KB 0644
shmparam.h File 227 B 0644
shmparam_32.h File 253 B 0644
shmparam_64.h File 306 B 0644
sigcontext.h File 2.55 KB 0644
signal.h File 835 B 0644
smp.h File 207 B 0644
smp_32.h File 3.29 KB 0644
smp_64.h File 1.84 KB 0644
sparsemem.h File 349 B 0644
spinlock.h File 227 B 0644
spinlock_32.h File 4.22 KB 0644
spinlock_64.h File 409 B 0644
spinlock_types.h File 549 B 0644
spitfire.h File 9.73 KB 0644
stacktrace.h File 166 B 0644
starfire.h File 418 B 0644
string.h File 1.13 KB 0644
string_32.h File 405 B 0644
string_64.h File 505 B 0644
sunbpp.h File 3.27 KB 0644
swift.h File 3.07 KB 0644
switch_to.h File 231 B 0644
switch_to_32.h File 3.53 KB 0644
switch_to_64.h File 2.58 KB 0644
syscall.h File 3.41 KB 0644
syscalls.h File 307 B 0644
termbits.h File 198 B 0644
termios.h File 4.94 KB 0644
thread_info.h File 239 B 0644
thread_info_32.h File 3.66 KB 0644
thread_info_64.h File 7.84 KB 0644
timer.h File 215 B 0644
timer_32.h File 1.18 KB 0644
timer_64.h File 2.37 KB 0644
timex.h File 215 B 0644
timex_32.h File 266 B 0644
timex_64.h File 423 B 0644
tlb.h File 207 B 0644
tlb_32.h File 520 B 0644
tlb_64.h File 913 B 0644
tlbflush.h File 227 B 0644
tlbflush_32.h File 621 B 0644
tlbflush_64.h File 1.73 KB 0644
topology.h File 227 B 0644
topology_32.h File 170 B 0644
topology_64.h File 1.51 KB 0644
trap_block.h File 6.51 KB 0644
traps.h File 577 B 0644
tsb.h File 12.17 KB 0644
tsunami.h File 1.85 KB 0644
ttable.h File 20.08 KB 0644
turbosparc.h File 3.78 KB 0644
uaccess.h File 363 B 0644
uaccess_32.h File 8.31 KB 0644
uaccess_64.h File 6.05 KB 0644
unaligned.h File 339 B 0644
unistd.h File 1.37 KB 0644
upa.h File 3.72 KB 0644
uprobes.h File 1.86 KB 0644
user.h File 102 B 0644
vaddrs.h File 2.02 KB 0644
vdso.h File 662 B 0644
vga.h File 964 B 0644
viking.h File 8.14 KB 0644
vio.h File 11.81 KB 0644
visasm.h File 1.51 KB 0644
vvar.h File 1.52 KB 0644
winmacro.h File 4.66 KB 0644
xor.h File 207 B 0644
xor_32.h File 7.31 KB 0644
xor_64.h File 2.5 KB 0644