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/* SPDX-License-Identifier: GPL-2.0 */
/*
 * pcic.h: JavaEngine 1 specific PCI definitions.
 *
 * Copyright (C) 1998 V. Roganov and G. Raiko
 */

#ifndef __SPARC_PCIC_H
#define __SPARC_PCIC_H

#ifndef __ASSEMBLY__

#include <linux/types.h>
#include <linux/smp.h>
#include <linux/pci.h>
#include <linux/ioport.h>
#include <asm/pbm.h>

struct linux_pcic {
        void __iomem            *pcic_regs;
        unsigned long           pcic_io;
        void __iomem            *pcic_config_space_addr;
        void __iomem            *pcic_config_space_data;
	struct resource		pcic_res_regs;
	struct resource		pcic_res_io;
	struct resource		pcic_res_cfg_addr;
	struct resource		pcic_res_cfg_data;
        struct linux_pbm_info   pbm;
	struct pcic_ca2irq	*pcic_imap;
	int			pcic_imdim;
};

#ifdef CONFIG_PCIC_PCI
int pcic_present(void);
int pcic_probe(void);
void pci_time_init(void);
void sun4m_pci_init_IRQ(void);
#else
static inline int pcic_present(void) { return 0; }
static inline int pcic_probe(void) { return 0; }
static inline void pci_time_init(void) {}
static inline void sun4m_pci_init_IRQ(void) {}
#endif
#endif

/* Size of PCI I/O space which we relocate. */
#define PCI_SPACE_SIZE                  0x1000000       /* 16 MB */

/* PCIC Register Set. */
#define PCI_DIAGNOSTIC_0                0x40    /* 32 bits */
#define PCI_SIZE_0                      0x44    /* 32 bits */
#define PCI_SIZE_1                      0x48    /* 32 bits */
#define PCI_SIZE_2                      0x4c    /* 32 bits */
#define PCI_SIZE_3                      0x50    /* 32 bits */
#define PCI_SIZE_4                      0x54    /* 32 bits */
#define PCI_SIZE_5                      0x58    /* 32 bits */
#define PCI_PIO_CONTROL                 0x60    /* 8  bits */
#define PCI_DVMA_CONTROL                0x62    /* 8  bits */
#define  PCI_DVMA_CONTROL_INACTIVITY_REQ        (1<<0)
#define  PCI_DVMA_CONTROL_IOTLB_ENABLE          (1<<0)
#define  PCI_DVMA_CONTROL_IOTLB_DISABLE         0
#define  PCI_DVMA_CONTROL_INACTIVITY_ACK        (1<<4)
#define PCI_INTERRUPT_CONTROL           0x63    /* 8  bits */
#define PCI_CPU_INTERRUPT_PENDING       0x64    /* 32 bits */
#define PCI_DIAGNOSTIC_1                0x68    /* 16 bits */
#define PCI_SOFTWARE_INT_CLEAR          0x6a    /* 16 bits */
#define PCI_SOFTWARE_INT_SET            0x6e    /* 16 bits */
#define PCI_SYS_INT_PENDING             0x70    /* 32 bits */
#define  PCI_SYS_INT_PENDING_PIO		0x40000000
#define  PCI_SYS_INT_PENDING_DMA		0x20000000
#define  PCI_SYS_INT_PENDING_PCI		0x10000000
#define  PCI_SYS_INT_PENDING_APSR		0x08000000
#define PCI_SYS_INT_TARGET_MASK         0x74    /* 32 bits */
#define PCI_SYS_INT_TARGET_MASK_CLEAR   0x78    /* 32 bits */
#define PCI_SYS_INT_TARGET_MASK_SET     0x7c    /* 32 bits */
#define PCI_SYS_INT_PENDING_CLEAR       0x83    /* 8  bits */
#define  PCI_SYS_INT_PENDING_CLEAR_ALL		0x80
#define  PCI_SYS_INT_PENDING_CLEAR_PIO		0x40
#define  PCI_SYS_INT_PENDING_CLEAR_DMA		0x20
#define  PCI_SYS_INT_PENDING_CLEAR_PCI		0x10
#define PCI_IOTLB_CONTROL               0x84    /* 8  bits */
#define PCI_INT_SELECT_LO               0x88    /* 16 bits */
#define PCI_ARBITRATION_SELECT          0x8a    /* 16 bits */
#define PCI_INT_SELECT_HI               0x8c    /* 16 bits */
#define PCI_HW_INT_OUTPUT               0x8e    /* 16 bits */
#define PCI_IOTLB_RAM_INPUT             0x90    /* 32 bits */
#define PCI_IOTLB_CAM_INPUT             0x94    /* 32 bits */
#define PCI_IOTLB_RAM_OUTPUT            0x98    /* 32 bits */
#define PCI_IOTLB_CAM_OUTPUT            0x9c    /* 32 bits */
#define PCI_SMBAR0                      0xa0    /* 8  bits */
#define PCI_MSIZE0                      0xa1    /* 8  bits */
#define PCI_PMBAR0                      0xa2    /* 8  bits */
#define PCI_SMBAR1                      0xa4    /* 8  bits */
#define PCI_MSIZE1                      0xa5    /* 8  bits */
#define PCI_PMBAR1                      0xa6    /* 8  bits */
#define PCI_SIBAR                       0xa8    /* 8  bits */
#define   PCI_SIBAR_ADDRESS_MASK        0xf
#define PCI_ISIZE                       0xa9    /* 8  bits */
#define   PCI_ISIZE_16M                 0xf
#define   PCI_ISIZE_32M                 0xe
#define   PCI_ISIZE_64M                 0xc
#define   PCI_ISIZE_128M                0x8
#define   PCI_ISIZE_256M                0x0
#define PCI_PIBAR                       0xaa    /* 8  bits */
#define PCI_CPU_COUNTER_LIMIT_HI        0xac    /* 32 bits */
#define PCI_CPU_COUNTER_LIMIT_LO        0xb0    /* 32 bits */
#define PCI_CPU_COUNTER_LIMIT           0xb4    /* 32 bits */
#define PCI_SYS_LIMIT                   0xb8    /* 32 bits */
#define PCI_SYS_COUNTER                 0xbc    /* 32 bits */
#define   PCI_SYS_COUNTER_OVERFLOW      (1<<31) /* Limit reached */
#define PCI_SYS_LIMIT_PSEUDO            0xc0    /* 32 bits */
#define PCI_USER_TIMER_CONTROL          0xc4    /* 8  bits */
#define PCI_USER_TIMER_CONFIG           0xc5    /* 8  bits */
#define PCI_COUNTER_IRQ                 0xc6    /* 8  bits */
#define  PCI_COUNTER_IRQ_SET(sys_irq, cpu_irq)  ((((sys_irq) & 0xf) << 4) | \
                                                  ((cpu_irq) & 0xf))
#define  PCI_COUNTER_IRQ_SYS(v)                 (((v) >> 4) & 0xf)
#define  PCI_COUNTER_IRQ_CPU(v)                 ((v) & 0xf)
#define PCI_PIO_ERROR_COMMAND           0xc7    /* 8  bits */
#define PCI_PIO_ERROR_ADDRESS           0xc8    /* 32 bits */
#define PCI_IOTLB_ERROR_ADDRESS         0xcc    /* 32 bits */
#define PCI_SYS_STATUS                  0xd0    /* 8  bits */
#define   PCI_SYS_STATUS_RESET_ENABLE           (1<<0)
#define   PCI_SYS_STATUS_RESET                  (1<<1)
#define   PCI_SYS_STATUS_WATCHDOG_RESET         (1<<4)
#define   PCI_SYS_STATUS_PCI_RESET              (1<<5)
#define   PCI_SYS_STATUS_PCI_RESET_ENABLE       (1<<6)
#define   PCI_SYS_STATUS_PCI_SATTELITE_MODE     (1<<7)

#endif /* !(__SPARC_PCIC_H) */

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Name Type Size Permission Actions
Kbuild File 491 B 0644
agp.h File 434 B 0644
apb.h File 1.06 KB 0644
asm-offsets.h File 35 B 0644
asm-prototypes.h File 727 B 0644
asm.h File 1.08 KB 0644
asmmacro.h File 1.16 KB 0644
atomic.h File 219 B 0644
atomic_32.h File 2.26 KB 0644
atomic_64.h File 3.34 KB 0644
auxio.h File 310 B 0644
auxio_32.h File 2.55 KB 0644
auxio_64.h File 3.18 KB 0644
backoff.h File 2.7 KB 0644
barrier.h File 223 B 0644
barrier_32.h File 160 B 0644
barrier_64.h File 1.96 KB 0644
bbc.h File 9.76 KB 0644
bitext.h File 631 B 0644
bitops.h File 219 B 0644
bitops_32.h File 2.79 KB 0644
bitops_64.h File 1.64 KB 0644
btext.h File 145 B 0644
bug.h File 588 B 0644
bugs.h File 404 B 0644
cache.h File 649 B 0644
cacheflush.h File 373 B 0644
cacheflush_32.h File 1.97 KB 0644
cacheflush_64.h File 2.56 KB 0644
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chafsr.h File 9.48 KB 0644
checksum.h File 227 B 0644
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checksum_64.h File 4.4 KB 0644
chmctrl.h File 7.91 KB 0644
clock.h File 231 B 0644
clocksource.h File 407 B 0644
cmpxchg.h File 223 B 0644
cmpxchg_32.h File 2.4 KB 0644
cmpxchg_64.h File 5.13 KB 0644
compat.h File 6.45 KB 0644
compat_signal.h File 565 B 0644
contregs.h File 1.9 KB 0644
cpu_type.h File 579 B 0644
cpudata.h File 378 B 0644
cpudata_32.h File 729 B 0644
cpudata_64.h File 1.13 KB 0644
current.h File 991 B 0644
dcr.h File 728 B 0644
dcu.h File 1.48 KB 0644
delay.h File 215 B 0644
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device.h File 565 B 0644
dma-mapping.h File 632 B 0644
dma.h File 6.6 KB 0644
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ecc.h File 4.34 KB 0644
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futex.h File 215 B 0644
futex_32.h File 82 B 0644
futex_64.h File 2.15 KB 0644
hardirq.h File 223 B 0644
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head.h File 211 B 0644
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head_64.h File 2.13 KB 0644
hibernate.h File 421 B 0644
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hugetlb.h File 2.09 KB 0644
hvtramp.h File 782 B 0644
hw_irq.h File 88 B 0644
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ide.h File 2.19 KB 0644
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irq.h File 207 B 0644
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irqflags.h File 227 B 0644
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irqflags_64.h File 1.91 KB 0644
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pci_64.h File 1.49 KB 0644
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ross.h File 5.52 KB 0644
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starfire.h File 418 B 0644
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string_32.h File 405 B 0644
string_64.h File 505 B 0644
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thread_info_64.h File 7.84 KB 0644
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timer_64.h File 2.37 KB 0644
timex.h File 215 B 0644
timex_32.h File 266 B 0644
timex_64.h File 423 B 0644
tlb.h File 207 B 0644
tlb_32.h File 520 B 0644
tlb_64.h File 913 B 0644
tlbflush.h File 227 B 0644
tlbflush_32.h File 621 B 0644
tlbflush_64.h File 1.73 KB 0644
topology.h File 227 B 0644
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topology_64.h File 1.51 KB 0644
trap_block.h File 6.51 KB 0644
traps.h File 577 B 0644
tsb.h File 12.17 KB 0644
tsunami.h File 1.85 KB 0644
ttable.h File 20.08 KB 0644
turbosparc.h File 3.78 KB 0644
uaccess.h File 363 B 0644
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unaligned.h File 339 B 0644
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