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/* SPDX-License-Identifier: GPL-2.0 */
/*
 * include/asm/processor.h
 *
 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
 */

#ifndef __ASM_SPARC64_PROCESSOR_H
#define __ASM_SPARC64_PROCESSOR_H

/*
 * Sparc64 implementation of macro that returns current
 * instruction pointer ("program counter").
 */
#define current_text_addr() ({ void *pc; __asm__("rd %%pc, %0" : "=r" (pc)); pc; })

#include <asm/asi.h>
#include <asm/pstate.h>
#include <asm/ptrace.h>
#include <asm/page.h>

/*
 * User lives in his very own context, and cannot reference us. Note
 * that TASK_SIZE is a misnomer, it really gives maximum user virtual
 * address that the kernel will allocate out.
 *
 * XXX No longer using virtual page tables, kill this upper limit...
 */
#define VA_BITS		44
#ifndef __ASSEMBLY__
#define VPTE_SIZE	(1UL << (VA_BITS - PAGE_SHIFT + 3))
#else
#define VPTE_SIZE	(1 << (VA_BITS - PAGE_SHIFT + 3))
#endif

#define TASK_SIZE_OF(tsk) \
	(test_tsk_thread_flag(tsk,TIF_32BIT) ? \
	 (1UL << 32UL) : ((unsigned long)-VPTE_SIZE))
#define TASK_SIZE \
	(test_thread_flag(TIF_32BIT) ? \
	 (1UL << 32UL) : ((unsigned long)-VPTE_SIZE))
#ifdef __KERNEL__

#define STACK_TOP32	((1UL << 32UL) - PAGE_SIZE)
#define STACK_TOP64	(0x0000080000000000UL - (1UL << 32UL))

#define STACK_TOP	(test_thread_flag(TIF_32BIT) ? \
			 STACK_TOP32 : STACK_TOP64)

#define STACK_TOP_MAX	STACK_TOP64

#endif

#ifndef __ASSEMBLY__

typedef struct {
	unsigned char seg;
} mm_segment_t;

/* The Sparc processor specific thread struct. */
/* XXX This should die, everything can go into thread_info now. */
struct thread_struct {
#ifdef CONFIG_DEBUG_SPINLOCK
	/* How many spinlocks held by this thread.
	 * Used with spin lock debugging to catch tasks
	 * sleeping illegally with locks held.
	 */
	int smp_lock_count;
	unsigned int smp_lock_pc;
#else
	int dummy; /* f'in gcc bug... */
#endif
};

#endif /* !(__ASSEMBLY__) */

#ifndef CONFIG_DEBUG_SPINLOCK
#define INIT_THREAD  {			\
	0,				\
}
#else /* CONFIG_DEBUG_SPINLOCK */
#define INIT_THREAD  {					\
/* smp_lock_count, smp_lock_pc, */			\
   0,		   0,					\
}
#endif /* !(CONFIG_DEBUG_SPINLOCK) */

#ifndef __ASSEMBLY__

#include <linux/types.h>
#include <asm/fpumacro.h>

struct task_struct;

/* On Uniprocessor, even in RMO processes see TSO semantics */
#ifdef CONFIG_SMP
#define TSTATE_INITIAL_MM	TSTATE_TSO
#else
#define TSTATE_INITIAL_MM	TSTATE_RMO
#endif

/* Do necessary setup to start up a newly executed thread. */
#define start_thread(regs, pc, sp) \
do { \
	unsigned long __asi = ASI_PNF; \
	regs->tstate = (regs->tstate & (TSTATE_CWP)) | (TSTATE_INITIAL_MM|TSTATE_IE) | (__asi << 24UL); \
	regs->tpc = ((pc & (~3)) - 4); \
	regs->tnpc = regs->tpc + 4; \
	regs->y = 0; \
	set_thread_wstate(1 << 3); \
	if (current_thread_info()->utraps) { \
		if (*(current_thread_info()->utraps) < 2) \
			kfree(current_thread_info()->utraps); \
		else \
			(*(current_thread_info()->utraps))--; \
		current_thread_info()->utraps = NULL; \
	} \
	__asm__ __volatile__( \
	"stx		%%g0, [%0 + %2 + 0x00]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x08]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x10]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x18]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x20]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x28]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x30]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x38]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x40]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x48]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x50]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x58]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x60]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x68]\n\t" \
	"stx		%1,   [%0 + %2 + 0x70]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x78]\n\t" \
	"wrpr		%%g0, (1 << 3), %%wstate\n\t" \
	: \
	: "r" (regs), "r" (sp - sizeof(struct reg_window) - STACK_BIAS), \
	  "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); \
	fprs_write(0);	\
	current_thread_info()->xfsr[0] = 0;	\
	current_thread_info()->fpsaved[0] = 0;	\
	regs->tstate &= ~TSTATE_PEF;	\
} while (0)

#define start_thread32(regs, pc, sp) \
do { \
	unsigned long __asi = ASI_PNF; \
	pc &= 0x00000000ffffffffUL; \
	sp &= 0x00000000ffffffffUL; \
	regs->tstate = (regs->tstate & (TSTATE_CWP))|(TSTATE_INITIAL_MM|TSTATE_IE|TSTATE_AM) | (__asi << 24UL); \
	regs->tpc = ((pc & (~3)) - 4); \
	regs->tnpc = regs->tpc + 4; \
	regs->y = 0; \
	set_thread_wstate(2 << 3); \
	if (current_thread_info()->utraps) { \
		if (*(current_thread_info()->utraps) < 2) \
			kfree(current_thread_info()->utraps); \
		else \
			(*(current_thread_info()->utraps))--; \
		current_thread_info()->utraps = NULL; \
	} \
	__asm__ __volatile__( \
	"stx		%%g0, [%0 + %2 + 0x00]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x08]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x10]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x18]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x20]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x28]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x30]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x38]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x40]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x48]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x50]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x58]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x60]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x68]\n\t" \
	"stx		%1,   [%0 + %2 + 0x70]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x78]\n\t" \
	"wrpr		%%g0, (2 << 3), %%wstate\n\t" \
	: \
	: "r" (regs), "r" (sp - sizeof(struct reg_window32)), \
	  "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); \
	fprs_write(0);	\
	current_thread_info()->xfsr[0] = 0;	\
	current_thread_info()->fpsaved[0] = 0;	\
	regs->tstate &= ~TSTATE_PEF;	\
} while (0)

/* Free all resources held by a thread. */
#define release_thread(tsk)		do { } while (0)

unsigned long get_wchan(struct task_struct *task);

#define task_pt_regs(tsk) (task_thread_info(tsk)->kregs)
#define KSTK_EIP(tsk)  (task_pt_regs(tsk)->tpc)
#define KSTK_ESP(tsk)  (task_pt_regs(tsk)->u_regs[UREG_FP])

/* Please see the commentary in asm/backoff.h for a description of
 * what these instructions are doing and how they have been chosen.
 * To make a long story short, we are trying to yield the current cpu
 * strand during busy loops.
 */
#ifdef	BUILD_VDSO
#define	cpu_relax()	asm volatile("\n99:\n\t"			\
				     "rd	%%ccr, %%g0\n\t"	\
				     "rd	%%ccr, %%g0\n\t"	\
				     "rd	%%ccr, %%g0\n\t"	\
				     ::: "memory")
#else /* ! BUILD_VDSO */
#define cpu_relax()	asm volatile("\n99:\n\t"			\
				     "rd	%%ccr, %%g0\n\t"	\
				     "rd	%%ccr, %%g0\n\t"	\
				     "rd	%%ccr, %%g0\n\t"	\
				     ".section	.pause_3insn_patch,\"ax\"\n\t"\
				     ".word	99b\n\t"		\
				     "wr	%%g0, 128, %%asr27\n\t"	\
				     "nop\n\t"				\
				     "nop\n\t"				\
				     ".previous"			\
				     ::: "memory")
#endif

/* Prefetch support.  This is tuned for UltraSPARC-III and later.
 * UltraSPARC-I will treat these as nops, and UltraSPARC-II has
 * a shallower prefetch queue than later chips.
 */
#define ARCH_HAS_PREFETCH
#define ARCH_HAS_PREFETCHW
#define ARCH_HAS_SPINLOCK_PREFETCH

static inline void prefetch(const void *x)
{
	/* We do not use the read prefetch mnemonic because that
	 * prefetches into the prefetch-cache which only is accessible
	 * by floating point operations in UltraSPARC-III and later.
	 * By contrast, "#one_write" prefetches into the L2 cache
	 * in shared state.
	 */
	__asm__ __volatile__("prefetch [%0], #one_write"
			     : /* no outputs */
			     : "r" (x));
}

static inline void prefetchw(const void *x)
{
	/* The most optimal prefetch to use for writes is
	 * "#n_writes".  This brings the cacheline into the
	 * L2 cache in "owned" state.
	 */
	__asm__ __volatile__("prefetch [%0], #n_writes"
			     : /* no outputs */
			     : "r" (x));
}

#define spin_lock_prefetch(x)	prefetchw(x)

#define HAVE_ARCH_PICK_MMAP_LAYOUT

int do_mathemu(struct pt_regs *regs, struct fpustate *f, bool illegal_insn_trap);

#endif /* !(__ASSEMBLY__) */

#endif /* !(__ASM_SPARC64_PROCESSOR_H) */

Filemanager

Name Type Size Permission Actions
Kbuild File 491 B 0644
agp.h File 434 B 0644
apb.h File 1.06 KB 0644
asm-offsets.h File 35 B 0644
asm-prototypes.h File 727 B 0644
asm.h File 1.08 KB 0644
asmmacro.h File 1.16 KB 0644
atomic.h File 219 B 0644
atomic_32.h File 2.26 KB 0644
atomic_64.h File 3.34 KB 0644
auxio.h File 310 B 0644
auxio_32.h File 2.55 KB 0644
auxio_64.h File 3.18 KB 0644
backoff.h File 2.7 KB 0644
barrier.h File 223 B 0644
barrier_32.h File 160 B 0644
barrier_64.h File 1.96 KB 0644
bbc.h File 9.76 KB 0644
bitext.h File 631 B 0644
bitops.h File 219 B 0644
bitops_32.h File 2.79 KB 0644
bitops_64.h File 1.64 KB 0644
btext.h File 145 B 0644
bug.h File 588 B 0644
bugs.h File 404 B 0644
cache.h File 649 B 0644
cacheflush.h File 373 B 0644
cacheflush_32.h File 1.97 KB 0644
cacheflush_64.h File 2.56 KB 0644
cachetlb_32.h File 882 B 0644
chafsr.h File 9.48 KB 0644
checksum.h File 227 B 0644
checksum_32.h File 6.81 KB 0644
checksum_64.h File 4.4 KB 0644
chmctrl.h File 7.91 KB 0644
clock.h File 231 B 0644
clocksource.h File 407 B 0644
cmpxchg.h File 223 B 0644
cmpxchg_32.h File 2.4 KB 0644
cmpxchg_64.h File 5.13 KB 0644
compat.h File 6.45 KB 0644
compat_signal.h File 565 B 0644
contregs.h File 1.9 KB 0644
cpu_type.h File 579 B 0644
cpudata.h File 378 B 0644
cpudata_32.h File 729 B 0644
cpudata_64.h File 1.13 KB 0644
current.h File 991 B 0644
dcr.h File 728 B 0644
dcu.h File 1.48 KB 0644
delay.h File 215 B 0644
delay_32.h File 907 B 0644
delay_64.h File 403 B 0644
device.h File 565 B 0644
dma-mapping.h File 632 B 0644
dma.h File 6.6 KB 0644
ebus_dma.h File 1.07 KB 0644
ecc.h File 4.34 KB 0644
eeprom.h File 254 B 0644
elf.h File 207 B 0644
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estate.h File 2.23 KB 0644
extable_64.h File 727 B 0644
fb.h File 680 B 0644
fbio.h File 2.26 KB 0644
fhc.h File 4.43 KB 0644
floppy.h File 219 B 0644
floppy_32.h File 9.74 KB 0644
floppy_64.h File 18.83 KB 0644
fpumacro.h File 710 B 0644
ftrace.h File 800 B 0644
futex.h File 215 B 0644
futex_32.h File 82 B 0644
futex_64.h File 2.15 KB 0644
hardirq.h File 223 B 0644
hardirq_32.h File 334 B 0644
hardirq_64.h File 417 B 0644
head.h File 211 B 0644
head_32.h File 2.56 KB 0644
head_64.h File 2.13 KB 0644
hibernate.h File 421 B 0644
highmem.h File 2.02 KB 0644
hugetlb.h File 2.09 KB 0644
hvtramp.h File 782 B 0644
hw_irq.h File 88 B 0644
hypervisor.h File 110.71 KB 0644
ide.h File 2.19 KB 0644
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io-unit.h File 2.41 KB 0644
io.h File 620 B 0644
io_32.h File 3.51 KB 0644
io_64.h File 10.66 KB 0644
ioctls.h File 358 B 0644
iommu.h File 215 B 0644
iommu_32.h File 5.73 KB 0644
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irq.h File 207 B 0644
irq_32.h File 526 B 0644
irq_64.h File 3.06 KB 0644
irqflags.h File 227 B 0644
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irqflags_64.h File 1.91 KB 0644
jump_label.h File 1.01 KB 0644
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kdebug_64.h File 393 B 0644
kgdb.h File 1014 B 0644
kmap_types.h File 233 B 0644
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ldc.h File 4.37 KB 0644
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leon_amba.h File 8.09 KB 0644
leon_pci.h File 512 B 0644
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mmu_context_64.h File 4.15 KB 0644
mmzone.h File 393 B 0644
msi.h File 774 B 0644
mxcc.h File 4.33 KB 0644
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ns87303.h File 3.22 KB 0644
obio.h File 6.26 KB 0644
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pcic.h File 5.77 KB 0644
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percpu.h File 219 B 0644
percpu_32.h File 168 B 0644
percpu_64.h File 515 B 0644
perf_event.h File 802 B 0644
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pgtsrmmu.h File 6.05 KB 0644
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processor.h File 231 B 0644
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qspinlock.h File 215 B 0644
ross.h File 5.52 KB 0644
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spinlock_64.h File 409 B 0644
spinlock_types.h File 549 B 0644
spitfire.h File 9.73 KB 0644
stacktrace.h File 166 B 0644
starfire.h File 418 B 0644
string.h File 1.13 KB 0644
string_32.h File 405 B 0644
string_64.h File 505 B 0644
sunbpp.h File 3.27 KB 0644
swift.h File 3.07 KB 0644
switch_to.h File 231 B 0644
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timer.h File 215 B 0644
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timer_64.h File 2.37 KB 0644
timex.h File 215 B 0644
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timex_64.h File 423 B 0644
tlb.h File 207 B 0644
tlb_32.h File 520 B 0644
tlb_64.h File 913 B 0644
tlbflush.h File 227 B 0644
tlbflush_32.h File 621 B 0644
tlbflush_64.h File 1.73 KB 0644
topology.h File 227 B 0644
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topology_64.h File 1.51 KB 0644
trap_block.h File 6.51 KB 0644
traps.h File 577 B 0644
tsb.h File 12.17 KB 0644
tsunami.h File 1.85 KB 0644
ttable.h File 20.08 KB 0644
turbosparc.h File 3.78 KB 0644
uaccess.h File 363 B 0644
uaccess_32.h File 8.31 KB 0644
uaccess_64.h File 6.05 KB 0644
unaligned.h File 339 B 0644
unistd.h File 1.37 KB 0644
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xor.h File 207 B 0644
xor_32.h File 7.31 KB 0644
xor_64.h File 2.5 KB 0644