/* SPDX-License-Identifier: GPL-2.0 */ #ifndef _SPARC64_TSB_H #define _SPARC64_TSB_H /* The sparc64 TSB is similar to the powerpc hashtables. It's a * power-of-2 sized table of TAG/PTE pairs. The cpu precomputes * pointers into this table for 8K and 64K page sizes, and also a * comparison TAG based upon the virtual address and context which * faults. * * TLB miss trap handler software does the actual lookup via something * of the form: * * ldxa [%g0] ASI_{D,I}MMU_TSB_8KB_PTR, %g1 * ldxa [%g0] ASI_{D,I}MMU, %g6 * sllx %g6, 22, %g6 * srlx %g6, 22, %g6 * ldda [%g1] ASI_NUCLEUS_QUAD_LDD, %g4 * cmp %g4, %g6 * bne,pn %xcc, tsb_miss_{d,i}tlb * mov FAULT_CODE_{D,I}TLB, %g3 * stxa %g5, [%g0] ASI_{D,I}TLB_DATA_IN * retry * * * Each 16-byte slot of the TSB is the 8-byte tag and then the 8-byte * PTE. The TAG is of the same layout as the TLB TAG TARGET mmu * register which is: * * ------------------------------------------------- * | - | CONTEXT | - | VADDR bits 63:22 | * ------------------------------------------------- * 63 61 60 48 47 42 41 0 * * But actually, since we use per-mm TSB's, we zero out the CONTEXT * field. * * Like the powerpc hashtables we need to use locking in order to * synchronize while we update the entries. PTE updates need locking * as well. * * We need to carefully choose a lock bits for the TSB entry. We * choose to use bit 47 in the tag. Also, since we never map anything * at page zero in context zero, we use zero as an invalid tag entry. * When the lock bit is set, this forces a tag comparison failure. */ #define TSB_TAG_LOCK_BIT 47 #define TSB_TAG_LOCK_HIGH (1 << (TSB_TAG_LOCK_BIT - 32)) #define TSB_TAG_INVALID_BIT 46 #define TSB_TAG_INVALID_HIGH (1 << (TSB_TAG_INVALID_BIT - 32)) /* Some cpus support physical address quad loads. We want to use * those if possible so we don't need to hard-lock the TSB mapping * into the TLB. We encode some instruction patching in order to * support this. * * The kernel TSB is locked into the TLB by virtue of being in the * kernel image, so we don't play these games for swapper_tsb access. */ #ifndef __ASSEMBLY__ struct tsb_ldquad_phys_patch_entry { unsigned int addr; unsigned int sun4u_insn; unsigned int sun4v_insn; }; extern struct tsb_ldquad_phys_patch_entry __tsb_ldquad_phys_patch, __tsb_ldquad_phys_patch_end; struct tsb_phys_patch_entry { unsigned int addr; unsigned int insn; }; extern struct tsb_phys_patch_entry __tsb_phys_patch, __tsb_phys_patch_end; #endif #define TSB_LOAD_QUAD(TSB, REG) \ 661: ldda [TSB] ASI_NUCLEUS_QUAD_LDD, REG; \ .section .tsb_ldquad_phys_patch, "ax"; \ .word 661b; \ ldda [TSB] ASI_QUAD_LDD_PHYS, REG; \ ldda [TSB] ASI_QUAD_LDD_PHYS_4V, REG; \ .previous #define TSB_LOAD_TAG_HIGH(TSB, REG) \ 661: lduwa [TSB] ASI_N, REG; \ .section .tsb_phys_patch, "ax"; \ .word 661b; \ lduwa [TSB] ASI_PHYS_USE_EC, REG; \ .previous #define TSB_LOAD_TAG(TSB, REG) \ 661: ldxa [TSB] ASI_N, REG; \ .section .tsb_phys_patch, "ax"; \ .word 661b; \ ldxa [TSB] ASI_PHYS_USE_EC, REG; \ .previous #define TSB_CAS_TAG_HIGH(TSB, REG1, REG2) \ 661: casa [TSB] ASI_N, REG1, REG2; \ .section .tsb_phys_patch, "ax"; \ .word 661b; \ casa [TSB] ASI_PHYS_USE_EC, REG1, REG2; \ .previous #define TSB_CAS_TAG(TSB, REG1, REG2) \ 661: casxa [TSB] ASI_N, REG1, REG2; \ .section .tsb_phys_patch, "ax"; \ .word 661b; \ casxa [TSB] ASI_PHYS_USE_EC, REG1, REG2; \ .previous #define TSB_STORE(ADDR, VAL) \ 661: stxa VAL, [ADDR] ASI_N; \ .section .tsb_phys_patch, "ax"; \ .word 661b; \ stxa VAL, [ADDR] ASI_PHYS_USE_EC; \ .previous #define TSB_LOCK_TAG(TSB, REG1, REG2) \ 99: TSB_LOAD_TAG_HIGH(TSB, REG1); \ sethi %hi(TSB_TAG_LOCK_HIGH), REG2;\ andcc REG1, REG2, %g0; \ bne,pn %icc, 99b; \ nop; \ TSB_CAS_TAG_HIGH(TSB, REG1, REG2); \ cmp REG1, REG2; \ bne,pn %icc, 99b; \ nop; \ #define TSB_WRITE(TSB, TTE, TAG) \ add TSB, 0x8, TSB; \ TSB_STORE(TSB, TTE); \ sub TSB, 0x8, TSB; \ TSB_STORE(TSB, TAG); /* Do a kernel page table walk. Leaves valid PTE value in * REG1. Jumps to FAIL_LABEL on early page table walk * termination. VADDR will not be clobbered, but REG2 will. * * There are two masks we must apply to propagate bits from * the virtual address into the PTE physical address field * when dealing with huge pages. This is because the page * table boundaries do not match the huge page size(s) the * hardware supports. * * In these cases we propagate the bits that are below the * page table level where we saw the huge page mapping, but * are still within the relevant physical bits for the huge * page size in question. So for PMD mappings (which fall on * bit 23, for 8MB per PMD) we must propagate bit 22 for a * 4MB huge page. For huge PUDs (which fall on bit 33, for * 8GB per PUD), we have to accommodate 256MB and 2GB huge * pages. So for those we propagate bits 32 to 28. */ #define KERN_PGTABLE_WALK(VADDR, REG1, REG2, FAIL_LABEL) \ sethi %hi(swapper_pg_dir), REG1; \ or REG1, %lo(swapper_pg_dir), REG1; \ sllx VADDR, 64 - (PGDIR_SHIFT + PGDIR_BITS), REG2; \ srlx REG2, 64 - PAGE_SHIFT, REG2; \ andn REG2, 0x7, REG2; \ ldx [REG1 + REG2], REG1; \ brz,pn REG1, FAIL_LABEL; \ sllx VADDR, 64 - (PUD_SHIFT + PUD_BITS), REG2; \ srlx REG2, 64 - PAGE_SHIFT, REG2; \ andn REG2, 0x7, REG2; \ ldxa [REG1 + REG2] ASI_PHYS_USE_EC, REG1; \ brz,pn REG1, FAIL_LABEL; \ sethi %uhi(_PAGE_PUD_HUGE), REG2; \ brz,pn REG1, FAIL_LABEL; \ sllx REG2, 32, REG2; \ andcc REG1, REG2, %g0; \ sethi %hi(0xf8000000), REG2; \ bne,pt %xcc, 697f; \ sllx REG2, 1, REG2; \ sllx VADDR, 64 - (PMD_SHIFT + PMD_BITS), REG2; \ srlx REG2, 64 - PAGE_SHIFT, REG2; \ andn REG2, 0x7, REG2; \ ldxa [REG1 + REG2] ASI_PHYS_USE_EC, REG1; \ sethi %uhi(_PAGE_PMD_HUGE), REG2; \ brz,pn REG1, FAIL_LABEL; \ sllx REG2, 32, REG2; \ andcc REG1, REG2, %g0; \ be,pn %xcc, 698f; \ sethi %hi(0x400000), REG2; \ 697: brgez,pn REG1, FAIL_LABEL; \ andn REG1, REG2, REG1; \ and VADDR, REG2, REG2; \ ba,pt %xcc, 699f; \ or REG1, REG2, REG1; \ 698: sllx VADDR, 64 - PMD_SHIFT, REG2; \ srlx REG2, 64 - PAGE_SHIFT, REG2; \ andn REG2, 0x7, REG2; \ ldxa [REG1 + REG2] ASI_PHYS_USE_EC, REG1; \ brgez,pn REG1, FAIL_LABEL; \ nop; \ 699: /* PUD has been loaded into REG1, interpret the value, seeing * if it is a HUGE PUD or a normal one. If it is not valid * then jump to FAIL_LABEL. If it is a HUGE PUD, and it * translates to a valid PTE, branch to PTE_LABEL. * * We have to propagate bits [32:22] from the virtual address * to resolve at 4M granularity. */ #if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE) #define USER_PGTABLE_CHECK_PUD_HUGE(VADDR, REG1, REG2, FAIL_LABEL, PTE_LABEL) \ 700: ba 700f; \ nop; \ .section .pud_huge_patch, "ax"; \ .word 700b; \ nop; \ .previous; \ brz,pn REG1, FAIL_LABEL; \ sethi %uhi(_PAGE_PUD_HUGE), REG2; \ sllx REG2, 32, REG2; \ andcc REG1, REG2, %g0; \ be,pt %xcc, 700f; \ sethi %hi(0xffe00000), REG2; \ sllx REG2, 1, REG2; \ brgez,pn REG1, FAIL_LABEL; \ andn REG1, REG2, REG1; \ and VADDR, REG2, REG2; \ brlz,pt REG1, PTE_LABEL; \ or REG1, REG2, REG1; \ 700: #else #define USER_PGTABLE_CHECK_PUD_HUGE(VADDR, REG1, REG2, FAIL_LABEL, PTE_LABEL) \ brz,pn REG1, FAIL_LABEL; \ nop; #endif /* PMD has been loaded into REG1, interpret the value, seeing * if it is a HUGE PMD or a normal one. If it is not valid * then jump to FAIL_LABEL. If it is a HUGE PMD, and it * translates to a valid PTE, branch to PTE_LABEL. * * We have to propagate the 4MB bit of the virtual address * because we are fabricating 8MB pages using 4MB hw pages. */ #if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE) #define USER_PGTABLE_CHECK_PMD_HUGE(VADDR, REG1, REG2, FAIL_LABEL, PTE_LABEL) \ brz,pn REG1, FAIL_LABEL; \ sethi %uhi(_PAGE_PMD_HUGE), REG2; \ sllx REG2, 32, REG2; \ andcc REG1, REG2, %g0; \ be,pt %xcc, 700f; \ sethi %hi(4 * 1024 * 1024), REG2; \ brgez,pn REG1, FAIL_LABEL; \ andn REG1, REG2, REG1; \ and VADDR, REG2, REG2; \ brlz,pt REG1, PTE_LABEL; \ or REG1, REG2, REG1; \ 700: #else #define USER_PGTABLE_CHECK_PMD_HUGE(VADDR, REG1, REG2, FAIL_LABEL, PTE_LABEL) \ brz,pn REG1, FAIL_LABEL; \ nop; #endif /* Do a user page table walk in MMU globals. Leaves final, * valid, PTE value in REG1. Jumps to FAIL_LABEL on early * page table walk termination or if the PTE is not valid. * * Physical base of page tables is in PHYS_PGD which will not * be modified. * * VADDR will not be clobbered, but REG1 and REG2 will. */ #define USER_PGTABLE_WALK_TL1(VADDR, PHYS_PGD, REG1, REG2, FAIL_LABEL) \ sllx VADDR, 64 - (PGDIR_SHIFT + PGDIR_BITS), REG2; \ srlx REG2, 64 - PAGE_SHIFT, REG2; \ andn REG2, 0x7, REG2; \ ldxa [PHYS_PGD + REG2] ASI_PHYS_USE_EC, REG1; \ brz,pn REG1, FAIL_LABEL; \ sllx VADDR, 64 - (PUD_SHIFT + PUD_BITS), REG2; \ srlx REG2, 64 - PAGE_SHIFT, REG2; \ andn REG2, 0x7, REG2; \ ldxa [REG1 + REG2] ASI_PHYS_USE_EC, REG1; \ USER_PGTABLE_CHECK_PUD_HUGE(VADDR, REG1, REG2, FAIL_LABEL, 800f) \ brz,pn REG1, FAIL_LABEL; \ sllx VADDR, 64 - (PMD_SHIFT + PMD_BITS), REG2; \ srlx REG2, 64 - PAGE_SHIFT, REG2; \ andn REG2, 0x7, REG2; \ ldxa [REG1 + REG2] ASI_PHYS_USE_EC, REG1; \ USER_PGTABLE_CHECK_PMD_HUGE(VADDR, REG1, REG2, FAIL_LABEL, 800f) \ sllx VADDR, 64 - PMD_SHIFT, REG2; \ srlx REG2, 64 - PAGE_SHIFT, REG2; \ andn REG2, 0x7, REG2; \ add REG1, REG2, REG1; \ ldxa [REG1] ASI_PHYS_USE_EC, REG1; \ brgez,pn REG1, FAIL_LABEL; \ nop; \ 800: /* Lookup a OBP mapping on VADDR in the prom_trans[] table at TL>0. * If no entry is found, FAIL_LABEL will be branched to. On success * the resulting PTE value will be left in REG1. VADDR is preserved * by this routine. */ #define OBP_TRANS_LOOKUP(VADDR, REG1, REG2, REG3, FAIL_LABEL) \ sethi %hi(prom_trans), REG1; \ or REG1, %lo(prom_trans), REG1; \ 97: ldx [REG1 + 0x00], REG2; \ brz,pn REG2, FAIL_LABEL; \ nop; \ ldx [REG1 + 0x08], REG3; \ add REG2, REG3, REG3; \ cmp REG2, VADDR; \ bgu,pt %xcc, 98f; \ cmp VADDR, REG3; \ bgeu,pt %xcc, 98f; \ ldx [REG1 + 0x10], REG3; \ sub VADDR, REG2, REG2; \ ba,pt %xcc, 99f; \ add REG3, REG2, REG1; \ 98: ba,pt %xcc, 97b; \ add REG1, (3 * 8), REG1; \ 99: /* We use a 32K TSB for the whole kernel, this allows to * handle about 16MB of modules and vmalloc mappings without * incurring many hash conflicts. */ #define KERNEL_TSB_SIZE_BYTES (32 * 1024) #define KERNEL_TSB_NENTRIES \ (KERNEL_TSB_SIZE_BYTES / 16) #define KERNEL_TSB4M_NENTRIES 4096 /* Do a kernel TSB lookup at tl>0 on VADDR+TAG, branch to OK_LABEL * on TSB hit. REG1, REG2, REG3, and REG4 are used as temporaries * and the found TTE will be left in REG1. REG3 and REG4 must * be an even/odd pair of registers. * * VADDR and TAG will be preserved and not clobbered by this macro. */ #define KERN_TSB_LOOKUP_TL1(VADDR, TAG, REG1, REG2, REG3, REG4, OK_LABEL) \ 661: sethi %uhi(swapper_tsb), REG1; \ sethi %hi(swapper_tsb), REG2; \ or REG1, %ulo(swapper_tsb), REG1; \ or REG2, %lo(swapper_tsb), REG2; \ .section .swapper_tsb_phys_patch, "ax"; \ .word 661b; \ .previous; \ sllx REG1, 32, REG1; \ or REG1, REG2, REG1; \ srlx VADDR, PAGE_SHIFT, REG2; \ and REG2, (KERNEL_TSB_NENTRIES - 1), REG2; \ sllx REG2, 4, REG2; \ add REG1, REG2, REG2; \ TSB_LOAD_QUAD(REG2, REG3); \ cmp REG3, TAG; \ be,a,pt %xcc, OK_LABEL; \ mov REG4, REG1; #ifndef CONFIG_DEBUG_PAGEALLOC /* This version uses a trick, the TAG is already (VADDR >> 22) so * we can make use of that for the index computation. */ #define KERN_TSB4M_LOOKUP_TL1(TAG, REG1, REG2, REG3, REG4, OK_LABEL) \ 661: sethi %uhi(swapper_4m_tsb), REG1; \ sethi %hi(swapper_4m_tsb), REG2; \ or REG1, %ulo(swapper_4m_tsb), REG1; \ or REG2, %lo(swapper_4m_tsb), REG2; \ .section .swapper_4m_tsb_phys_patch, "ax"; \ .word 661b; \ .previous; \ sllx REG1, 32, REG1; \ or REG1, REG2, REG1; \ and TAG, (KERNEL_TSB4M_NENTRIES - 1), REG2; \ sllx REG2, 4, REG2; \ add REG1, REG2, REG2; \ TSB_LOAD_QUAD(REG2, REG3); \ cmp REG3, TAG; \ be,a,pt %xcc, OK_LABEL; \ mov REG4, REG1; #endif #endif /* !(_SPARC64_TSB_H) */
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Kbuild | File | 491 B | 0644 |
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agp.h | File | 434 B | 0644 |
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apb.h | File | 1.06 KB | 0644 |
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asm-offsets.h | File | 35 B | 0644 |
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asm-prototypes.h | File | 727 B | 0644 |
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asm.h | File | 1.08 KB | 0644 |
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asmmacro.h | File | 1.16 KB | 0644 |
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atomic.h | File | 219 B | 0644 |
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atomic_32.h | File | 2.26 KB | 0644 |
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atomic_64.h | File | 3.34 KB | 0644 |
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auxio.h | File | 310 B | 0644 |
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auxio_32.h | File | 2.55 KB | 0644 |
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auxio_64.h | File | 3.18 KB | 0644 |
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backoff.h | File | 2.7 KB | 0644 |
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barrier.h | File | 223 B | 0644 |
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barrier_32.h | File | 160 B | 0644 |
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barrier_64.h | File | 1.96 KB | 0644 |
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bbc.h | File | 9.76 KB | 0644 |
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bitext.h | File | 631 B | 0644 |
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bitops.h | File | 219 B | 0644 |
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bitops_32.h | File | 2.79 KB | 0644 |
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bitops_64.h | File | 1.64 KB | 0644 |
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btext.h | File | 145 B | 0644 |
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bug.h | File | 588 B | 0644 |
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bugs.h | File | 404 B | 0644 |
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cache.h | File | 649 B | 0644 |
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cacheflush.h | File | 373 B | 0644 |
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cacheflush_32.h | File | 1.97 KB | 0644 |
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cacheflush_64.h | File | 2.56 KB | 0644 |
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cachetlb_32.h | File | 882 B | 0644 |
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chafsr.h | File | 9.48 KB | 0644 |
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checksum.h | File | 227 B | 0644 |
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checksum_32.h | File | 6.81 KB | 0644 |
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checksum_64.h | File | 4.4 KB | 0644 |
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chmctrl.h | File | 7.91 KB | 0644 |
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clock.h | File | 231 B | 0644 |
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clocksource.h | File | 407 B | 0644 |
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cmpxchg.h | File | 223 B | 0644 |
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cmpxchg_32.h | File | 2.4 KB | 0644 |
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cmpxchg_64.h | File | 5.13 KB | 0644 |
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compat.h | File | 6.45 KB | 0644 |
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compat_signal.h | File | 565 B | 0644 |
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contregs.h | File | 1.9 KB | 0644 |
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cpu_type.h | File | 579 B | 0644 |
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cpudata.h | File | 378 B | 0644 |
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cpudata_32.h | File | 729 B | 0644 |
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cpudata_64.h | File | 1.13 KB | 0644 |
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current.h | File | 991 B | 0644 |
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dcr.h | File | 728 B | 0644 |
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dcu.h | File | 1.48 KB | 0644 |
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delay.h | File | 215 B | 0644 |
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delay_32.h | File | 907 B | 0644 |
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delay_64.h | File | 403 B | 0644 |
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device.h | File | 565 B | 0644 |
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dma-mapping.h | File | 632 B | 0644 |
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dma.h | File | 6.6 KB | 0644 |
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ebus_dma.h | File | 1.07 KB | 0644 |
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ecc.h | File | 4.34 KB | 0644 |
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eeprom.h | File | 254 B | 0644 |
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elf.h | File | 207 B | 0644 |
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elf_32.h | File | 3.19 KB | 0644 |
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elf_64.h | File | 6.47 KB | 0644 |
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estate.h | File | 2.23 KB | 0644 |
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extable_64.h | File | 727 B | 0644 |
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fb.h | File | 680 B | 0644 |
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fbio.h | File | 2.26 KB | 0644 |
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fhc.h | File | 4.43 KB | 0644 |
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floppy.h | File | 219 B | 0644 |
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floppy_32.h | File | 9.74 KB | 0644 |
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floppy_64.h | File | 18.83 KB | 0644 |
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fpumacro.h | File | 710 B | 0644 |
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ftrace.h | File | 800 B | 0644 |
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futex.h | File | 215 B | 0644 |
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futex_32.h | File | 82 B | 0644 |
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futex_64.h | File | 2.15 KB | 0644 |
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hardirq.h | File | 223 B | 0644 |
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hardirq_32.h | File | 334 B | 0644 |
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hardirq_64.h | File | 417 B | 0644 |
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head.h | File | 211 B | 0644 |
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head_32.h | File | 2.56 KB | 0644 |
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head_64.h | File | 2.13 KB | 0644 |
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hibernate.h | File | 421 B | 0644 |
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highmem.h | File | 2.02 KB | 0644 |
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hugetlb.h | File | 2.09 KB | 0644 |
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hvtramp.h | File | 782 B | 0644 |
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hw_irq.h | File | 88 B | 0644 |
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hypervisor.h | File | 110.71 KB | 0644 |
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ide.h | File | 2.19 KB | 0644 |
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idprom.h | File | 656 B | 0644 |
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intr_queue.h | File | 794 B | 0644 |
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io-unit.h | File | 2.41 KB | 0644 |
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io.h | File | 620 B | 0644 |
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io_32.h | File | 3.51 KB | 0644 |
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io_64.h | File | 10.66 KB | 0644 |
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ioctls.h | File | 358 B | 0644 |
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iommu.h | File | 215 B | 0644 |
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iommu_32.h | File | 5.73 KB | 0644 |
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iommu_64.h | File | 2.43 KB | 0644 |
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irq.h | File | 207 B | 0644 |
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irq_32.h | File | 526 B | 0644 |
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irq_64.h | File | 3.06 KB | 0644 |
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irqflags.h | File | 227 B | 0644 |
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irqflags_32.h | File | 1.03 KB | 0644 |
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irqflags_64.h | File | 1.91 KB | 0644 |
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jump_label.h | File | 1.01 KB | 0644 |
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kdebug.h | File | 219 B | 0644 |
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kdebug_32.h | File | 1.99 KB | 0644 |
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kdebug_64.h | File | 393 B | 0644 |
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kgdb.h | File | 1014 B | 0644 |
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kmap_types.h | File | 233 B | 0644 |
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kprobes.h | File | 1.41 KB | 0644 |
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ldc.h | File | 4.37 KB | 0644 |
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leon.h | File | 7.37 KB | 0644 |
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leon_amba.h | File | 8.09 KB | 0644 |
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leon_pci.h | File | 512 B | 0644 |
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lsu.h | File | 1.04 KB | 0644 |
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machines.h | File | 1.5 KB | 0644 |
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mbus.h | File | 2.93 KB | 0644 |
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mc146818rtc.h | File | 298 B | 0644 |
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mc146818rtc_32.h | File | 699 B | 0644 |
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mc146818rtc_64.h | File | 689 B | 0644 |
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mdesc.h | File | 2.99 KB | 0644 |
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memctrl.h | File | 311 B | 0644 |
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mman.h | File | 304 B | 0644 |
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mmu.h | File | 207 B | 0644 |
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mmu_32.h | File | 209 B | 0644 |
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mmu_64.h | File | 3.14 KB | 0644 |
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mmu_context.h | File | 239 B | 0644 |
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mmu_context_32.h | File | 1.07 KB | 0644 |
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mmu_context_64.h | File | 4.15 KB | 0644 |
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mmzone.h | File | 393 B | 0644 |
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msi.h | File | 774 B | 0644 |
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mxcc.h | File | 4.33 KB | 0644 |
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nmi.h | File | 354 B | 0644 |
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ns87303.h | File | 3.22 KB | 0644 |
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obio.h | File | 6.26 KB | 0644 |
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openprom.h | File | 7.3 KB | 0644 |
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oplib.h | File | 215 B | 0644 |
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oplib_32.h | File | 5.92 KB | 0644 |
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oplib_64.h | File | 8.12 KB | 0644 |
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page.h | File | 274 B | 0644 |
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page_32.h | File | 3.91 KB | 0644 |
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page_64.h | File | 4.49 KB | 0644 |
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parport.h | File | 5.68 KB | 0644 |
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pbm.h | File | 1.47 KB | 0644 |
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pci.h | File | 207 B | 0644 |
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pci_32.h | File | 1.09 KB | 0644 |
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pci_64.h | File | 1.49 KB | 0644 |
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pcic.h | File | 5.77 KB | 0644 |
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pcr.h | File | 1.85 KB | 0644 |
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percpu.h | File | 219 B | 0644 |
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percpu_32.h | File | 168 B | 0644 |
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percpu_64.h | File | 515 B | 0644 |
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perf_event.h | File | 802 B | 0644 |
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pgalloc.h | File | 223 B | 0644 |
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pgalloc_32.h | File | 1.91 KB | 0644 |
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pgalloc_64.h | File | 2.85 KB | 0644 |
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pgtable.h | File | 223 B | 0644 |
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pgtable_32.h | File | 11.35 KB | 0644 |
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pgtable_64.h | File | 30.71 KB | 0644 |
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pgtsrmmu.h | File | 6.05 KB | 0644 |
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pil.h | File | 1.08 KB | 0644 |
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processor.h | File | 231 B | 0644 |
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processor_32.h | File | 3.13 KB | 0644 |
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processor_64.h | File | 7.58 KB | 0644 |
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prom.h | File | 2.02 KB | 0644 |
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psr.h | File | 1.38 KB | 0644 |
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ptrace.h | File | 4.19 KB | 0644 |
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qrwlock.h | File | 205 B | 0644 |
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qspinlock.h | File | 215 B | 0644 |
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ross.h | File | 5.52 KB | 0644 |
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sbi.h | File | 3.34 KB | 0644 |
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scratchpad.h | File | 547 B | 0644 |
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seccomp.h | File | 225 B | 0644 |
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sections.h | File | 289 B | 0644 |
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setup.h | File | 1.52 KB | 0644 |
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sfafsr.h | File | 3.14 KB | 0644 |
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sfp-machine.h | File | 239 B | 0644 |
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sfp-machine_32.h | File | 6.79 KB | 0644 |
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sfp-machine_64.h | File | 3.1 KB | 0644 |
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shmparam.h | File | 227 B | 0644 |
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shmparam_32.h | File | 253 B | 0644 |
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shmparam_64.h | File | 306 B | 0644 |
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sigcontext.h | File | 2.55 KB | 0644 |
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signal.h | File | 835 B | 0644 |
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smp.h | File | 207 B | 0644 |
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smp_32.h | File | 3.29 KB | 0644 |
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smp_64.h | File | 1.84 KB | 0644 |
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sparsemem.h | File | 349 B | 0644 |
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spinlock.h | File | 227 B | 0644 |
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spinlock_32.h | File | 4.22 KB | 0644 |
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spinlock_64.h | File | 409 B | 0644 |
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spinlock_types.h | File | 549 B | 0644 |
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spitfire.h | File | 9.73 KB | 0644 |
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stacktrace.h | File | 166 B | 0644 |
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starfire.h | File | 418 B | 0644 |
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string.h | File | 1.13 KB | 0644 |
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string_32.h | File | 405 B | 0644 |
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string_64.h | File | 505 B | 0644 |
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sunbpp.h | File | 3.27 KB | 0644 |
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swift.h | File | 3.07 KB | 0644 |
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switch_to.h | File | 231 B | 0644 |
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switch_to_32.h | File | 3.53 KB | 0644 |
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switch_to_64.h | File | 2.58 KB | 0644 |
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syscall.h | File | 3.41 KB | 0644 |
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syscalls.h | File | 307 B | 0644 |
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termbits.h | File | 198 B | 0644 |
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termios.h | File | 4.94 KB | 0644 |
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thread_info.h | File | 239 B | 0644 |
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thread_info_32.h | File | 3.66 KB | 0644 |
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thread_info_64.h | File | 7.84 KB | 0644 |
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timer.h | File | 215 B | 0644 |
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timer_32.h | File | 1.18 KB | 0644 |
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timer_64.h | File | 2.37 KB | 0644 |
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timex.h | File | 215 B | 0644 |
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timex_32.h | File | 266 B | 0644 |
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timex_64.h | File | 423 B | 0644 |
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tlb.h | File | 207 B | 0644 |
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tlb_32.h | File | 520 B | 0644 |
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tlb_64.h | File | 913 B | 0644 |
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tlbflush.h | File | 227 B | 0644 |
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tlbflush_32.h | File | 621 B | 0644 |
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tlbflush_64.h | File | 1.73 KB | 0644 |
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topology.h | File | 227 B | 0644 |
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topology_32.h | File | 170 B | 0644 |
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topology_64.h | File | 1.51 KB | 0644 |
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trap_block.h | File | 6.51 KB | 0644 |
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traps.h | File | 577 B | 0644 |
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tsb.h | File | 12.17 KB | 0644 |
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tsunami.h | File | 1.85 KB | 0644 |
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ttable.h | File | 20.08 KB | 0644 |
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turbosparc.h | File | 3.78 KB | 0644 |
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uaccess.h | File | 363 B | 0644 |
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uaccess_32.h | File | 8.31 KB | 0644 |
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uaccess_64.h | File | 6.05 KB | 0644 |
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unaligned.h | File | 339 B | 0644 |
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unistd.h | File | 1.37 KB | 0644 |
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upa.h | File | 3.72 KB | 0644 |
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uprobes.h | File | 1.86 KB | 0644 |
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user.h | File | 102 B | 0644 |
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vaddrs.h | File | 2.02 KB | 0644 |
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vdso.h | File | 662 B | 0644 |
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vga.h | File | 964 B | 0644 |
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viking.h | File | 8.14 KB | 0644 |
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vio.h | File | 11.81 KB | 0644 |
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visasm.h | File | 1.51 KB | 0644 |
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vvar.h | File | 1.52 KB | 0644 |
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winmacro.h | File | 4.66 KB | 0644 |
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xor.h | File | 207 B | 0644 |
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xor_32.h | File | 7.31 KB | 0644 |
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xor_64.h | File | 2.5 KB | 0644 |
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