/* * Copyright 2010 Tilera Corporation. All Rights Reserved. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation, version 2. * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or * NON INFRINGEMENT. See the GNU General Public License for * more details. */ #ifndef _ASM_TILE_CACHEFLUSH_H #define _ASM_TILE_CACHEFLUSH_H #include <arch/chip.h> /* Keep includes the same across arches. */ #include <linux/mm.h> #include <linux/cache.h> #include <arch/icache.h> /* Caches are physically-indexed and so don't need special treatment */ #define flush_cache_all() do { } while (0) #define flush_cache_mm(mm) do { } while (0) #define flush_cache_dup_mm(mm) do { } while (0) #define flush_cache_range(vma, start, end) do { } while (0) #define flush_cache_page(vma, vmaddr, pfn) do { } while (0) #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0 #define flush_dcache_page(page) do { } while (0) #define flush_dcache_mmap_lock(mapping) do { } while (0) #define flush_dcache_mmap_unlock(mapping) do { } while (0) #define flush_cache_vmap(start, end) do { } while (0) #define flush_cache_vunmap(start, end) do { } while (0) #define flush_icache_page(vma, pg) do { } while (0) #define flush_icache_user_range(vma, pg, adr, len) do { } while (0) /* Flush the icache just on this cpu */ extern void __flush_icache_range(unsigned long start, unsigned long end); /* Flush the entire icache on this cpu. */ #define __flush_icache() __flush_icache_range(0, CHIP_L1I_CACHE_SIZE()) #ifdef CONFIG_SMP /* * When the kernel writes to its own text we need to do an SMP * broadcast to make the L1I coherent everywhere. This includes * module load and single step. */ extern void flush_icache_range(unsigned long start, unsigned long end); #else #define flush_icache_range __flush_icache_range #endif /* * An update to an executable user page requires icache flushing. * We could carefully update only tiles that are running this process, * and rely on the fact that we flush the icache on every context * switch to avoid doing extra work here. But for now, I'll be * conservative and just do a global icache flush. */ static inline void copy_to_user_page(struct vm_area_struct *vma, struct page *page, unsigned long vaddr, void *dst, void *src, int len) { memcpy(dst, src, len); if (vma->vm_flags & VM_EXEC) { flush_icache_range((unsigned long) dst, (unsigned long) dst + len); } } #define copy_from_user_page(vma, page, vaddr, dst, src, len) \ memcpy((dst), (src), (len)) /* Flush a VA range; pads to L2 cacheline boundaries. */ static inline void __flush_buffer(void *buffer, size_t size) { char *next = (char *)((long)buffer & -L2_CACHE_BYTES); char *finish = (char *)L2_CACHE_ALIGN((long)buffer + size); while (next < finish) { __insn_flush(next); next += CHIP_FLUSH_STRIDE(); } } /* Flush & invalidate a VA range; pads to L2 cacheline boundaries. */ static inline void __finv_buffer(void *buffer, size_t size) { char *next = (char *)((long)buffer & -L2_CACHE_BYTES); char *finish = (char *)L2_CACHE_ALIGN((long)buffer + size); while (next < finish) { __insn_finv(next); next += CHIP_FINV_STRIDE(); } } /* * Flush a locally-homecached VA range and wait for the evicted * cachelines to hit memory. */ static inline void flush_buffer_local(void *buffer, size_t size) { __flush_buffer(buffer, size); mb_incoherent(); } /* * Flush and invalidate a locally-homecached VA range and wait for the * evicted cachelines to hit memory. */ static inline void finv_buffer_local(void *buffer, size_t size) { __finv_buffer(buffer, size); mb_incoherent(); } #ifdef __tilepro__ /* Invalidate a VA range; pads to L2 cacheline boundaries. */ static inline void __inv_buffer(void *buffer, size_t size) { char *next = (char *)((long)buffer & -L2_CACHE_BYTES); char *finish = (char *)L2_CACHE_ALIGN((long)buffer + size); while (next < finish) { __insn_inv(next); next += CHIP_INV_STRIDE(); } } /* Invalidate a VA range and wait for it to be complete. */ static inline void inv_buffer(void *buffer, size_t size) { __inv_buffer(buffer, size); mb(); } #endif /* * Flush and invalidate a VA range that is homed remotely, waiting * until the memory controller holds the flushed values. If "hfh" is * true, we will do a more expensive flush involving additional loads * to make sure we have touched all the possible home cpus of a buffer * that is homed with "hash for home". */ void finv_buffer_remote(void *buffer, size_t size, int hfh); /* * On SMP systems, when the scheduler does migration-cost autodetection, * it needs a way to flush as much of the CPU's caches as possible: * * TODO: fill this in! */ static inline void sched_cacheflush(void) { } #endif /* _ASM_TILE_CACHEFLUSH_H */
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Kbuild | File | 439 B | 0644 |
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asm-offsets.h | File | 35 B | 0644 |
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atomic.h | File | 5.14 KB | 0644 |
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atomic_32.h | File | 8.91 KB | 0644 |
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atomic_64.h | File | 5.51 KB | 0644 |
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backtrace.h | File | 3.98 KB | 0644 |
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barrier.h | File | 2.89 KB | 0644 |
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bitops.h | File | 2.37 KB | 0644 |
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bitops_32.h | File | 4.01 KB | 0644 |
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bitops_64.h | File | 2.67 KB | 0644 |
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cache.h | File | 2.6 KB | 0644 |
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cacheflush.h | File | 4.94 KB | 0644 |
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checksum.h | File | 1.23 KB | 0644 |
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cmpxchg.h | File | 3.47 KB | 0644 |
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compat.h | File | 7.38 KB | 0644 |
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current.h | File | 947 B | 0644 |
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delay.h | File | 1.1 KB | 0644 |
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device.h | File | 978 B | 0644 |
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div64.h | File | 319 B | 0644 |
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dma-mapping.h | File | 1.82 KB | 0644 |
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dma.h | File | 762 B | 0644 |
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elf.h | File | 5.42 KB | 0644 |
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fixmap.h | File | 2.73 KB | 0644 |
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ftrace.h | File | 1.08 KB | 0644 |
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futex.h | File | 4.23 KB | 0644 |
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hardirq.h | File | 1.28 KB | 0644 |
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hardwall.h | File | 1.08 KB | 0644 |
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highmem.h | File | 2.08 KB | 0644 |
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homecache.h | File | 4.21 KB | 0644 |
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hugetlb.h | File | 3.04 KB | 0644 |
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hv_driver.h | File | 1.92 KB | 0644 |
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ide.h | File | 758 B | 0644 |
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insn.h | File | 1.79 KB | 0644 |
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io.h | File | 12.43 KB | 0644 |
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irq.h | File | 3.11 KB | 0644 |
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irq_work.h | File | 283 B | 0644 |
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irqflags.h | File | 10.55 KB | 0644 |
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jump_label.h | File | 1.47 KB | 0644 |
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kdebug.h | File | 769 B | 0644 |
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kexec.h | File | 2.23 KB | 0644 |
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kgdb.h | File | 1.99 KB | 0644 |
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kmap_types.h | File | 1.02 KB | 0644 |
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kprobes.h | File | 2.19 KB | 0644 |
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linkage.h | File | 1.46 KB | 0644 |
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mmu.h | File | 965 B | 0644 |
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mmu_context.h | File | 4.5 KB | 0644 |
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mmzone.h | File | 2.07 KB | 0644 |
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module.h | File | 1.12 KB | 0644 |
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page.h | File | 10.32 KB | 0644 |
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pci.h | File | 6.58 KB | 0644 |
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percpu.h | File | 1.79 KB | 0644 |
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perf_event.h | File | 766 B | 0644 |
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pgalloc.h | File | 4.76 KB | 0644 |
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pgtable.h | File | 15.66 KB | 0644 |
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pgtable_32.h | File | 4.08 KB | 0644 |
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pgtable_64.h | File | 5.11 KB | 0644 |
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pmc.h | File | 2.15 KB | 0644 |
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processor.h | File | 10.62 KB | 0644 |
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ptrace.h | File | 2.96 KB | 0644 |
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sections.h | File | 1.37 KB | 0644 |
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setup.h | File | 1.63 KB | 0644 |
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sigframe.h | File | 956 B | 0644 |
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signal.h | File | 1.07 KB | 0644 |
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smp.h | File | 3.98 KB | 0644 |
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spinlock.h | File | 741 B | 0644 |
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spinlock_32.h | File | 2.9 KB | 0644 |
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spinlock_64.h | File | 3.88 KB | 0644 |
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spinlock_types.h | File | 1.58 KB | 0644 |
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stack.h | File | 2.59 KB | 0644 |
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string.h | File | 1.19 KB | 0644 |
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switch_to.h | File | 2.75 KB | 0644 |
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syscall.h | File | 2.88 KB | 0644 |
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syscalls.h | File | 2.35 KB | 0644 |
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thread_info.h | File | 5.54 KB | 0644 |
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tile-desc.h | File | 650 B | 0644 |
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tile-desc_32.h | File | 12.54 KB | 0644 |
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tile-desc_64.h | File | 10.83 KB | 0644 |
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timex.h | File | 1.71 KB | 0644 |
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tlb.h | File | 878 B | 0644 |
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tlbflush.h | File | 3.99 KB | 0644 |
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topology.h | File | 1.52 KB | 0644 |
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traps.h | File | 2.44 KB | 0644 |
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uaccess.h | File | 12.77 KB | 0644 |
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unaligned.h | File | 1.56 KB | 0644 |
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unistd.h | File | 777 B | 0644 |
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user.h | File | 717 B | 0644 |
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vdso.h | File | 1.84 KB | 0644 |
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vga.h | File | 1.05 KB | 0644 |
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word-at-a-time.h | File | 1.07 KB | 0644 |
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