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/*
 * Copyright 2010 Tilera Corporation. All Rights Reserved.
 *
 *   This program is free software; you can redistribute it and/or
 *   modify it under the terms of the GNU General Public License
 *   as published by the Free Software Foundation, version 2.
 *
 *   This program is distributed in the hope that it will be useful, but
 *   WITHOUT ANY WARRANTY; without even the implied warranty of
 *   MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
 *   NON INFRINGEMENT.  See the GNU General Public License for
 *   more details.
 */

#ifndef _ASM_TILE_TLBFLUSH_H
#define _ASM_TILE_TLBFLUSH_H

#include <linux/mm.h>
#include <linux/sched.h>
#include <linux/smp.h>
#include <asm/cacheflush.h>
#include <asm/page.h>
#include <hv/hypervisor.h>

/*
 * Rather than associating each mm with its own ASID, we just use
 * ASIDs to allow us to lazily flush the TLB when we switch mms.
 * This way we only have to do an actual TLB flush on mm switch
 * every time we wrap ASIDs, not every single time we switch.
 *
 * FIXME: We might improve performance by keeping ASIDs around
 * properly, though since the hypervisor direct-maps VAs to TSB
 * entries, we're likely to have lost at least the executable page
 * mappings by the time we switch back to the original mm.
 */
DECLARE_PER_CPU(int, current_asid);

/* The hypervisor tells us what ASIDs are available to us. */
extern int min_asid, max_asid;

/* Pass as vma pointer for non-executable mapping, if no vma available. */
#define FLUSH_NONEXEC ((struct vm_area_struct *)-1UL)

/* Flush a single user page on this cpu. */
static inline void local_flush_tlb_page(struct vm_area_struct *vma,
					unsigned long addr,
					unsigned long page_size)
{
	int rc = hv_flush_page(addr, page_size);
	if (rc < 0)
		panic("hv_flush_page(%#lx,%#lx) failed: %d",
		      addr, page_size, rc);
	if (!vma || (vma != FLUSH_NONEXEC && (vma->vm_flags & VM_EXEC)))
		__flush_icache();
}

/* Flush range of user pages on this cpu. */
static inline void local_flush_tlb_pages(struct vm_area_struct *vma,
					 unsigned long addr,
					 unsigned long page_size,
					 unsigned long len)
{
	int rc = hv_flush_pages(addr, page_size, len);
	if (rc < 0)
		panic("hv_flush_pages(%#lx,%#lx,%#lx) failed: %d",
		      addr, page_size, len, rc);
	if (!vma || (vma != FLUSH_NONEXEC && (vma->vm_flags & VM_EXEC)))
		__flush_icache();
}

/* Flush all user pages on this cpu. */
static inline void local_flush_tlb(void)
{
	int rc = hv_flush_all(1);   /* preserve global mappings */
	if (rc < 0)
		panic("hv_flush_all(1) failed: %d", rc);
	__flush_icache();
}

/*
 * Global pages have to be flushed a bit differently. Not a real
 * performance problem because this does not happen often.
 */
static inline void local_flush_tlb_all(void)
{
	int i;
	for (i = 0; ; ++i) {
		HV_VirtAddrRange r = hv_inquire_virtual(i);
		if (r.size == 0)
			break;
		local_flush_tlb_pages(NULL, r.start, PAGE_SIZE, r.size);
		local_flush_tlb_pages(NULL, r.start, HPAGE_SIZE, r.size);
	}
}

/*
 * TLB flushing:
 *
 *  - flush_tlb() flushes the current mm struct TLBs
 *  - flush_tlb_all() flushes all processes TLBs
 *  - flush_tlb_mm(mm) flushes the specified mm context TLB's
 *  - flush_tlb_page(vma, vmaddr) flushes one page
 *  - flush_tlb_range(vma, start, end) flushes a range of pages
 *  - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
 *  - flush_tlb_others(cpumask, mm, va) flushes TLBs on other cpus
 *
 * Here (as in vm_area_struct), "end" means the first byte after
 * our end address.
 */

extern void flush_tlb_all(void);
extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
extern void flush_tlb_current_task(void);
extern void flush_tlb_mm(struct mm_struct *);
extern void flush_tlb_page(struct vm_area_struct *, unsigned long);
extern void flush_tlb_page_mm(struct vm_area_struct *,
			      struct mm_struct *, unsigned long);
extern void flush_tlb_range(struct vm_area_struct *,
			    unsigned long start, unsigned long end);

#define flush_tlb()     flush_tlb_current_task()

#endif /* _ASM_TILE_TLBFLUSH_H */

Filemanager

Name Type Size Permission Actions
Kbuild File 439 B 0644
asm-offsets.h File 35 B 0644
atomic.h File 5.14 KB 0644
atomic_32.h File 8.91 KB 0644
atomic_64.h File 5.51 KB 0644
backtrace.h File 3.98 KB 0644
barrier.h File 2.89 KB 0644
bitops.h File 2.37 KB 0644
bitops_32.h File 4.01 KB 0644
bitops_64.h File 2.67 KB 0644
cache.h File 2.6 KB 0644
cacheflush.h File 4.94 KB 0644
checksum.h File 1.23 KB 0644
cmpxchg.h File 3.47 KB 0644
compat.h File 7.38 KB 0644
current.h File 947 B 0644
delay.h File 1.1 KB 0644
device.h File 978 B 0644
div64.h File 319 B 0644
dma-mapping.h File 1.82 KB 0644
dma.h File 762 B 0644
elf.h File 5.42 KB 0644
fixmap.h File 2.73 KB 0644
ftrace.h File 1.08 KB 0644
futex.h File 4.23 KB 0644
hardirq.h File 1.28 KB 0644
hardwall.h File 1.08 KB 0644
highmem.h File 2.08 KB 0644
homecache.h File 4.21 KB 0644
hugetlb.h File 3.04 KB 0644
hv_driver.h File 1.92 KB 0644
ide.h File 758 B 0644
insn.h File 1.79 KB 0644
io.h File 12.43 KB 0644
irq.h File 3.11 KB 0644
irq_work.h File 283 B 0644
irqflags.h File 10.55 KB 0644
jump_label.h File 1.47 KB 0644
kdebug.h File 769 B 0644
kexec.h File 2.23 KB 0644
kgdb.h File 1.99 KB 0644
kmap_types.h File 1.02 KB 0644
kprobes.h File 2.19 KB 0644
linkage.h File 1.46 KB 0644
mmu.h File 965 B 0644
mmu_context.h File 4.5 KB 0644
mmzone.h File 2.07 KB 0644
module.h File 1.12 KB 0644
page.h File 10.32 KB 0644
pci.h File 6.58 KB 0644
percpu.h File 1.79 KB 0644
perf_event.h File 766 B 0644
pgalloc.h File 4.76 KB 0644
pgtable.h File 15.66 KB 0644
pgtable_32.h File 4.08 KB 0644
pgtable_64.h File 5.11 KB 0644
pmc.h File 2.15 KB 0644
processor.h File 10.62 KB 0644
ptrace.h File 2.96 KB 0644
sections.h File 1.37 KB 0644
setup.h File 1.63 KB 0644
sigframe.h File 956 B 0644
signal.h File 1.07 KB 0644
smp.h File 3.98 KB 0644
spinlock.h File 741 B 0644
spinlock_32.h File 2.9 KB 0644
spinlock_64.h File 3.88 KB 0644
spinlock_types.h File 1.58 KB 0644
stack.h File 2.59 KB 0644
string.h File 1.19 KB 0644
switch_to.h File 2.75 KB 0644
syscall.h File 2.88 KB 0644
syscalls.h File 2.35 KB 0644
thread_info.h File 5.54 KB 0644
tile-desc.h File 650 B 0644
tile-desc_32.h File 12.54 KB 0644
tile-desc_64.h File 10.83 KB 0644
timex.h File 1.71 KB 0644
tlb.h File 878 B 0644
tlbflush.h File 3.99 KB 0644
topology.h File 1.52 KB 0644
traps.h File 2.44 KB 0644
uaccess.h File 12.77 KB 0644
unaligned.h File 1.56 KB 0644
unistd.h File 777 B 0644
user.h File 717 B 0644
vdso.h File 1.84 KB 0644
vga.h File 1.05 KB 0644
word-at-a-time.h File 1.07 KB 0644