/* SPDX-License-Identifier: GPL-2.0 */ #ifndef __UM_CACHE_H #define __UM_CACHE_H #if defined(CONFIG_UML_X86) && !defined(CONFIG_64BIT) # define L1_CACHE_SHIFT (CONFIG_X86_L1_CACHE_SHIFT) #elif defined(CONFIG_UML_X86) /* 64-bit */ # define L1_CACHE_SHIFT 6 /* Should be 7 on Intel */ #else /* XXX: this was taken from x86, now it's completely random. Luckily only * affects SMP padding. */ # define L1_CACHE_SHIFT 5 #endif #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) #endif
Name | Type | Size | Permission | Actions |
---|---|---|---|---|
Kbuild | File | 702 B | 0644 |
|
a.out-core.h | File | 695 B | 0644 |
|
bugs.h | File | 111 B | 0644 |
|
cache.h | File | 483 B | 0644 |
|
common.lds.S | File | 1.76 KB | 0644 |
|
dma.h | File | 180 B | 0644 |
|
fixmap.h | File | 1.63 KB | 0644 |
|
hardirq.h | File | 558 B | 0644 |
|
io.h | File | 339 B | 0644 |
|
irq.h | File | 493 B | 0644 |
|
irqflags.h | File | 865 B | 0644 |
|
kmap_types.h | File | 219 B | 0644 |
|
kvm_para.h | File | 34 B | 0644 |
|
mmu.h | File | 558 B | 0644 |
|
mmu_context.h | File | 1.87 KB | 0644 |
|
page.h | File | 3.15 KB | 0644 |
|
pgalloc.h | File | 1.46 KB | 0644 |
|
pgtable-2level.h | File | 1.32 KB | 0644 |
|
pgtable-3level.h | File | 2.88 KB | 0644 |
|
pgtable.h | File | 9.88 KB | 0644 |
|
processor-generic.h | File | 1.87 KB | 0644 |
|
ptrace-generic.h | File | 1.13 KB | 0644 |
|
sections.h | File | 219 B | 0644 |
|
setup.h | File | 273 B | 0644 |
|
smp.h | File | 121 B | 0644 |
|
stacktrace.h | File | 1.06 KB | 0644 |
|
syscall-generic.h | File | 2.67 KB | 0644 |
|
sysrq.h | File | 182 B | 0644 |
|
thread_info.h | File | 2.15 KB | 0644 |
|
timex.h | File | 151 B | 0644 |
|
tlb.h | File | 4.23 KB | 0644 |
|
tlbflush.h | File | 978 B | 0644 |
|
uaccess.h | File | 1.65 KB | 0644 |
|
unwind.h | File | 213 B | 0644 |
|