/* SPDX-License-Identifier: GPL-2.0 */ #ifndef _ASM_X86_MCE_H #define _ASM_X86_MCE_H #include <uapi/asm/mce.h> /* * Machine Check support for x86 */ /* MCG_CAP register defines */ #define MCG_BANKCNT_MASK 0xff /* Number of Banks */ #define MCG_CTL_P (1ULL<<8) /* MCG_CTL register available */ #define MCG_EXT_P (1ULL<<9) /* Extended registers available */ #define MCG_CMCI_P (1ULL<<10) /* CMCI supported */ #define MCG_EXT_CNT_MASK 0xff0000 /* Number of Extended registers */ #define MCG_EXT_CNT_SHIFT 16 #define MCG_EXT_CNT(c) (((c) & MCG_EXT_CNT_MASK) >> MCG_EXT_CNT_SHIFT) #define MCG_SER_P (1ULL<<24) /* MCA recovery/new status bits */ #define MCG_ELOG_P (1ULL<<26) /* Extended error log supported */ #define MCG_LMCE_P (1ULL<<27) /* Local machine check supported */ /* MCG_STATUS register defines */ #define MCG_STATUS_RIPV (1ULL<<0) /* restart ip valid */ #define MCG_STATUS_EIPV (1ULL<<1) /* ip points to correct instruction */ #define MCG_STATUS_MCIP (1ULL<<2) /* machine check in progress */ #define MCG_STATUS_LMCES (1ULL<<3) /* LMCE signaled */ /* MCG_EXT_CTL register defines */ #define MCG_EXT_CTL_LMCE_EN (1ULL<<0) /* Enable LMCE */ /* MCi_STATUS register defines */ #define MCI_STATUS_VAL (1ULL<<63) /* valid error */ #define MCI_STATUS_OVER (1ULL<<62) /* previous errors lost */ #define MCI_STATUS_UC (1ULL<<61) /* uncorrected error */ #define MCI_STATUS_EN (1ULL<<60) /* error enabled */ #define MCI_STATUS_MISCV (1ULL<<59) /* misc error reg. valid */ #define MCI_STATUS_ADDRV (1ULL<<58) /* addr reg. valid */ #define MCI_STATUS_PCC (1ULL<<57) /* processor context corrupt */ #define MCI_STATUS_S (1ULL<<56) /* Signaled machine check */ #define MCI_STATUS_AR (1ULL<<55) /* Action required */ /* AMD-specific bits */ #define MCI_STATUS_TCC (1ULL<<55) /* Task context corrupt */ #define MCI_STATUS_SYNDV (1ULL<<53) /* synd reg. valid */ #define MCI_STATUS_DEFERRED (1ULL<<44) /* uncorrected error, deferred exception */ #define MCI_STATUS_POISON (1ULL<<43) /* access poisonous data */ /* * McaX field if set indicates a given bank supports MCA extensions: * - Deferred error interrupt type is specifiable by bank. * - MCx_MISC0[BlkPtr] field indicates presence of extended MISC registers, * But should not be used to determine MSR numbers. * - TCC bit is present in MCx_STATUS. */ #define MCI_CONFIG_MCAX 0x1 #define MCI_IPID_MCATYPE 0xFFFF0000 #define MCI_IPID_HWID 0xFFF /* * Note that the full MCACOD field of IA32_MCi_STATUS MSR is * bits 15:0. But bit 12 is the 'F' bit, defined for corrected * errors to indicate that errors are being filtered by hardware. * We should mask out bit 12 when looking for specific signatures * of uncorrected errors - so the F bit is deliberately skipped * in this #define. */ #define MCACOD 0xefff /* MCA Error Code */ /* Architecturally defined codes from SDM Vol. 3B Chapter 15 */ #define MCACOD_SCRUB 0x00C0 /* 0xC0-0xCF Memory Scrubbing */ #define MCACOD_SCRUBMSK 0xeff0 /* Skip bit 12 ('F' bit) */ #define MCACOD_L3WB 0x017A /* L3 Explicit Writeback */ #define MCACOD_DATA 0x0134 /* Data Load */ #define MCACOD_INSTR 0x0150 /* Instruction Fetch */ /* MCi_MISC register defines */ #define MCI_MISC_ADDR_LSB(m) ((m) & 0x3f) #define MCI_MISC_ADDR_MODE(m) (((m) >> 6) & 7) #define MCI_MISC_ADDR_SEGOFF 0 /* segment offset */ #define MCI_MISC_ADDR_LINEAR 1 /* linear address */ #define MCI_MISC_ADDR_PHYS 2 /* physical address */ #define MCI_MISC_ADDR_MEM 3 /* memory address */ #define MCI_MISC_ADDR_GENERIC 7 /* generic */ /* CTL2 register defines */ #define MCI_CTL2_CMCI_EN (1ULL << 30) #define MCI_CTL2_CMCI_THRESHOLD_MASK 0x7fffULL #define MCJ_CTX_MASK 3 #define MCJ_CTX(flags) ((flags) & MCJ_CTX_MASK) #define MCJ_CTX_RANDOM 0 /* inject context: random */ #define MCJ_CTX_PROCESS 0x1 /* inject context: process */ #define MCJ_CTX_IRQ 0x2 /* inject context: IRQ */ #define MCJ_NMI_BROADCAST 0x4 /* do NMI broadcasting */ #define MCJ_EXCEPTION 0x8 /* raise as exception */ #define MCJ_IRQ_BROADCAST 0x10 /* do IRQ broadcasting */ #define MCE_OVERFLOW 0 /* bit 0 in flags means overflow */ #define MCE_LOG_LEN 32 #define MCE_LOG_SIGNATURE "MACHINECHECK" /* AMD Scalable MCA */ #define MSR_AMD64_SMCA_MC0_CTL 0xc0002000 #define MSR_AMD64_SMCA_MC0_STATUS 0xc0002001 #define MSR_AMD64_SMCA_MC0_ADDR 0xc0002002 #define MSR_AMD64_SMCA_MC0_MISC0 0xc0002003 #define MSR_AMD64_SMCA_MC0_CONFIG 0xc0002004 #define MSR_AMD64_SMCA_MC0_IPID 0xc0002005 #define MSR_AMD64_SMCA_MC0_SYND 0xc0002006 #define MSR_AMD64_SMCA_MC0_DESTAT 0xc0002008 #define MSR_AMD64_SMCA_MC0_DEADDR 0xc0002009 #define MSR_AMD64_SMCA_MC0_MISC1 0xc000200a #define MSR_AMD64_SMCA_MCx_CTL(x) (MSR_AMD64_SMCA_MC0_CTL + 0x10*(x)) #define MSR_AMD64_SMCA_MCx_STATUS(x) (MSR_AMD64_SMCA_MC0_STATUS + 0x10*(x)) #define MSR_AMD64_SMCA_MCx_ADDR(x) (MSR_AMD64_SMCA_MC0_ADDR + 0x10*(x)) #define MSR_AMD64_SMCA_MCx_MISC(x) (MSR_AMD64_SMCA_MC0_MISC0 + 0x10*(x)) #define MSR_AMD64_SMCA_MCx_CONFIG(x) (MSR_AMD64_SMCA_MC0_CONFIG + 0x10*(x)) #define MSR_AMD64_SMCA_MCx_IPID(x) (MSR_AMD64_SMCA_MC0_IPID + 0x10*(x)) #define MSR_AMD64_SMCA_MCx_SYND(x) (MSR_AMD64_SMCA_MC0_SYND + 0x10*(x)) #define MSR_AMD64_SMCA_MCx_DESTAT(x) (MSR_AMD64_SMCA_MC0_DESTAT + 0x10*(x)) #define MSR_AMD64_SMCA_MCx_DEADDR(x) (MSR_AMD64_SMCA_MC0_DEADDR + 0x10*(x)) #define MSR_AMD64_SMCA_MCx_MISCy(x, y) ((MSR_AMD64_SMCA_MC0_MISC1 + y) + (0x10*(x))) /* * This structure contains all data related to the MCE log. Also * carries a signature to make it easier to find from external * debugging tools. Each entry is only valid when its finished flag * is set. */ struct mce_log_buffer { char signature[12]; /* "MACHINECHECK" */ unsigned len; /* = MCE_LOG_LEN */ unsigned next; unsigned flags; unsigned recordlen; /* length of struct mce */ struct mce entry[MCE_LOG_LEN]; }; struct mca_config { bool dont_log_ce; bool cmci_disabled; bool lmce_disabled; bool ignore_ce; bool disabled; bool ser; bool recovery; bool bios_cmci_threshold; u8 banks; s8 bootlog; int tolerant; int monarch_timeout; int panic_timeout; u32 rip_msr; }; struct mce_vendor_flags { /* * Indicates that overflow conditions are not fatal, when set. */ __u64 overflow_recov : 1, /* * (AMD) SUCCOR stands for S/W UnCorrectable error COntainment and * Recovery. It indicates support for data poisoning in HW and deferred * error interrupts. */ succor : 1, /* * (AMD) SMCA: This bit indicates support for Scalable MCA which expands * the register space for each MCA bank and also increases number of * banks. Also, to accommodate the new banks and registers, the MCA * register space is moved to a new MSR range. */ smca : 1, __reserved_0 : 61; }; struct mca_msr_regs { u32 (*ctl) (int bank); u32 (*status) (int bank); u32 (*addr) (int bank); u32 (*misc) (int bank); }; extern struct mce_vendor_flags mce_flags; extern struct mca_msr_regs msr_ops; enum mce_notifier_prios { MCE_PRIO_FIRST = INT_MAX, MCE_PRIO_SRAO = INT_MAX - 1, MCE_PRIO_EXTLOG = INT_MAX - 2, MCE_PRIO_NFIT = INT_MAX - 3, MCE_PRIO_EDAC = INT_MAX - 4, MCE_PRIO_MCELOG = 1, MCE_PRIO_LOWEST = 0, }; struct notifier_block; extern void mce_register_decode_chain(struct notifier_block *nb); extern void mce_unregister_decode_chain(struct notifier_block *nb); #include <linux/percpu.h> #include <linux/atomic.h> extern int mce_p5_enabled; #ifdef CONFIG_X86_MCE int mcheck_init(void); void mcheck_cpu_init(struct cpuinfo_x86 *c); void mcheck_cpu_clear(struct cpuinfo_x86 *c); void mcheck_vendor_init_severity(void); #else static inline int mcheck_init(void) { return 0; } static inline void mcheck_cpu_init(struct cpuinfo_x86 *c) {} static inline void mcheck_cpu_clear(struct cpuinfo_x86 *c) {} static inline void mcheck_vendor_init_severity(void) {} #endif #ifdef CONFIG_X86_ANCIENT_MCE void intel_p5_mcheck_init(struct cpuinfo_x86 *c); void winchip_mcheck_init(struct cpuinfo_x86 *c); static inline void enable_p5_mce(void) { mce_p5_enabled = 1; } #else static inline void intel_p5_mcheck_init(struct cpuinfo_x86 *c) {} static inline void winchip_mcheck_init(struct cpuinfo_x86 *c) {} static inline void enable_p5_mce(void) {} #endif void mce_setup(struct mce *m); void mce_log(struct mce *m); DECLARE_PER_CPU(struct device *, mce_device); /* * Maximum banks number. * This is the limit of the current register layout on * Intel CPUs. */ #define MAX_NR_BANKS 32 #ifdef CONFIG_X86_MCE_INTEL void mce_intel_feature_init(struct cpuinfo_x86 *c); void mce_intel_feature_clear(struct cpuinfo_x86 *c); void cmci_clear(void); void cmci_reenable(void); void cmci_rediscover(void); void cmci_recheck(void); #else static inline void mce_intel_feature_init(struct cpuinfo_x86 *c) { } static inline void mce_intel_feature_clear(struct cpuinfo_x86 *c) { } static inline void cmci_clear(void) {} static inline void cmci_reenable(void) {} static inline void cmci_rediscover(void) {} static inline void cmci_recheck(void) {} #endif #ifdef CONFIG_X86_MCE_AMD void mce_amd_feature_init(struct cpuinfo_x86 *c); int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr); #else static inline void mce_amd_feature_init(struct cpuinfo_x86 *c) { } static inline int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr) { return -EINVAL; }; #endif int mce_available(struct cpuinfo_x86 *c); bool mce_is_memory_error(struct mce *m); DECLARE_PER_CPU(unsigned, mce_exception_count); DECLARE_PER_CPU(unsigned, mce_poll_count); typedef DECLARE_BITMAP(mce_banks_t, MAX_NR_BANKS); DECLARE_PER_CPU(mce_banks_t, mce_poll_banks); enum mcp_flags { MCP_TIMESTAMP = BIT(0), /* log time stamp */ MCP_UC = BIT(1), /* log uncorrected errors */ MCP_DONTLOG = BIT(2), /* only clear, don't log */ }; bool machine_check_poll(enum mcp_flags flags, mce_banks_t *b); int mce_notify_irq(void); DECLARE_PER_CPU(struct mce, injectm); /* Disable CMCI/polling for MCA bank claimed by firmware */ extern void mce_disable_bank(int bank); /* * Exception handler */ /* Call the installed machine check handler for this CPU setup. */ extern void (*machine_check_vector)(struct pt_regs *, long error_code); void do_machine_check(struct pt_regs *, long); /* * Threshold handler */ extern void (*mce_threshold_vector)(void); /* Deferred error interrupt handler */ extern void (*deferred_error_int_vector)(void); /* * Thermal handler */ void intel_init_thermal(struct cpuinfo_x86 *c); /* Interrupt Handler for core thermal thresholds */ extern int (*platform_thermal_notify)(__u64 msr_val); /* Interrupt Handler for package thermal thresholds */ extern int (*platform_thermal_package_notify)(__u64 msr_val); /* Callback support of rate control, return true, if * callback has rate control */ extern bool (*platform_thermal_package_rate_control)(void); #ifdef CONFIG_X86_THERMAL_VECTOR extern void mcheck_intel_therm_init(void); #else static inline void mcheck_intel_therm_init(void) { } #endif /* * Used by APEI to report memory error via /dev/mcelog */ struct cper_sec_mem_err; extern void apei_mce_report_mem_error(int corrected, struct cper_sec_mem_err *mem_err); /* * Enumerate new IP types and HWID values in AMD processors which support * Scalable MCA. */ #ifdef CONFIG_X86_MCE_AMD /* These may be used by multiple smca_hwid_mcatypes */ enum smca_bank_types { SMCA_LS = 0, /* Load Store */ SMCA_IF, /* Instruction Fetch */ SMCA_L2_CACHE, /* L2 Cache */ SMCA_DE, /* Decoder Unit */ SMCA_RESERVED, /* Reserved */ SMCA_EX, /* Execution Unit */ SMCA_FP, /* Floating Point */ SMCA_L3_CACHE, /* L3 Cache */ SMCA_CS, /* Coherent Slave */ SMCA_PIE, /* Power, Interrupts, etc. */ SMCA_UMC, /* Unified Memory Controller */ SMCA_PB, /* Parameter Block */ SMCA_PSP, /* Platform Security Processor */ SMCA_SMU, /* System Management Unit */ N_SMCA_BANK_TYPES }; #define HWID_MCATYPE(hwid, mcatype) (((hwid) << 16) | (mcatype)) struct smca_hwid { unsigned int bank_type; /* Use with smca_bank_types for easy indexing. */ u32 hwid_mcatype; /* (hwid,mcatype) tuple */ u32 xec_bitmap; /* Bitmap of valid ExtErrorCodes; current max is 21. */ u8 count; /* Number of instances. */ }; struct smca_bank { struct smca_hwid *hwid; u32 id; /* Value of MCA_IPID[InstanceId]. */ u8 sysfs_id; /* Value used for sysfs name. */ }; extern struct smca_bank smca_banks[MAX_NR_BANKS]; extern const char *smca_get_long_name(enum smca_bank_types t); extern int mce_threshold_create_device(unsigned int cpu); extern int mce_threshold_remove_device(unsigned int cpu); #else static inline int mce_threshold_create_device(unsigned int cpu) { return 0; }; static inline int mce_threshold_remove_device(unsigned int cpu) { return 0; }; #endif #endif /* _ASM_X86_MCE_H */
Name | Type | Size | Permission | Actions |
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crypto | Folder | 0755 |
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e820 | Folder | 0755 |
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fpu | Folder | 0755 |
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numachip | Folder | 0755 |
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trace | Folder | 0755 |
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uv | Folder | 0755 |
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xen | Folder | 0755 |
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Kbuild | File | 294 B | 0644 |
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a.out-core.h | File | 1.89 KB | 0644 |
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acenv.h | File | 1.56 KB | 0644 |
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acpi.h | File | 4.76 KB | 0644 |
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agp.h | File | 1.04 KB | 0644 |
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alternative-asm.h | File | 2.43 KB | 0644 |
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alternative.h | File | 8.28 KB | 0644 |
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amd_nb.h | File | 2.98 KB | 0644 |
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apb_timer.h | File | 1.43 KB | 0644 |
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apic.h | File | 14.53 KB | 0644 |
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apic_flat_64.h | File | 151 B | 0644 |
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apicdef.h | File | 11.26 KB | 0644 |
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apm.h | File | 1.8 KB | 0644 |
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arch_hweight.h | File | 1.28 KB | 0644 |
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archrandom.h | File | 3.03 KB | 0644 |
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asm-offsets.h | File | 35 B | 0644 |
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asm-prototypes.h | File | 946 B | 0644 |
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asm.h | File | 4.97 KB | 0644 |
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atomic.h | File | 6.02 KB | 0644 |
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atomic64_32.h | File | 8.71 KB | 0644 |
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atomic64_64.h | File | 6.31 KB | 0644 |
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barrier.h | File | 3.6 KB | 0644 |
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bios_ebda.h | File | 914 B | 0644 |
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bitops.h | File | 13.78 KB | 0644 |
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boot.h | File | 1.53 KB | 0644 |
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bootparam_utils.h | File | 2.86 KB | 0644 |
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bug.h | File | 2.07 KB | 0644 |
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bugs.h | File | 493 B | 0644 |
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cache.h | File | 641 B | 0644 |
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cacheflush.h | File | 306 B | 0644 |
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cacheinfo.h | File | 209 B | 0644 |
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calgary.h | File | 2.31 KB | 0644 |
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ce4100.h | File | 121 B | 0644 |
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checksum.h | File | 133 B | 0644 |
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checksum_32.h | File | 4.86 KB | 0644 |
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checksum_64.h | File | 5.41 KB | 0644 |
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clocksource.h | File | 488 B | 0644 |
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cmdline.h | File | 302 B | 0644 |
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cmpxchg.h | File | 7.68 KB | 0644 |
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cmpxchg_32.h | File | 3.15 KB | 0644 |
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cmpxchg_64.h | File | 543 B | 0644 |
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compat.h | File | 7.37 KB | 0644 |
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cpu.h | File | 975 B | 0644 |
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cpu_device_id.h | File | 1.38 KB | 0644 |
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cpu_entry_area.h | File | 2.27 KB | 0644 |
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cpufeature.h | File | 7.75 KB | 0644 |
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cpufeatures.h | File | 24.62 KB | 0644 |
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cpumask.h | File | 408 B | 0644 |
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crash.h | File | 320 B | 0644 |
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current.h | File | 443 B | 0644 |
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debugreg.h | File | 2.67 KB | 0644 |
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delay.h | File | 208 B | 0644 |
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desc.h | File | 11.42 KB | 0644 |
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desc_defs.h | File | 3.16 KB | 0644 |
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device.h | File | 568 B | 0644 |
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disabled-features.h | File | 2.31 KB | 0644 |
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div64.h | File | 1.79 KB | 0644 |
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dma-mapping.h | File | 2.4 KB | 0644 |
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dma.h | File | 9.58 KB | 0644 |
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dmi.h | File | 556 B | 0644 |
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dwarf2.h | File | 2.43 KB | 0644 |
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edac.h | File | 474 B | 0644 |
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efi.h | File | 6.9 KB | 0644 |
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elf.h | File | 10.82 KB | 0644 |
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emergency-restart.h | File | 202 B | 0644 |
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entry_arch.h | File | 1.88 KB | 0644 |
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espfix.h | File | 426 B | 0644 |
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exec.h | File | 37 B | 0644 |
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export.h | File | 120 B | 0644 |
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extable.h | File | 1.27 KB | 0644 |
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fb.h | File | 540 B | 0644 |
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fixmap.h | File | 6.04 KB | 0644 |
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floppy.h | File | 6.59 KB | 0644 |
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frame.h | File | 815 B | 0644 |
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ftrace.h | File | 1.8 KB | 0644 |
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futex.h | File | 2.2 KB | 0644 |
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gart.h | File | 2.64 KB | 0644 |
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genapic.h | File | 22 B | 0644 |
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geode.h | File | 842 B | 0644 |
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hardirq.h | File | 2.3 KB | 0644 |
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highmem.h | File | 2.6 KB | 0644 |
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hpet.h | File | 3.38 KB | 0644 |
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hugetlb.h | File | 2.15 KB | 0644 |
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hw_breakpoint.h | File | 1.96 KB | 0644 |
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hw_irq.h | File | 3.85 KB | 0644 |
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hypervisor.h | File | 1.84 KB | 0644 |
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i8259.h | File | 1.93 KB | 0644 |
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ia32.h | File | 1.46 KB | 0644 |
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ia32_unistd.h | File | 313 B | 0644 |
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imr.h | File | 1.81 KB | 0644 |
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inat.h | File | 6.58 KB | 0644 |
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inat_types.h | File | 1013 B | 0644 |
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init.h | File | 632 B | 0644 |
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insn-eval.h | File | 837 B | 0644 |
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insn.h | File | 7.46 KB | 0644 |
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inst.h | File | 5.07 KB | 0644 |
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intel-family.h | File | 3.29 KB | 0644 |
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intel-mid.h | File | 4.91 KB | 0644 |
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intel_ds.h | File | 793 B | 0644 |
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intel_mid_vrtc.h | File | 326 B | 0644 |
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intel_pmc_ipc.h | File | 2.08 KB | 0644 |
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intel_pt.h | File | 292 B | 0644 |
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intel_punit_ipc.h | File | 4.56 KB | 0644 |
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intel_rdt_sched.h | File | 2.59 KB | 0644 |
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intel_scu_ipc.h | File | 2.3 KB | 0644 |
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intel_telemetry.h | File | 3.96 KB | 0644 |
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invpcid.h | File | 1.57 KB | 0644 |
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io.h | File | 12.21 KB | 0644 |
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io_apic.h | File | 5.63 KB | 0644 |
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iomap.h | File | 1.22 KB | 0644 |
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iommu.h | File | 392 B | 0644 |
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iommu_table.h | File | 3.82 KB | 0644 |
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iosf_mbi.h | File | 5.74 KB | 0644 |
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ipi.h | File | 2.84 KB | 0644 |
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irq.h | File | 1.12 KB | 0644 |
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irq_regs.h | File | 679 B | 0644 |
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irq_remapping.h | File | 2.96 KB | 0644 |
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irq_vectors.h | File | 4.12 KB | 0644 |
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irq_work.h | File | 397 B | 0644 |
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irqdomain.h | File | 1.61 KB | 0644 |
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irqflags.h | File | 4.38 KB | 0644 |
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ist.h | File | 735 B | 0644 |
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jump_label.h | File | 2.44 KB | 0644 |
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kasan.h | File | 966 B | 0644 |
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kaslr.h | File | 424 B | 0644 |
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kbdleds.h | File | 454 B | 0644 |
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kdebug.h | File | 752 B | 0644 |
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kexec-bzimage64.h | File | 189 B | 0644 |
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kexec.h | File | 6.69 KB | 0644 |
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kgdb.h | File | 2.09 KB | 0644 |
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kmap_types.h | File | 289 B | 0644 |
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kprobes.h | File | 3.82 KB | 0644 |
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kvm_emulate.h | File | 15.23 KB | 0644 |
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kvm_guest.h | File | 172 B | 0644 |
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kvm_host.h | File | 42.72 KB | 0644 |
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kvm_page_track.h | File | 2.48 KB | 0644 |
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kvm_para.h | File | 3 KB | 0644 |
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kvmclock.h | File | 170 B | 0644 |
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linkage.h | File | 581 B | 0644 |
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livepatch.h | File | 1.12 KB | 0644 |
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local.h | File | 3.83 KB | 0644 |
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local64.h | File | 33 B | 0644 |
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mach_timer.h | File | 1.55 KB | 0644 |
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mach_traps.h | File | 1013 B | 0644 |
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math_emu.h | File | 395 B | 0644 |
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mc146818rtc.h | File | 2.76 KB | 0644 |
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mce.h | File | 12.54 KB | 0644 |
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mem_encrypt.h | File | 2.83 KB | 0644 |
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microcode.h | File | 4.14 KB | 0644 |
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microcode_amd.h | File | 1.41 KB | 0644 |
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microcode_intel.h | File | 2.46 KB | 0644 |
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misc.h | File | 143 B | 0644 |
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mmconfig.h | File | 374 B | 0644 |
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mmu.h | File | 1.57 KB | 0644 |
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mmu_context.h | File | 10.27 KB | 0644 |
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mmx.h | File | 337 B | 0644 |
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mmzone.h | File | 129 B | 0644 |
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mmzone_32.h | File | 1.16 KB | 0644 |
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mmzone_64.h | File | 430 B | 0644 |
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module.h | File | 2.05 KB | 0644 |
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mpspec.h | File | 3.93 KB | 0644 |
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mpspec_def.h | File | 3.93 KB | 0644 |
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mpx.h | File | 2.97 KB | 0644 |
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mshyperv.h | File | 10.69 KB | 0644 |
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msi.h | File | 392 B | 0644 |
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msidef.h | File | 1.77 KB | 0644 |
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msr-index.h | File | 30.36 KB | 0644 |
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msr-trace.h | File | 1.35 KB | 0644 |
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msr.h | File | 10.85 KB | 0644 |
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mtrr.h | File | 4.62 KB | 0644 |
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mwait.h | File | 3.74 KB | 0644 |
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nmi.h | File | 1.39 KB | 0644 |
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nops.h | File | 4.31 KB | 0644 |
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nospec-branch.h | File | 10.87 KB | 0644 |
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numa.h | File | 2.18 KB | 0644 |
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numa_32.h | File | 256 B | 0644 |
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olpc.h | File | 3.16 KB | 0644 |
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olpc_ofw.h | File | 1.1 KB | 0644 |
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orc_lookup.h | File | 1.63 KB | 0644 |
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orc_types.h | File | 3.47 KB | 0644 |
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page.h | File | 2.18 KB | 0644 |
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page_32.h | File | 1.01 KB | 0644 |
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page_32_types.h | File | 1.7 KB | 0644 |
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page_64.h | File | 1.42 KB | 0644 |
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page_64_types.h | File | 2.34 KB | 0644 |
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page_types.h | File | 2.29 KB | 0644 |
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paravirt.h | File | 23.31 KB | 0644 |
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paravirt_types.h | File | 22.15 KB | 0644 |
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parport.h | File | 314 B | 0644 |
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pat.h | File | 768 B | 0644 |
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pci-direct.h | File | 995 B | 0644 |
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pci-functions.h | File | 654 B | 0644 |
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pci.h | File | 3.51 KB | 0644 |
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pci_64.h | File | 684 B | 0644 |
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pci_x86.h | File | 5.71 KB | 0644 |
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percpu.h | File | 18.97 KB | 0644 |
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perf_event.h | File | 8.82 KB | 0644 |
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perf_event_p4.h | File | 26.1 KB | 0644 |
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pgalloc.h | File | 5.57 KB | 0644 |
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pgtable-2level.h | File | 2.75 KB | 0644 |
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pgtable-2level_types.h | File | 867 B | 0644 |
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pgtable-3level.h | File | 10.24 KB | 0644 |
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pgtable-3level_types.h | File | 1.06 KB | 0644 |
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pgtable-invert.h | File | 1.07 KB | 0644 |
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pgtable.h | File | 33.91 KB | 0644 |
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pgtable_32.h | File | 3.1 KB | 0644 |
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pgtable_32_types.h | File | 2.01 KB | 0644 |
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pgtable_64.h | File | 7.37 KB | 0644 |
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pgtable_64_types.h | File | 3.67 KB | 0644 |
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pgtable_types.h | File | 16.75 KB | 0644 |
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pkeys.h | File | 3.17 KB | 0644 |
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platform_sst_audio.h | File | 3.18 KB | 0644 |
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pm-trace.h | File | 611 B | 0644 |
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posix_types.h | File | 144 B | 0644 |
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preempt.h | File | 3.04 KB | 0644 |
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probe_roms.h | File | 273 B | 0644 |
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processor-cyrix.h | File | 879 B | 0644 |
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processor-flags.h | File | 1.71 KB | 0644 |
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processor.h | File | 24.54 KB | 0644 |
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prom.h | File | 1 KB | 0644 |
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proto.h | File | 1003 B | 0644 |
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pti.h | File | 369 B | 0644 |
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ptrace.h | File | 8.52 KB | 0644 |
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purgatory.h | File | 571 B | 0644 |
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pvclock-abi.h | File | 1.49 KB | 0644 |
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pvclock.h | File | 2.64 KB | 0644 |
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qrwlock.h | File | 199 B | 0644 |
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qspinlock.h | File | 2.54 KB | 0644 |
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qspinlock_paravirt.h | File | 1.85 KB | 0644 |
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realmode.h | File | 1.76 KB | 0644 |
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reboot.h | File | 850 B | 0644 |
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reboot_fixups.h | File | 183 B | 0644 |
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refcount.h | File | 2.83 KB | 0644 |
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required-features.h | File | 2.81 KB | 0644 |
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rio.h | File | 2.57 KB | 0644 |
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rmwcc.h | File | 1.62 KB | 0644 |
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rwsem.h | File | 7.02 KB | 0644 |
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seccomp.h | File | 510 B | 0644 |
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sections.h | File | 465 B | 0644 |
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segment.h | File | 9.47 KB | 0644 |
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serial.h | File | 1.11 KB | 0644 |
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set_memory.h | File | 3.86 KB | 0644 |
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setup.h | File | 3.4 KB | 0644 |
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setup_arch.h | File | 77 B | 0644 |
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shmparam.h | File | 193 B | 0644 |
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sigcontext.h | File | 261 B | 0644 |
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sigframe.h | File | 2.25 KB | 0644 |
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sighandling.h | File | 649 B | 0644 |
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signal.h | File | 2.37 KB | 0644 |
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simd.h | File | 287 B | 0644 |
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smap.h | File | 1.71 KB | 0644 |
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smp.h | File | 4.73 KB | 0644 |
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sparsemem.h | File | 1.01 KB | 0644 |
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spec-ctrl.h | File | 2.81 KB | 0644 |
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special_insns.h | File | 5.04 KB | 0644 |
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spinlock.h | File | 1.19 KB | 0644 |
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spinlock_types.h | File | 719 B | 0644 |
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sta2x11.h | File | 352 B | 0644 |
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stackprotector.h | File | 4.13 KB | 0644 |
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stacktrace.h | File | 2.57 KB | 0644 |
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string.h | File | 129 B | 0644 |
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string_32.h | File | 7.74 KB | 0644 |
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string_64.h | File | 3.56 KB | 0644 |
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suspend.h | File | 131 B | 0644 |
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suspend_32.h | File | 822 B | 0644 |
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suspend_64.h | File | 1.79 KB | 0644 |
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svm.h | File | 7.06 KB | 0644 |
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swiotlb.h | File | 991 B | 0644 |
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switch_to.h | File | 2.98 KB | 0644 |
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sync_bitops.h | File | 3.42 KB | 0644 |
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sys_ia32.h | File | 1.8 KB | 0644 |
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syscall.h | File | 5.14 KB | 0644 |
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syscalls.h | File | 1.39 KB | 0644 |
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sysfb.h | File | 2.54 KB | 0644 |
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tce.h | File | 1.68 KB | 0644 |
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text-patching.h | File | 2.3 KB | 0644 |
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thread_info.h | File | 9.33 KB | 0644 |
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time.h | File | 331 B | 0644 |
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timer.h | File | 1 KB | 0644 |
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timex.h | File | 546 B | 0644 |
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tlb.h | File | 1.05 KB | 0644 |
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tlbbatch.h | File | 332 B | 0644 |
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tlbflush.h | File | 17.09 KB | 0644 |
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topology.h | File | 4.84 KB | 0644 |
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trace_clock.h | File | 406 B | 0644 |
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traps.h | File | 5.74 KB | 0644 |
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tsc.h | File | 1.93 KB | 0644 |
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uaccess.h | File | 21.69 KB | 0644 |
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uaccess_32.h | File | 1.54 KB | 0644 |
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uaccess_64.h | File | 5.32 KB | 0644 |
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umip.h | File | 329 B | 0644 |
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unaligned.h | File | 345 B | 0644 |
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unistd.h | File | 1.45 KB | 0644 |
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unwind.h | File | 3.13 KB | 0644 |
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unwind_hints.h | File | 3.01 KB | 0644 |
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uprobes.h | File | 1.57 KB | 0644 |
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user.h | File | 2.2 KB | 0644 |
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user32.h | File | 2.11 KB | 0644 |
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user_32.h | File | 4.92 KB | 0644 |
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user_64.h | File | 5.21 KB | 0644 |
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vdso.h | File | 1.09 KB | 0644 |
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vga.h | File | 740 B | 0644 |
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vgtod.h | File | 2.13 KB | 0644 |
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virtext.h | File | 2.62 KB | 0644 |
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vm86.h | File | 2.16 KB | 0644 |
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vmx.h | File | 23.5 KB | 0644 |
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vsyscall.h | File | 635 B | 0644 |
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vvar.h | File | 1.38 KB | 0644 |
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word-at-a-time.h | File | 2.54 KB | 0644 |
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x86_init.h | File | 9.25 KB | 0644 |
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xor.h | File | 10.26 KB | 0644 |
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xor_32.h | File | 14.4 KB | 0644 |
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xor_64.h | File | 716 B | 0644 |
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xor_avx.h | File | 4.5 KB | 0644 |
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