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/*
 * Copyright (c) 2013 Samsung Electronics Co., Ltd.
 * Author: Andrzej Hajda <a.hajda@samsung.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * Device Tree binding constants for Exynos5420 clock controller.
*/

#ifndef _DT_BINDINGS_CLOCK_EXYNOS_5420_H
#define _DT_BINDINGS_CLOCK_EXYNOS_5420_H

/* core clocks */
#define CLK_FIN_PLL		1
#define CLK_FOUT_APLL		2
#define CLK_FOUT_CPLL		3
#define CLK_FOUT_DPLL		4
#define CLK_FOUT_EPLL		5
#define CLK_FOUT_RPLL		6
#define CLK_FOUT_IPLL		7
#define CLK_FOUT_SPLL		8
#define CLK_FOUT_VPLL		9
#define CLK_FOUT_MPLL		10
#define CLK_FOUT_BPLL		11
#define CLK_FOUT_KPLL		12
#define CLK_ARM_CLK		13
#define CLK_KFC_CLK		14

/* gate for special clocks (sclk) */
#define CLK_SCLK_UART0		128
#define CLK_SCLK_UART1		129
#define CLK_SCLK_UART2		130
#define CLK_SCLK_UART3		131
#define CLK_SCLK_MMC0		132
#define CLK_SCLK_MMC1		133
#define CLK_SCLK_MMC2		134
#define CLK_SCLK_SPI0		135
#define CLK_SCLK_SPI1		136
#define CLK_SCLK_SPI2		137
#define CLK_SCLK_I2S1		138
#define CLK_SCLK_I2S2		139
#define CLK_SCLK_PCM1		140
#define CLK_SCLK_PCM2		141
#define CLK_SCLK_SPDIF		142
#define CLK_SCLK_HDMI		143
#define CLK_SCLK_PIXEL		144
#define CLK_SCLK_DP1		145
#define CLK_SCLK_MIPI1		146
#define CLK_SCLK_FIMD1		147
#define CLK_SCLK_MAUDIO0	148
#define CLK_SCLK_MAUPCM0	149
#define CLK_SCLK_USBD300	150
#define CLK_SCLK_USBD301	151
#define CLK_SCLK_USBPHY300	152
#define CLK_SCLK_USBPHY301	153
#define CLK_SCLK_UNIPRO		154
#define CLK_SCLK_PWM		155
#define CLK_SCLK_GSCL_WA	156
#define CLK_SCLK_GSCL_WB	157
#define CLK_SCLK_HDMIPHY	158
#define CLK_MAU_EPLL		159
#define CLK_SCLK_HSIC_12M	160
#define CLK_SCLK_MPHY_IXTAL24	161

/* gate clocks */
#define CLK_UART0		257
#define CLK_UART1		258
#define CLK_UART2		259
#define CLK_UART3		260
#define CLK_I2C0		261
#define CLK_I2C1		262
#define CLK_I2C2		263
#define CLK_I2C3		264
#define CLK_USI0		265
#define CLK_USI1		266
#define CLK_USI2		267
#define CLK_USI3		268
#define CLK_I2C_HDMI		269
#define CLK_TSADC		270
#define CLK_SPI0		271
#define CLK_SPI1		272
#define CLK_SPI2		273
#define CLK_KEYIF		274
#define CLK_I2S1		275
#define CLK_I2S2		276
#define CLK_PCM1		277
#define CLK_PCM2		278
#define CLK_PWM			279
#define CLK_SPDIF		280
#define CLK_USI4		281
#define CLK_USI5		282
#define CLK_USI6		283
#define CLK_ACLK66_PSGEN	300
#define CLK_CHIPID		301
#define CLK_SYSREG		302
#define CLK_TZPC0		303
#define CLK_TZPC1		304
#define CLK_TZPC2		305
#define CLK_TZPC3		306
#define CLK_TZPC4		307
#define CLK_TZPC5		308
#define CLK_TZPC6		309
#define CLK_TZPC7		310
#define CLK_TZPC8		311
#define CLK_TZPC9		312
#define CLK_HDMI_CEC		313
#define CLK_SECKEY		314
#define CLK_MCT			315
#define CLK_WDT			316
#define CLK_RTC			317
#define CLK_TMU			318
#define CLK_TMU_GPU		319
#define CLK_PCLK66_GPIO		330
#define CLK_ACLK200_FSYS2	350
#define CLK_MMC0		351
#define CLK_MMC1		352
#define CLK_MMC2		353
#define CLK_SROMC		354
#define CLK_UFS			355
#define CLK_ACLK200_FSYS	360
#define CLK_TSI			361
#define CLK_PDMA0		362
#define CLK_PDMA1		363
#define CLK_RTIC		364
#define CLK_USBH20		365
#define CLK_USBD300		366
#define CLK_USBD301		367
#define CLK_ACLK400_MSCL	380
#define CLK_MSCL0		381
#define CLK_MSCL1		382
#define CLK_MSCL2		383
#define CLK_SMMU_MSCL0		384
#define CLK_SMMU_MSCL1		385
#define CLK_SMMU_MSCL2		386
#define CLK_ACLK333		400
#define CLK_MFC			401
#define CLK_SMMU_MFCL		402
#define CLK_SMMU_MFCR		403
#define CLK_ACLK200_DISP1	410
#define CLK_DSIM1		411
#define CLK_DP1			412
#define CLK_HDMI		413
#define CLK_ACLK300_DISP1	420
#define CLK_FIMD1		421
#define CLK_SMMU_FIMD1M0	422
#define CLK_SMMU_FIMD1M1	423
#define CLK_ACLK166		430
#define CLK_MIXER		431
#define CLK_ACLK266		440
#define CLK_ROTATOR		441
#define CLK_MDMA1		442
#define CLK_SMMU_ROTATOR	443
#define CLK_SMMU_MDMA1		444
#define CLK_ACLK300_JPEG	450
#define CLK_JPEG		451
#define CLK_JPEG2		452
#define CLK_SMMU_JPEG		453
#define CLK_SMMU_JPEG2		454
#define CLK_ACLK300_GSCL	460
#define CLK_SMMU_GSCL0		461
#define CLK_SMMU_GSCL1		462
#define CLK_GSCL_WA		463
#define CLK_GSCL_WB		464
#define CLK_GSCL0		465
#define CLK_GSCL1		466
#define CLK_FIMC_3AA		467
#define CLK_ACLK266_G2D		470
#define CLK_SSS			471
#define CLK_SLIM_SSS		472
#define CLK_MDMA0		473
#define CLK_ACLK333_G2D		480
#define CLK_G2D			481
#define CLK_ACLK333_432_GSCL	490
#define CLK_SMMU_3AA		491
#define CLK_SMMU_FIMCL0		492
#define CLK_SMMU_FIMCL1		493
#define CLK_SMMU_FIMCL3		494
#define CLK_FIMC_LITE3		495
#define CLK_FIMC_LITE0		496
#define CLK_FIMC_LITE1		497
#define CLK_ACLK_G3D		500
#define CLK_G3D			501
#define CLK_SMMU_MIXER		502
#define CLK_SMMU_G2D		503
#define CLK_SMMU_MDMA0		504
#define CLK_MC			505
#define CLK_TOP_RTC		506
#define CLK_SCLK_UART_ISP	510
#define CLK_SCLK_SPI0_ISP	511
#define CLK_SCLK_SPI1_ISP	512
#define CLK_SCLK_PWM_ISP	513
#define CLK_SCLK_ISP_SENSOR0	514
#define CLK_SCLK_ISP_SENSOR1	515
#define CLK_SCLK_ISP_SENSOR2	516
#define CLK_ACLK432_SCALER	517
#define CLK_ACLK432_CAM		518
#define CLK_ACLK_FL1550_CAM	519
#define CLK_ACLK550_CAM		520

/* mux clocks */
#define CLK_MOUT_HDMI		640
#define CLK_MOUT_G3D		641
#define CLK_MOUT_VPLL		642
#define CLK_MOUT_MAUDIO0	643
#define CLK_MOUT_USER_ACLK333	644
#define CLK_MOUT_SW_ACLK333	645
#define CLK_MOUT_USER_ACLK200_DISP1	646
#define CLK_MOUT_SW_ACLK200	647
#define CLK_MOUT_USER_ACLK300_DISP1     648
#define CLK_MOUT_SW_ACLK300     649
#define CLK_MOUT_USER_ACLK400_DISP1     650
#define CLK_MOUT_SW_ACLK400     651
#define CLK_MOUT_USER_ACLK300_GSCL	652
#define CLK_MOUT_SW_ACLK300_GSCL	653
#define CLK_MOUT_MCLK_CDREX	654
#define CLK_MOUT_BPLL		655
#define CLK_MOUT_MX_MSPLL_CCORE	656
#define CLK_MOUT_EPLL		657
#define CLK_MOUT_MAU_EPLL	658
#define CLK_MOUT_USER_MAU_EPLL	659

/* divider clocks */
#define CLK_DOUT_PIXEL		768
#define CLK_DOUT_ACLK400_WCORE	769
#define CLK_DOUT_ACLK400_ISP	770
#define CLK_DOUT_ACLK400_MSCL	771
#define CLK_DOUT_ACLK200	772
#define CLK_DOUT_ACLK200_FSYS2	773
#define CLK_DOUT_ACLK100_NOC	774
#define CLK_DOUT_PCLK200_FSYS	775
#define CLK_DOUT_ACLK200_FSYS	776
#define CLK_DOUT_ACLK333_432_GSCL	777
#define CLK_DOUT_ACLK333_432_ISP	778
#define CLK_DOUT_ACLK66		779
#define CLK_DOUT_ACLK333_432_ISP0	780
#define CLK_DOUT_ACLK266	781
#define CLK_DOUT_ACLK166	782
#define CLK_DOUT_ACLK333	783
#define CLK_DOUT_ACLK333_G2D	784
#define CLK_DOUT_ACLK266_G2D	785
#define CLK_DOUT_ACLK_G3D	786
#define CLK_DOUT_ACLK300_JPEG	787
#define CLK_DOUT_ACLK300_DISP1	788
#define CLK_DOUT_ACLK300_GSCL	789
#define CLK_DOUT_ACLK400_DISP1	790
#define CLK_DOUT_PCLK_CDREX	791
#define CLK_DOUT_SCLK_CDREX	792
#define CLK_DOUT_ACLK_CDREX1	793
#define CLK_DOUT_CCLK_DREX0	794
#define CLK_DOUT_CLK2X_PHY0	795
#define CLK_DOUT_PCLK_CORE_MEM	796

/* must be greater than maximal clock id */
#define CLK_NR_CLKS		797

#endif /* _DT_BINDINGS_CLOCK_EXYNOS_5420_H */

Filemanager

Name Type Size Permission Actions
alphascale,asm9260.h File 2.63 KB 0644
at91.h File 751 B 0644
ath79-clk.h File 479 B 0644
axis,artpec6-clkctrl.h File 1.09 KB 0644
bcm-cygnus.h File 3.06 KB 0644
bcm-ns2.h File 2.85 KB 0644
bcm-nsp.h File 2.1 KB 0644
bcm-sr.h File 3.42 KB 0644
bcm21664.h File 1.94 KB 0644
bcm281xx.h File 2.4 KB 0644
bcm2835-aux.h File 635 B 0644
bcm2835.h File 1.98 KB 0644
berlin2.h File 1.05 KB 0644
berlin2q.h File 734 B 0644
boston-clock.h File 313 B 0644
clps711x-clock.h File 718 B 0644
cortina,gemini-clock.h File 885 B 0644
efm32-cmu.h File 1.12 KB 0644
exynos-audss-clk.h File 636 B 0644
exynos3250.h File 8.87 KB 0644
exynos4.h File 9.02 KB 0644
exynos5250.h File 4.51 KB 0644
exynos5260-clk.h File 14.53 KB 0644
exynos5410.h File 1.65 KB 0644
exynos5420.h File 6.79 KB 0644
exynos5433.h File 44.4 KB 0644
exynos5440.h File 1.11 KB 0644
exynos7-clk.h File 5.16 KB 0644
gxbb-aoclkc.h File 2.83 KB 0644
gxbb-clkc.h File 3.24 KB 0644
hi3516cv300-clock.h File 1.63 KB 0644
hi3519-clock.h File 1.3 KB 0644
hi3620-clock.h File 4.39 KB 0644
hi3660-clock.h File 6.61 KB 0644
hi6220-clock.h File 4.51 KB 0644
hip04-clock.h File 1.11 KB 0644
histb-clock.h File 2.21 KB 0644
hix5hd2-clock.h File 2.36 KB 0644
imx1-clock.h File 1.03 KB 0644
imx21-clock.h File 2.4 KB 0644
imx27-clock.h File 3.41 KB 0644
imx5-clock.h File 7.04 KB 0644
imx6qdl-clock.h File 9.37 KB 0644
imx6sl-clock.h File 5.71 KB 0644
imx6sx-clock.h File 8.89 KB 0644
imx6ul-clock.h File 8.01 KB 0644
imx7d-clock.h File 15.76 KB 0644
jz4740-cgu.h File 1.04 KB 0644
jz4780-cgu.h File 2.45 KB 0644
lpc18xx-ccu.h File 2.08 KB 0644
lpc18xx-cgu.h File 1.12 KB 0644
lpc32xx-clock.h File 1.59 KB 0644
lsi,axm5516-clks.h File 974 B 0644
marvell,mmp2.h File 2.01 KB 0644
marvell,pxa168.h File 1.65 KB 0644
marvell,pxa1928.h File 1.54 KB 0644
marvell,pxa910.h File 1.6 KB 0644
maxim,max77620.h File 632 B 0644
maxim,max77686.h File 648 B 0644
maxim,max77802.h File 630 B 0644
meson8b-clkc.h File 2.6 KB 0644
microchip,pic32-clock.h File 1.12 KB 0644
mpc512x-clock.h File 2.22 KB 0644
mt2701-clk.h File 13.59 KB 0644
mt2712-clk.h File 11.96 KB 0644
mt6797-clk.h File 8.38 KB 0644
mt7622-clk.h File 7.93 KB 0644
mt8135-clk.h File 5.51 KB 0644
mt8173-clk.h File 9.17 KB 0644
omap4.h File 5.78 KB 0644
oxsemi,ox810se.h File 1002 B 0644
oxsemi,ox820.h File 1.17 KB 0644
pistachio-clk.h File 4.75 KB 0644
pxa-clock.h File 1.67 KB 0644
qcom,gcc-apq8084.h File 12.57 KB 0644
qcom,gcc-ipq4019.h File 5.66 KB 0644
qcom,gcc-ipq806x.h File 8.37 KB 0644
qcom,gcc-ipq8074.h File 4.96 KB 0644
qcom,gcc-mdm9615.h File 9.33 KB 0644
qcom,gcc-msm8660.h File 7.75 KB 0644
qcom,gcc-msm8916.h File 6.04 KB 0644
qcom,gcc-msm8960.h File 9.12 KB 0644
qcom,gcc-msm8974.h File 12.05 KB 0644
qcom,gcc-msm8994.h File 4.78 KB 0644
qcom,gcc-msm8996.h File 12.41 KB 0644
qcom,lcc-ipq806x.h File 899 B 0644
qcom,lcc-mdm9615.h File 1.66 KB 0644
qcom,lcc-msm8960.h File 1.58 KB 0644
qcom,mmcc-apq8084.h File 5.59 KB 0644
qcom,mmcc-msm8960.h File 4.01 KB 0644
qcom,mmcc-msm8974.h File 5.1 KB 0644
qcom,mmcc-msm8996.h File 9.18 KB 0644
qcom,rpmcc.h File 3.71 KB 0644
r7s72100-clock.h File 2.77 KB 0644
r8a73a4-clock.h File 1.59 KB 0644
r8a7740-clock.h File 1.95 KB 0644
r8a7743-cpg-mssr.h File 1.24 KB 0644
r8a7745-cpg-mssr.h File 1.27 KB 0644
r8a7778-clock.h File 1.81 KB 0644
r8a7779-clock.h File 1.61 KB 0644
r8a7790-clock.h File 4.3 KB 0644
r8a7790-cpg-mssr.h File 1.5 KB 0644
r8a7791-clock.h File 4.35 KB 0644
r8a7791-cpg-mssr.h File 1.38 KB 0644
r8a7792-clock.h File 2.51 KB 0644
r8a7792-cpg-mssr.h File 1.24 KB 0644
r8a7793-clock.h File 4.47 KB 0644
r8a7793-cpg-mssr.h File 1.38 KB 0644
r8a7794-clock.h File 3.65 KB 0644
r8a7794-cpg-mssr.h File 1.35 KB 0644
r8a7795-cpg-mssr.h File 2.02 KB 0644
r8a7796-cpg-mssr.h File 2.02 KB 0644
r8a77970-cpg-mssr.h File 1.46 KB 0644
r8a77995-cpg-mssr.h File 1.7 KB 0644
renesas-cpg-mssr.h File 542 B 0644
rk3036-cru.h File 4.48 KB 0644
rk3066a-cru.h File 1.04 KB 0644
rk3128-cru.h File 6.53 KB 0644
rk3188-cru-common.h File 6.12 KB 0644
rk3188-cru.h File 1.4 KB 0644
rk3228-cru.h File 6.93 KB 0644
rk3288-cru.h File 9.2 KB 0644
rk3328-cru.h File 9.58 KB 0644
rk3368-cru.h File 9.29 KB 0644
rk3399-cru.h File 19.57 KB 0644
rockchip,rk808.h File 244 B 0644
rv1108-cru.h File 8.75 KB 0644
s3c2410.h File 1.44 KB 0644
s3c2412.h File 1.71 KB 0644
s3c2443.h File 2.2 KB 0644
s5pv210-audss.h File 831 B 0644
s5pv210.h File 5.29 KB 0644
samsung,s2mps11.h File 649 B 0644
samsung,s3c64xx-clock.h File 4.11 KB 0644
sh73a0-clock.h File 2.05 KB 0644
ste-ab8500.h File 279 B 0644
stih407-clks.h File 2.03 KB 0644
stih410-clks.h File 568 B 0644
stih416-clks.h File 309 B 0644
stih418-clks.h File 834 B 0644
stm32fx-clock.h File 1.23 KB 0644
stm32h7-clks.h File 3.11 KB 0644
sun4i-a10-ccu.h File 5.64 KB 0644
sun4i-a10-pll2.h File 2.23 KB 0644
sun50i-a64-ccu.h File 4.1 KB 0644
sun5i-ccu.h File 2.57 KB 0644
sun6i-a31-ccu.h File 5.38 KB 0644
sun7i-a20-ccu.h File 2.15 KB 0644
sun8i-a23-a33-ccu.h File 3.94 KB 0644
sun8i-a83t-ccu.h File 4.08 KB 0644
sun8i-de2.h File 376 B 0644
sun8i-h3-ccu.h File 4.43 KB 0644
sun8i-r-ccu.h File 2.32 KB 0644
sun8i-r40-ccu.h File 5.35 KB 0644
sun8i-v3s-ccu.h File 3.45 KB 0644
sun9i-a80-ccu.h File 4.65 KB 0644
sun9i-a80-de.h File 2.79 KB 0644
sun9i-a80-usb.h File 2.33 KB 0644
tegra114-car.h File 8.08 KB 0644
tegra124-car-common.h File 8.49 KB 0644
tegra124-car.h File 492 B 0644
tegra186-clock.h File 39.66 KB 0644
tegra20-car.h File 4.5 KB 0644
tegra210-car.h File 10.03 KB 0644
tegra30-car.h File 7.04 KB 0644
vf610-clock.h File 6.26 KB 0644
zx296702-clock.h File 6.03 KB 0644
zx296718-clock.h File 3.89 KB 0644