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/*
 * Xtensa built-in interrupt controller
 *
 * Copyright (C) 2002 - 2013 Tensilica, Inc.
 * Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 */

#ifndef __LINUX_IRQCHIP_XTENSA_PIC_H
#define __LINUX_IRQCHIP_XTENSA_PIC_H

struct device_node;
int xtensa_pic_init_legacy(struct device_node *interrupt_parent);

#endif /* __LINUX_IRQCHIP_XTENSA_PIC_H */

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Name Type Size Permission Actions
arm-gic-common.h File 825 B 0644
arm-gic-v3.h File 22.39 KB 0644
arm-gic-v4.h File 3.1 KB 0644
arm-gic.h File 5.38 KB 0644
arm-vic.h File 1.4 KB 0644
chained_irq.h File 1.44 KB 0644
ingenic.h File 759 B 0644
irq-bcm2836.h File 2.34 KB 0644
irq-omap-intc.h File 977 B 0644
irq-partition-percpu.h File 1.71 KB 0644
irq-sa11x0.h File 502 B 0644
metag-ext.h File 861 B 0644
metag.h File 485 B 0644
mmp.h File 155 B 0644
mxs.h File 367 B 0644
versatile-fpga.h File 353 B 0644
xtensa-mx.h File 467 B 0644
xtensa-pic.h File 532 B 0644