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/*
 * Framework and drivers for configuring and reading different PHYs
 * Based on code in sungem_phy.c and gianfar_phy.c
 *
 * Author: Andy Fleming
 *
 * Copyright (c) 2004 Freescale Semiconductor, Inc.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 *
 */

#ifndef __PHY_H
#define __PHY_H

#include <linux/compiler.h>
#include <linux/spinlock.h>
#include <linux/ethtool.h>
#include <linux/mdio.h>
#include <linux/mii.h>
#include <linux/module.h>
#include <linux/timer.h>
#include <linux/workqueue.h>
#include <linux/mod_devicetable.h>

#include <linux/atomic.h>

#define PHY_DEFAULT_FEATURES	(SUPPORTED_Autoneg | \
				 SUPPORTED_TP | \
				 SUPPORTED_MII)

#define PHY_10BT_FEATURES	(SUPPORTED_10baseT_Half | \
				 SUPPORTED_10baseT_Full)

#define PHY_100BT_FEATURES	(SUPPORTED_100baseT_Half | \
				 SUPPORTED_100baseT_Full)

#define PHY_1000BT_FEATURES	(SUPPORTED_1000baseT_Half | \
				 SUPPORTED_1000baseT_Full)

#define PHY_BASIC_FEATURES	(PHY_10BT_FEATURES | \
				 PHY_100BT_FEATURES | \
				 PHY_DEFAULT_FEATURES)

#define PHY_GBIT_FEATURES	(PHY_BASIC_FEATURES | \
				 PHY_1000BT_FEATURES)


/*
 * Set phydev->irq to PHY_POLL if interrupts are not supported,
 * or not desired for this PHY.  Set to PHY_IGNORE_INTERRUPT if
 * the attached driver handles the interrupt
 */
#define PHY_POLL		-1
#define PHY_IGNORE_INTERRUPT	-2

#define PHY_HAS_INTERRUPT	0x00000001
#define PHY_IS_INTERNAL		0x00000002
#define MDIO_DEVICE_IS_PHY	0x80000000

/* Interface Mode definitions */
typedef enum {
	PHY_INTERFACE_MODE_NA,
	PHY_INTERFACE_MODE_INTERNAL,
	PHY_INTERFACE_MODE_MII,
	PHY_INTERFACE_MODE_GMII,
	PHY_INTERFACE_MODE_SGMII,
	PHY_INTERFACE_MODE_TBI,
	PHY_INTERFACE_MODE_REVMII,
	PHY_INTERFACE_MODE_RMII,
	PHY_INTERFACE_MODE_RGMII,
	PHY_INTERFACE_MODE_RGMII_ID,
	PHY_INTERFACE_MODE_RGMII_RXID,
	PHY_INTERFACE_MODE_RGMII_TXID,
	PHY_INTERFACE_MODE_RTBI,
	PHY_INTERFACE_MODE_SMII,
	PHY_INTERFACE_MODE_XGMII,
	PHY_INTERFACE_MODE_MOCA,
	PHY_INTERFACE_MODE_QSGMII,
	PHY_INTERFACE_MODE_TRGMII,
	PHY_INTERFACE_MODE_1000BASEX,
	PHY_INTERFACE_MODE_2500BASEX,
	PHY_INTERFACE_MODE_RXAUI,
	PHY_INTERFACE_MODE_XAUI,
	/* 10GBASE-KR, XFI, SFI - single lane 10G Serdes */
	PHY_INTERFACE_MODE_10GKR,
	PHY_INTERFACE_MODE_MAX,
} phy_interface_t;

/**
 * phy_supported_speeds - return all speeds currently supported by a phy device
 * @phy: The phy device to return supported speeds of.
 * @speeds: buffer to store supported speeds in.
 * @size: size of speeds buffer.
 *
 * Description: Returns the number of supported speeds, and
 * fills the speeds * buffer with the supported speeds. If speeds buffer is
 * too small to contain * all currently supported speeds, will return as
 * many speeds as can fit.
 */
unsigned int phy_supported_speeds(struct phy_device *phy,
				      unsigned int *speeds,
				      unsigned int size);

/**
 * It maps 'enum phy_interface_t' found in include/linux/phy.h
 * into the device tree binding of 'phy-mode', so that Ethernet
 * device driver can get phy interface from device tree.
 */
static inline const char *phy_modes(phy_interface_t interface)
{
	switch (interface) {
	case PHY_INTERFACE_MODE_NA:
		return "";
	case PHY_INTERFACE_MODE_INTERNAL:
		return "internal";
	case PHY_INTERFACE_MODE_MII:
		return "mii";
	case PHY_INTERFACE_MODE_GMII:
		return "gmii";
	case PHY_INTERFACE_MODE_SGMII:
		return "sgmii";
	case PHY_INTERFACE_MODE_TBI:
		return "tbi";
	case PHY_INTERFACE_MODE_REVMII:
		return "rev-mii";
	case PHY_INTERFACE_MODE_RMII:
		return "rmii";
	case PHY_INTERFACE_MODE_RGMII:
		return "rgmii";
	case PHY_INTERFACE_MODE_RGMII_ID:
		return "rgmii-id";
	case PHY_INTERFACE_MODE_RGMII_RXID:
		return "rgmii-rxid";
	case PHY_INTERFACE_MODE_RGMII_TXID:
		return "rgmii-txid";
	case PHY_INTERFACE_MODE_RTBI:
		return "rtbi";
	case PHY_INTERFACE_MODE_SMII:
		return "smii";
	case PHY_INTERFACE_MODE_XGMII:
		return "xgmii";
	case PHY_INTERFACE_MODE_MOCA:
		return "moca";
	case PHY_INTERFACE_MODE_QSGMII:
		return "qsgmii";
	case PHY_INTERFACE_MODE_TRGMII:
		return "trgmii";
	case PHY_INTERFACE_MODE_1000BASEX:
		return "1000base-x";
	case PHY_INTERFACE_MODE_2500BASEX:
		return "2500base-x";
	case PHY_INTERFACE_MODE_RXAUI:
		return "rxaui";
	case PHY_INTERFACE_MODE_XAUI:
		return "xaui";
	case PHY_INTERFACE_MODE_10GKR:
		return "10gbase-kr";
	default:
		return "unknown";
	}
}


#define PHY_INIT_TIMEOUT	100000
#define PHY_STATE_TIME		1
#define PHY_FORCE_TIMEOUT	10
#define PHY_AN_TIMEOUT		10

#define PHY_MAX_ADDR	32

/* Used when trying to connect to a specific phy (mii bus id:phy device id) */
#define PHY_ID_FMT "%s:%02x"

#define MII_BUS_ID_SIZE	61

/* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit
   IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */
#define MII_ADDR_C45 (1<<30)

struct device;
struct phylink;
struct sk_buff;

/*
 * The Bus class for PHYs.  Devices which provide access to
 * PHYs should register using this structure
 */
struct mii_bus {
	struct module *owner;
	const char *name;
	char id[MII_BUS_ID_SIZE];
	void *priv;
	int (*read)(struct mii_bus *bus, int addr, int regnum);
	int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
	int (*reset)(struct mii_bus *bus);

	/*
	 * A lock to ensure that only one thing can read/write
	 * the MDIO bus at a time
	 */
	struct mutex mdio_lock;

	struct device *parent;
	enum {
		MDIOBUS_ALLOCATED = 1,
		MDIOBUS_REGISTERED,
		MDIOBUS_UNREGISTERED,
		MDIOBUS_RELEASED,
	} state;
	struct device dev;

	/* list of all PHYs on bus */
	struct mdio_device *mdio_map[PHY_MAX_ADDR];

	/* PHY addresses to be ignored when probing */
	u32 phy_mask;

	/* PHY addresses to ignore the TA/read failure */
	u32 phy_ignore_ta_mask;

	/*
	 * An array of interrupts, each PHY's interrupt at the index
	 * matching its address
	 */
	int irq[PHY_MAX_ADDR];

	/* GPIO reset pulse width in microseconds */
	int reset_delay_us;
	/* RESET GPIO descriptor pointer */
	struct gpio_desc *reset_gpiod;
};
#define to_mii_bus(d) container_of(d, struct mii_bus, dev)

struct mii_bus *mdiobus_alloc_size(size_t);
static inline struct mii_bus *mdiobus_alloc(void)
{
	return mdiobus_alloc_size(0);
}

int __mdiobus_register(struct mii_bus *bus, struct module *owner);
#define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
void mdiobus_unregister(struct mii_bus *bus);
void mdiobus_free(struct mii_bus *bus);
struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
{
	return devm_mdiobus_alloc_size(dev, 0);
}

void devm_mdiobus_free(struct device *dev, struct mii_bus *bus);
struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr);

#define PHY_INTERRUPT_DISABLED	0x0
#define PHY_INTERRUPT_ENABLED	0x80000000

/* PHY state machine states:
 *
 * DOWN: PHY device and driver are not ready for anything.  probe
 * should be called if and only if the PHY is in this state,
 * given that the PHY device exists.
 * - PHY driver probe function will, depending on the PHY, set
 * the state to STARTING or READY
 *
 * STARTING:  PHY device is coming up, and the ethernet driver is
 * not ready.  PHY drivers may set this in the probe function.
 * If they do, they are responsible for making sure the state is
 * eventually set to indicate whether the PHY is UP or READY,
 * depending on the state when the PHY is done starting up.
 * - PHY driver will set the state to READY
 * - start will set the state to PENDING
 *
 * READY: PHY is ready to send and receive packets, but the
 * controller is not.  By default, PHYs which do not implement
 * probe will be set to this state by phy_probe().  If the PHY
 * driver knows the PHY is ready, and the PHY state is STARTING,
 * then it sets this STATE.
 * - start will set the state to UP
 *
 * PENDING: PHY device is coming up, but the ethernet driver is
 * ready.  phy_start will set this state if the PHY state is
 * STARTING.
 * - PHY driver will set the state to UP when the PHY is ready
 *
 * UP: The PHY and attached device are ready to do work.
 * Interrupts should be started here.
 * - timer moves to AN
 *
 * AN: The PHY is currently negotiating the link state.  Link is
 * therefore down for now.  phy_timer will set this state when it
 * detects the state is UP.  config_aneg will set this state
 * whenever called with phydev->autoneg set to AUTONEG_ENABLE.
 * - If autonegotiation finishes, but there's no link, it sets
 *   the state to NOLINK.
 * - If aneg finishes with link, it sets the state to RUNNING,
 *   and calls adjust_link
 * - If autonegotiation did not finish after an arbitrary amount
 *   of time, autonegotiation should be tried again if the PHY
 *   supports "magic" autonegotiation (back to AN)
 * - If it didn't finish, and no magic_aneg, move to FORCING.
 *
 * NOLINK: PHY is up, but not currently plugged in.
 * - If the timer notes that the link comes back, we move to RUNNING
 * - config_aneg moves to AN
 * - phy_stop moves to HALTED
 *
 * FORCING: PHY is being configured with forced settings
 * - if link is up, move to RUNNING
 * - If link is down, we drop to the next highest setting, and
 *   retry (FORCING) after a timeout
 * - phy_stop moves to HALTED
 *
 * RUNNING: PHY is currently up, running, and possibly sending
 * and/or receiving packets
 * - timer will set CHANGELINK if we're polling (this ensures the
 *   link state is polled every other cycle of this state machine,
 *   which makes it every other second)
 * - irq will set CHANGELINK
 * - config_aneg will set AN
 * - phy_stop moves to HALTED
 *
 * CHANGELINK: PHY experienced a change in link state
 * - timer moves to RUNNING if link
 * - timer moves to NOLINK if the link is down
 * - phy_stop moves to HALTED
 *
 * HALTED: PHY is up, but no polling or interrupts are done. Or
 * PHY is in an error state.
 *
 * - phy_start moves to RESUMING
 *
 * RESUMING: PHY was halted, but now wants to run again.
 * - If we are forcing, or aneg is done, timer moves to RUNNING
 * - If aneg is not done, timer moves to AN
 * - phy_stop moves to HALTED
 */
enum phy_state {
	PHY_DOWN = 0,
	PHY_STARTING,
	PHY_READY,
	PHY_PENDING,
	PHY_UP,
	PHY_AN,
	PHY_RUNNING,
	PHY_NOLINK,
	PHY_FORCING,
	PHY_CHANGELINK,
	PHY_HALTED,
	PHY_RESUMING
};

/**
 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
 * @devices_in_package: Bit vector of devices present.
 * @device_ids: The device identifer for each present device.
 */
struct phy_c45_device_ids {
	u32 devices_in_package;
	u32 device_ids[8];
};

/* phy_device: An instance of a PHY
 *
 * drv: Pointer to the driver for this PHY instance
 * phy_id: UID for this device found during discovery
 * c45_ids: 802.3-c45 Device Identifers if is_c45.
 * is_c45:  Set to true if this phy uses clause 45 addressing.
 * is_internal: Set to true if this phy is internal to a MAC.
 * is_pseudo_fixed_link: Set to true if this phy is an Ethernet switch, etc.
 * has_fixups: Set to true if this phy has fixups/quirks.
 * suspended: Set to true if this phy has been suspended successfully.
 * suspended_by_mdio_bus: Set to true if this phy was suspended by MDIO bus.
 * sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal.
 * loopback_enabled: Set true if this phy has been loopbacked successfully.
 * state: state of the PHY for management purposes
 * dev_flags: Device-specific flags used by the PHY driver.
 * link_timeout: The number of timer firings to wait before the
 * giving up on the current attempt at acquiring a link
 * irq: IRQ number of the PHY's interrupt (-1 if none)
 * phy_timer: The timer for handling the state machine
 * phy_queue: A work_queue for the phy_mac_interrupt
 * attached_dev: The attached enet driver's device instance ptr
 * adjust_link: Callback for the enet controller to respond to
 * changes in the link state.
 *
 * speed, duplex, pause, supported, advertising, lp_advertising,
 * and autoneg are used like in mii_if_info
 *
 * interrupts currently only supports enabled or disabled,
 * but could be changed in the future to support enabling
 * and disabling specific interrupts
 *
 * Contains some infrastructure for polling and interrupt
 * handling, as well as handling shifts in PHY hardware state
 */
struct phy_device {
	struct mdio_device mdio;

	/* Information about the PHY type */
	/* And management functions */
	struct phy_driver *drv;

	u32 phy_id;

	struct phy_c45_device_ids c45_ids;
	bool is_c45;
	bool is_internal;
	bool is_pseudo_fixed_link;
	bool has_fixups;
	bool suspended;
	bool suspended_by_mdio_bus;
	bool sysfs_links;
	bool loopback_enabled;

	enum phy_state state;

	u32 dev_flags;

	phy_interface_t interface;

	/*
	 * forced speed & duplex (no autoneg)
	 * partner speed & duplex & pause (autoneg)
	 */
	int speed;
	int duplex;
	int pause;
	int asym_pause;

	/* The most recently read link state */
	int link;

	/* Enabled Interrupts */
	u32 interrupts;

	/* Union of PHY and Attached devices' supported modes */
	/* See mii.h for more info */
	u32 supported;
	u32 advertising;
	u32 lp_advertising;

	/* Energy efficient ethernet modes which should be prohibited */
	u32 eee_broken_modes;

	int autoneg;

	int link_timeout;

#ifdef CONFIG_LED_TRIGGER_PHY
	struct phy_led_trigger *phy_led_triggers;
	unsigned int phy_num_led_triggers;
	struct phy_led_trigger *last_triggered;

	struct phy_led_trigger *led_link_trigger;
#endif

	/*
	 * Interrupt number for this PHY
	 * -1 means no interrupt
	 */
	int irq;

	/* private data pointer */
	/* For use by PHYs to maintain extra state */
	void *priv;

	/* Interrupt and Polling infrastructure */
	struct work_struct phy_queue;
	struct delayed_work state_queue;

	struct mutex lock;

	struct phylink *phylink;
	struct net_device *attached_dev;

	u8 mdix;
	u8 mdix_ctrl;

	void (*phy_link_change)(struct phy_device *, bool up, bool do_carrier);
	void (*adjust_link)(struct net_device *dev);
};
#define to_phy_device(d) container_of(to_mdio_device(d), \
				      struct phy_device, mdio)

/* struct phy_driver: Driver structure for a particular PHY type
 *
 * driver_data: static driver data
 * phy_id: The result of reading the UID registers of this PHY
 *   type, and ANDing them with the phy_id_mask.  This driver
 *   only works for PHYs with IDs which match this field
 * name: The friendly name of this PHY type
 * phy_id_mask: Defines the important bits of the phy_id
 * features: A list of features (speed, duplex, etc) supported
 *   by this PHY
 * flags: A bitfield defining certain other features this PHY
 *   supports (like interrupts)
 *
 * The drivers must implement config_aneg and read_status.  All
 * other functions are optional. Note that none of these
 * functions should be called from interrupt time.  The goal is
 * for the bus read/write functions to be able to block when the
 * bus transaction is happening, and be freed up by an interrupt
 * (The MPC85xx has this ability, though it is not currently
 * supported in the driver).
 */
struct phy_driver {
	struct mdio_driver_common mdiodrv;
	u32 phy_id;
	char *name;
	unsigned int phy_id_mask;
	u32 features;
	u32 flags;
	const void *driver_data;

	/*
	 * Called to issue a PHY software reset
	 */
	int (*soft_reset)(struct phy_device *phydev);

	/*
	 * Called to initialize the PHY,
	 * including after a reset
	 */
	int (*config_init)(struct phy_device *phydev);

	/*
	 * Called during discovery.  Used to set
	 * up device-specific structures, if any
	 */
	int (*probe)(struct phy_device *phydev);

	/* PHY Power Management */
	int (*suspend)(struct phy_device *phydev);
	int (*resume)(struct phy_device *phydev);

	/*
	 * Configures the advertisement and resets
	 * autonegotiation if phydev->autoneg is on,
	 * forces the speed to the current settings in phydev
	 * if phydev->autoneg is off
	 */
	int (*config_aneg)(struct phy_device *phydev);

	/* Determines the auto negotiation result */
	int (*aneg_done)(struct phy_device *phydev);

	/* Determines the negotiated speed and duplex */
	int (*read_status)(struct phy_device *phydev);

	/* Clears any pending interrupts */
	int (*ack_interrupt)(struct phy_device *phydev);

	/* Enables or disables interrupts */
	int (*config_intr)(struct phy_device *phydev);

	/*
	 * Checks if the PHY generated an interrupt.
	 * For multi-PHY devices with shared PHY interrupt pin
	 */
	int (*did_interrupt)(struct phy_device *phydev);

	/* Clears up any memory if needed */
	void (*remove)(struct phy_device *phydev);

	/* Returns true if this is a suitable driver for the given
	 * phydev.  If NULL, matching is based on phy_id and
	 * phy_id_mask.
	 */
	int (*match_phy_device)(struct phy_device *phydev);

	/* Handles ethtool queries for hardware time stamping. */
	int (*ts_info)(struct phy_device *phydev, struct ethtool_ts_info *ti);

	/* Handles SIOCSHWTSTAMP ioctl for hardware time stamping. */
	int  (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr);

	/*
	 * Requests a Rx timestamp for 'skb'. If the skb is accepted,
	 * the phy driver promises to deliver it using netif_rx() as
	 * soon as a timestamp becomes available. One of the
	 * PTP_CLASS_ values is passed in 'type'. The function must
	 * return true if the skb is accepted for delivery.
	 */
	bool (*rxtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);

	/*
	 * Requests a Tx timestamp for 'skb'. The phy driver promises
	 * to deliver it using skb_complete_tx_timestamp() as soon as a
	 * timestamp becomes available. One of the PTP_CLASS_ values
	 * is passed in 'type'.
	 */
	void (*txtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);

	/* Some devices (e.g. qnap TS-119P II) require PHY register changes to
	 * enable Wake on LAN, so set_wol is provided to be called in the
	 * ethernet driver's set_wol function. */
	int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);

	/* See set_wol, but for checking whether Wake on LAN is enabled. */
	void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);

	/*
	 * Called to inform a PHY device driver when the core is about to
	 * change the link state. This callback is supposed to be used as
	 * fixup hook for drivers that need to take action when the link
	 * state changes. Drivers are by no means allowed to mess with the
	 * PHY device structure in their implementations.
	 */
	void (*link_change_notify)(struct phy_device *dev);

	/*
	 * Phy specific driver override for reading a MMD register.
	 * This function is optional for PHY specific drivers.  When
	 * not provided, the default MMD read function will be used
	 * by phy_read_mmd(), which will use either a direct read for
	 * Clause 45 PHYs or an indirect read for Clause 22 PHYs.
	 *  devnum is the MMD device number within the PHY device,
	 *  regnum is the register within the selected MMD device.
	 */
	int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum);

	/*
	 * Phy specific driver override for writing a MMD register.
	 * This function is optional for PHY specific drivers.  When
	 * not provided, the default MMD write function will be used
	 * by phy_write_mmd(), which will use either a direct write for
	 * Clause 45 PHYs, or an indirect write for Clause 22 PHYs.
	 *  devnum is the MMD device number within the PHY device,
	 *  regnum is the register within the selected MMD device.
	 *  val is the value to be written.
	 */
	int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum,
			 u16 val);

	/* Get the size and type of the eeprom contained within a plug-in
	 * module */
	int (*module_info)(struct phy_device *dev,
			   struct ethtool_modinfo *modinfo);

	/* Get the eeprom information from the plug-in module */
	int (*module_eeprom)(struct phy_device *dev,
			     struct ethtool_eeprom *ee, u8 *data);

	/* Get statistics from the phy using ethtool */
	int (*get_sset_count)(struct phy_device *dev);
	void (*get_strings)(struct phy_device *dev, u8 *data);
	void (*get_stats)(struct phy_device *dev,
			  struct ethtool_stats *stats, u64 *data);

	/* Get and Set PHY tunables */
	int (*get_tunable)(struct phy_device *dev,
			   struct ethtool_tunable *tuna, void *data);
	int (*set_tunable)(struct phy_device *dev,
			    struct ethtool_tunable *tuna,
			    const void *data);
	int (*set_loopback)(struct phy_device *dev, bool enable);
};
#define to_phy_driver(d) container_of(to_mdio_common_driver(d),		\
				      struct phy_driver, mdiodrv)

#define PHY_ANY_ID "MATCH ANY PHY"
#define PHY_ANY_UID 0xffffffff

/* A Structure for boards to register fixups with the PHY Lib */
struct phy_fixup {
	struct list_head list;
	char bus_id[MII_BUS_ID_SIZE + 3];
	u32 phy_uid;
	u32 phy_uid_mask;
	int (*run)(struct phy_device *phydev);
};

const char *phy_speed_to_str(int speed);
const char *phy_duplex_to_str(unsigned int duplex);

/* A structure for mapping a particular speed and duplex
 * combination to a particular SUPPORTED and ADVERTISED value
 */
struct phy_setting {
	u32 speed;
	u8 duplex;
	u8 bit;
};

const struct phy_setting *
phy_lookup_setting(int speed, int duplex, const unsigned long *mask,
		   size_t maxbit, bool exact);
size_t phy_speeds(unsigned int *speeds, size_t size,
		  unsigned long *mask, size_t maxbit);

/**
 * phy_read_mmd - Convenience function for reading a register
 * from an MMD on a given PHY.
 * @phydev: The phy_device struct
 * @devad: The MMD to read from
 * @regnum: The register on the MMD to read
 *
 * Same rules as for phy_read();
 */
int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);

/**
 * phy_read - Convenience function for reading a given PHY register
 * @phydev: the phy_device struct
 * @regnum: register number to read
 *
 * NOTE: MUST NOT be called from interrupt context,
 * because the bus read/write functions may wait for an interrupt
 * to conclude the operation.
 */
static inline int phy_read(struct phy_device *phydev, u32 regnum)
{
	return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
}

/**
 * phy_write - Convenience function for writing a given PHY register
 * @phydev: the phy_device struct
 * @regnum: register number to write
 * @val: value to write to @regnum
 *
 * NOTE: MUST NOT be called from interrupt context,
 * because the bus read/write functions may wait for an interrupt
 * to conclude the operation.
 */
static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
{
	return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val);
}

/**
 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
 * @phydev: the phy_device struct
 *
 * NOTE: must be kept in sync with addition/removal of PHY_POLL and
 * PHY_IGNORE_INTERRUPT
 */
static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
{
	return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT;
}

/**
 * phy_is_internal - Convenience function for testing if a PHY is internal
 * @phydev: the phy_device struct
 */
static inline bool phy_is_internal(struct phy_device *phydev)
{
	return phydev->is_internal;
}

/**
 * phy_interface_mode_is_rgmii - Convenience function for testing if a
 * PHY interface mode is RGMII (all variants)
 * @mode: the phy_interface_t enum
 */
static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode)
{
	return mode >= PHY_INTERFACE_MODE_RGMII &&
		mode <= PHY_INTERFACE_MODE_RGMII_TXID;
};

/**
 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
 * is RGMII (all variants)
 * @phydev: the phy_device struct
 */
static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
{
	return phy_interface_mode_is_rgmii(phydev->interface);
};

/*
 * phy_is_pseudo_fixed_link - Convenience function for testing if this
 * PHY is the CPU port facing side of an Ethernet switch, or similar.
 * @phydev: the phy_device struct
 */
static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
{
	return phydev->is_pseudo_fixed_link;
}

/**
 * phy_write_mmd - Convenience function for writing a register
 * on an MMD on a given PHY.
 * @phydev: The phy_device struct
 * @devad: The MMD to read from
 * @regnum: The register on the MMD to read
 * @val: value to write to @regnum
 *
 * Same rules as for phy_write();
 */
int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);

struct phy_device *phy_device_create(struct mii_bus *bus, int addr, int phy_id,
				     bool is_c45,
				     struct phy_c45_device_ids *c45_ids);
#if IS_ENABLED(CONFIG_PHYLIB)
struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
int phy_device_register(struct phy_device *phy);
void phy_device_free(struct phy_device *phydev);
#else
static inline
struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45)
{
	return NULL;
}

static inline int phy_device_register(struct phy_device *phy)
{
	return 0;
}

static inline void phy_device_free(struct phy_device *phydev) { }
#endif /* CONFIG_PHYLIB */
void phy_device_remove(struct phy_device *phydev);
int phy_init_hw(struct phy_device *phydev);
int phy_suspend(struct phy_device *phydev);
int phy_resume(struct phy_device *phydev);
int __phy_resume(struct phy_device *phydev);
int phy_loopback(struct phy_device *phydev, bool enable);
struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
			      phy_interface_t interface);
struct phy_device *phy_find_first(struct mii_bus *bus);
int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
		      u32 flags, phy_interface_t interface);
int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
		       void (*handler)(struct net_device *),
		       phy_interface_t interface);
struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
			       void (*handler)(struct net_device *),
			       phy_interface_t interface);
void phy_disconnect(struct phy_device *phydev);
void phy_detach(struct phy_device *phydev);
void phy_start(struct phy_device *phydev);
void phy_stop(struct phy_device *phydev);
int phy_start_aneg(struct phy_device *phydev);
int phy_aneg_done(struct phy_device *phydev);

int phy_stop_interrupts(struct phy_device *phydev);
int phy_restart_aneg(struct phy_device *phydev);

static inline int phy_read_status(struct phy_device *phydev)
{
	if (!phydev->drv)
		return -EIO;

	return phydev->drv->read_status(phydev);
}

#define phydev_err(_phydev, format, args...)	\
	dev_err(&_phydev->mdio.dev, format, ##args)

#define phydev_dbg(_phydev, format, args...)	\
	dev_dbg(&_phydev->mdio.dev, format, ##args)

static inline const char *phydev_name(const struct phy_device *phydev)
{
	return dev_name(&phydev->mdio.dev);
}

void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
	__printf(2, 3);
void phy_attached_info(struct phy_device *phydev);

/* Clause 22 PHY */
int genphy_config_init(struct phy_device *phydev);
int genphy_setup_forced(struct phy_device *phydev);
int genphy_restart_aneg(struct phy_device *phydev);
int genphy_config_aneg(struct phy_device *phydev);
int genphy_aneg_done(struct phy_device *phydev);
int genphy_update_link(struct phy_device *phydev);
int genphy_read_status(struct phy_device *phydev);
int genphy_suspend(struct phy_device *phydev);
int genphy_resume(struct phy_device *phydev);
int genphy_loopback(struct phy_device *phydev, bool enable);
int genphy_soft_reset(struct phy_device *phydev);
static inline int genphy_no_soft_reset(struct phy_device *phydev)
{
	return 0;
}
int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad,
				u16 regnum);
int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum,
				 u16 regnum, u16 val);

/* Clause 45 PHY */
int genphy_c45_restart_aneg(struct phy_device *phydev);
int genphy_c45_aneg_done(struct phy_device *phydev);
int genphy_c45_read_link(struct phy_device *phydev, u32 mmd_mask);
int genphy_c45_read_lpa(struct phy_device *phydev);
int genphy_c45_read_pma(struct phy_device *phydev);
int genphy_c45_pma_setup_forced(struct phy_device *phydev);
int genphy_c45_an_disable_aneg(struct phy_device *phydev);

void phy_driver_unregister(struct phy_driver *drv);
void phy_drivers_unregister(struct phy_driver *drv, int n);
int phy_driver_register(struct phy_driver *new_driver, struct module *owner);
int phy_drivers_register(struct phy_driver *new_driver, int n,
			 struct module *owner);
void phy_state_machine(struct work_struct *work);
void phy_change_work(struct work_struct *work);
void phy_mac_interrupt(struct phy_device *phydev, int new_link);
void phy_start_machine(struct phy_device *phydev);
void phy_stop_machine(struct phy_device *phydev);
void phy_trigger_machine(struct phy_device *phydev, bool sync);
int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd);
void phy_ethtool_ksettings_get(struct phy_device *phydev,
			       struct ethtool_link_ksettings *cmd);
int phy_ethtool_ksettings_set(struct phy_device *phydev,
			      const struct ethtool_link_ksettings *cmd);
int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
int phy_start_interrupts(struct phy_device *phydev);
void phy_print_status(struct phy_device *phydev);
int phy_set_max_speed(struct phy_device *phydev, u32 max_speed);

int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
		       int (*run)(struct phy_device *));
int phy_register_fixup_for_id(const char *bus_id,
			      int (*run)(struct phy_device *));
int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
			       int (*run)(struct phy_device *));

int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
int phy_unregister_fixup_for_id(const char *bus_id);
int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);

int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
int phy_get_eee_err(struct phy_device *phydev);
int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
void phy_ethtool_get_wol(struct phy_device *phydev,
			 struct ethtool_wolinfo *wol);
int phy_ethtool_get_link_ksettings(struct net_device *ndev,
				   struct ethtool_link_ksettings *cmd);
int phy_ethtool_set_link_ksettings(struct net_device *ndev,
				   const struct ethtool_link_ksettings *cmd);
int phy_ethtool_nway_reset(struct net_device *ndev);

#if IS_ENABLED(CONFIG_PHYLIB)
int __init mdio_bus_init(void);
void mdio_bus_exit(void);
#endif

extern struct bus_type mdio_bus_type;

struct mdio_board_info {
	const char	*bus_id;
	char		modalias[MDIO_NAME_SIZE];
	int		mdio_addr;
	const void	*platform_data;
};

#if IS_ENABLED(CONFIG_MDIO_DEVICE)
int mdiobus_register_board_info(const struct mdio_board_info *info,
				unsigned int n);
#else
static inline int mdiobus_register_board_info(const struct mdio_board_info *i,
					      unsigned int n)
{
	return 0;
}
#endif


/**
 * module_phy_driver() - Helper macro for registering PHY drivers
 * @__phy_drivers: array of PHY drivers to register
 *
 * Helper macro for PHY drivers which do not do anything special in module
 * init/exit. Each module may only use this macro once, and calling it
 * replaces module_init() and module_exit().
 */
#define phy_module_driver(__phy_drivers, __count)			\
static int __init phy_module_init(void)					\
{									\
	return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \
}									\
module_init(phy_module_init);						\
static void __exit phy_module_exit(void)				\
{									\
	phy_drivers_unregister(__phy_drivers, __count);			\
}									\
module_exit(phy_module_exit)

#define module_phy_driver(__phy_drivers)				\
	phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))

#endif /* __PHY_H */

Filemanager

Name Type Size Permission Actions
amba Folder 0755
avf Folder 0755
bcma Folder 0755
byteorder Folder 0755
can Folder 0755
ceph Folder 0755
clk Folder 0755
crush Folder 0755
decompress Folder 0755
dma Folder 0755
dsa Folder 0755
extcon Folder 0755
firmware Folder 0755
fpga Folder 0755
fsl Folder 0755
gpio Folder 0755
hsi Folder 0755
i2c Folder 0755
iio Folder 0755
input Folder 0755
irqchip Folder 0755
isdn Folder 0755
lockd Folder 0755
mailbox Folder 0755
mfd Folder 0755
mlx4 Folder 0755
mlx5 Folder 0755
mmc Folder 0755
mtd Folder 0755
mux Folder 0755
netfilter Folder 0755
netfilter_arp Folder 0755
netfilter_bridge Folder 0755
netfilter_ipv4 Folder 0755
netfilter_ipv6 Folder 0755
perf Folder 0755
phy Folder 0755
pinctrl Folder 0755
platform_data Folder 0755
power Folder 0755
qed Folder 0755
raid Folder 0755
regulator Folder 0755
remoteproc Folder 0755
reset Folder 0755
rpmsg Folder 0755
rtc Folder 0755
sched Folder 0755
soc Folder 0755
spi Folder 0755
ssb Folder 0755
sunrpc Folder 0755
ulpi Folder 0755
unaligned Folder 0755
usb Folder 0755
uwb Folder 0755
wimax Folder 0755
8250_pci.h File 1.01 KB 0644
a.out.h File 354 B 0644
acct.h File 2.49 KB 0644
acpi.h File 36.89 KB 0644
acpi_dma.h File 3.22 KB 0644
acpi_iort.h File 2.15 KB 0644
acpi_pmtmr.h File 674 B 0644
adb.h File 1.79 KB 0644
adfs_fs.h File 574 B 0644
aer.h File 1.71 KB 0644
agp_backend.h File 3.45 KB 0644
agpgart.h File 3.82 KB 0644
ahci-remap.h File 607 B 0644
ahci_platform.h File 1.67 KB 0644
aio.h File 673 B 0644
alarmtimer.h File 1.83 KB 0644
altera_jtaguart.h File 379 B 0644
altera_uart.h File 397 B 0644
amd-iommu.h File 6.78 KB 0644
amifd.h File 1.99 KB 0644
amifdreg.h File 2.65 KB 0644
anon_inodes.h File 494 B 0644
apm-emulation.h File 1.54 KB 0644
apm_bios.h File 2.68 KB 0644
apple-gmux.h File 1.42 KB 0644
apple_bl.h File 498 B 0644
arch_topology.h File 840 B 0644
arm-cci.h File 2.01 KB 0644
arm-smccc.h File 12.79 KB 0644
arm_sdei.h File 2.33 KB 0644
asn1.h File 1.99 KB 0644
asn1_ber_bytecode.h File 2.72 KB 0644
asn1_decoder.h File 675 B 0644
assoc_array.h File 3.07 KB 0644
assoc_array_priv.h File 5.49 KB 0644
async.h File 1.65 KB 0644
async_tx.h File 6.81 KB 0644
ata.h File 33.18 KB 0644
ata_platform.h File 729 B 0644
atalk.h File 4.36 KB 0644
ath9k_platform.h File 1.44 KB 0644
atm.h File 287 B 0644
atm_suni.h File 253 B 0644
atm_tcp.h File 511 B 0644
atmdev.h File 10.21 KB 0644
atmel-mci.h File 1.4 KB 0644
atmel-ssc.h File 9.74 KB 0644
atmel_pdc.h File 1.47 KB 0644
atmel_tc.h File 11.33 KB 0644
atomic.h File 30.5 KB 0644
attribute_container.h File 2.47 KB 0644
audit.h File 17.22 KB 0644
auto_dev-ioctl.h File 454 B 0644
auto_fs.h File 436 B 0644
auxvec.h File 304 B 0644
average.h File 2.42 KB 0644
b1pcmcia.h File 666 B 0644
backing-dev-defs.h File 8.53 KB 0644
backing-dev.h File 13.8 KB 0644
backlight.h File 5.3 KB 0644
badblocks.h File 2.14 KB 0644
balloon_compaction.h File 7.2 KB 0644
bcd.h File 559 B 0644
bch.h File 2.6 KB 0644
bcm47xx_nvram.h File 1.22 KB 0644
bcm47xx_sprom.h File 600 B 0644
bcm47xx_wdt.h File 555 B 0644
bcm963xx_nvram.h File 2.96 KB 0644
bcm963xx_tag.h File 3.6 KB 0644
bfin_mac.h File 559 B 0644
binfmts.h File 4.77 KB 0644
bio.h File 20.17 KB 0644
bit_spinlock.h File 2.3 KB 0644
bitfield.h File 3.2 KB 0644
bitmap.h File 16.68 KB 0644
bitops.h File 6.69 KB 0644
bitrev.h File 2.53 KB 0644
bits.h File 833 B 0644
blk-cgroup.h File 22.2 KB 0644
blk-mq-pci.h File 247 B 0644
blk-mq-rdma.h File 232 B 0644
blk-mq-virtio.h File 288 B 0644
blk-mq.h File 9.09 KB 0644
blk_types.h File 10.52 KB 0644
blkdev.h File 58.96 KB 0644
blkpg.h File 436 B 0644
blktrace_api.h File 3.87 KB 0644
blockgroup_lock.h File 810 B 0644
bma150.h File 1.89 KB 0644
bootmem.h File 11.7 KB 0644
bottom_half.h File 803 B 0644
bpf-cgroup.h File 4.53 KB 0644
bpf.h File 18.51 KB 0644
bpf_trace.h File 196 B 0644
bpf_types.h File 1.88 KB 0644
bpf_verifier.h File 6.76 KB 0644
brcmphy.h File 9.88 KB 0644
bsearch.h File 275 B 0644
bsg-lib.h File 2.13 KB 0644
bsg.h File 773 B 0644
btree-128.h File 2.67 KB 0644
btree-type.h File 3.9 KB 0644
btree.h File 6.83 KB 0644
btrfs.h File 145 B 0644
buffer_head.h File 14.04 KB 0644
bug.h File 1.92 KB 0644
build_bug.h File 3.15 KB 0644
bvec.h File 4.39 KB 0644
c2port.h File 1.49 KB 0644
cache.h File 2.13 KB 0644
cacheinfo.h File 3.27 KB 0644
capability.h File 7.6 KB 0644
cb710.h File 5.69 KB 0644
cciss_ioctl.h File 1.03 KB 0644
ccp.h File 18.26 KB 0644
cdev.h File 845 B 0644
cdrom.h File 8.75 KB 0644
cfag12864b.h File 2.1 KB 0644
cgroup-defs.h File 25.38 KB 0644
cgroup.h File 26.07 KB 0644
cgroup_rdma.h File 1.33 KB 0644
cgroup_subsys.h File 1.17 KB 0644
circ_buf.h File 1.08 KB 0644
cleancache.h File 3.89 KB 0644
clk-provider.h File 34.29 KB 0644
clk.h File 19.38 KB 0644
clkdev.h File 1.54 KB 0644
clock_cooling.h File 2.06 KB 0644
clockchips.h File 7.27 KB 0644
clocksource.h File 8.31 KB 0644
cm4000_cs.h File 199 B 0644
cma.h File 1.19 KB 0644
cmdline-parser.h File 1.21 KB 0644
cn_proc.h File 1.85 KB 0644
cnt32_to_63.h File 3.6 KB 0644
coda.h File 2.16 KB 0644
coda_psdev.h File 2.98 KB 0644
compaction.h File 7.1 KB 0644
compat.h File 27.39 KB 0644
compiler-clang.h File 1.31 KB 0644
compiler-gcc.h File 12.6 KB 0644
compiler-intel.h File 1.3 KB 0644
compiler.h File 10.06 KB 0644
compiler_types.h File 7.5 KB 0644
completion.h File 4.05 KB 0644
component.h File 1.37 KB 0644
concap.h File 3.69 KB 0644
configfs.h File 9.22 KB 0644
connector.h File 2.43 KB 0644
console.h File 6.72 KB 0644
console_struct.h File 6.87 KB 0644
consolemap.h File 1.04 KB 0644
container.h File 668 B 0644
context_tracking.h File 4.43 KB 0644
context_tracking_state.h File 1.39 KB 0644
cordic.h File 1.75 KB 0644
coredump.h File 783 B 0644
coresight-pmu.h File 1.44 KB 0644
coresight-stm.h File 152 B 0644
coresight.h File 9.86 KB 0644
count_zeros.h File 1.62 KB 0644
cper.h File 16.11 KB 0644
cpu.h File 6.76 KB 0644
cpu_cooling.h File 3.59 KB 0644
cpu_pm.h File 2.78 KB 0644
cpu_rmap.h File 1.86 KB 0644
cpufeature.h File 1.85 KB 0644
cpufreq.h File 27.62 KB 0644
cpuhotplug.h File 12.05 KB 0644
cpuidle.h File 8.68 KB 0644
cpumask.h File 25.38 KB 0644
cpuset.h File 7.07 KB 0644
crash_core.h File 2.99 KB 0644
crash_dump.h File 2.98 KB 0644
crc-ccitt.h File 369 B 0644
crc-itu-t.h File 613 B 0644
crc-t10dif.h File 415 B 0644
crc16.h File 622 B 0644
crc32.h File 2.83 KB 0644
crc32c.h File 293 B 0644
crc4.h File 192 B 0644
crc7.h File 316 B 0644
crc8.h File 3.65 KB 0644
cred.h File 12.23 KB 0644
crypto.h File 55.52 KB 0644
cryptohash.h File 319 B 0644
cs5535.h File 6.28 KB 0644
ctype.h File 1.75 KB 0644
cuda.h File 501 B 0644
cyclades.h File 10.36 KB 0644
davinci_emac.h File 1.12 KB 0644
dax.h File 3.65 KB 0644
dca.h File 2.63 KB 0644
dcache.h File 18.78 KB 0644
dccp.h File 10.73 KB 0644
dcookies.h File 1.3 KB 0644
debug_locks.h File 1.51 KB 0644
debugfs.h File 10.51 KB 0644
debugobjects.h File 3.89 KB 0644
delay.h File 1.83 KB 0644
delayacct.h File 5.17 KB 0644
delayed_call.h File 709 B 0644
dell-led.h File 128 B 0644
devcoredump.h File 2.78 KB 0644
devfreq-event.h File 5.64 KB 0644
devfreq.h File 12.53 KB 0644
devfreq_cooling.h File 3.54 KB 0644
device-mapper.h File 17.85 KB 0644
device.h File 55.51 KB 0644
device_cgroup.h File 1.86 KB 0644
devpts_fs.h File 1.28 KB 0644
digsig.h File 1.35 KB 0644
dim.h File 8.98 KB 0644
dio.h File 10.97 KB 0644
dirent.h File 216 B 0644
dlm.h File 6.01 KB 0644
dlm_plock.h File 678 B 0644
dm-dirty-log.h File 3.94 KB 0644
dm-io.h File 1.93 KB 0644
dm-kcopyd.h File 2.88 KB 0644
dm-region-hash.h File 3.11 KB 0644
dm9000.h File 1.11 KB 0644
dma-buf.h File 14.7 KB 0644
dma-contiguous.h File 4.48 KB 0644
dma-debug.h File 5.61 KB 0644
dma-direction.h File 338 B 0644
dma-fence-array.h File 2.49 KB 0644
dma-fence.h File 17.29 KB 0644
dma-iommu.h File 3.62 KB 0644
dma-mapping.h File 24.61 KB 0644
dma_remapping.h File 1.46 KB 0644
dmaengine.h File 46.04 KB 0644
dmapool.h File 1.09 KB 0644
dmar.h File 7.94 KB 0644
dmi.h File 4.08 KB 0644
dnotify.h File 1.02 KB 0644
dns_resolver.h File 1.31 KB 0644
dqblk_qtree.h File 2.19 KB 0644
dqblk_v1.h File 327 B 0644
dqblk_v2.h File 406 B 0644
drbd.h File 10.67 KB 0644
drbd_genl.h File 21.49 KB 0644
drbd_genl_api.h File 1.77 KB 0644
drbd_limits.h File 7.82 KB 0644
ds2782_battery.h File 158 B 0644
dtlk.h File 3.5 KB 0644
dw_apb_timer.h File 1.7 KB 0644
dynamic_debug.h File 5.08 KB 0644
dynamic_queue_limits.h File 3.7 KB 0644
earlycpio.h File 359 B 0644
ecryptfs.h File 3.82 KB 0644
edac.h File 20.26 KB 0644
edd.h File 1.43 KB 0644
edma.h File 807 B 0644
eeprom_93cx6.h File 2.94 KB 0644
eeprom_93xx46.h File 879 B 0644
efi-bgrt.h File 644 B 0644
efi.h File 49.1 KB 0644
efs_vh.h File 1.55 KB 0644
eisa.h File 2.96 KB 0644
elevator.h File 9.26 KB 0644
elf-fdpic.h File 2.18 KB 0644
elf-randomize.h File 583 B 0644
elf.h File 1.53 KB 0644
elfcore-compat.h File 1.24 KB 0644
elfcore.h File 2.52 KB 0644
elfnote.h File 3.54 KB 0644
enclosure.h File 4.6 KB 0644
err.h File 1.55 KB 0644
errno.h File 1.34 KB 0644
errqueue.h File 524 B 0644
errseq.h File 373 B 0644
etherdevice.h File 15.65 KB 0644
ethtool.h File 17.3 KB 0644
eventfd.h File 2.36 KB 0644
eventpoll.h File 2.16 KB 0644
evm.h File 2.65 KB 0644
export.h File 3.88 KB 0644
exportfs.h File 7.45 KB 0644
ext2_fs.h File 967 B 0644
extable.h File 999 B 0644
extcon-provider.h File 4.33 KB 0644
extcon.h File 10.4 KB 0644
f2fs_fs.h File 17.51 KB 0644
f75375s.h File 541 B 0644
falloc.h File 792 B 0644
fanotify.h File 245 B 0644
fault-inject.h File 1.87 KB 0644
fb.h File 28.74 KB 0644
fbcon.h File 492 B 0644
fcdevice.h File 988 B 0644
fcntl.h File 1.27 KB 0644
fd.h File 490 B 0644
fddidevice.h File 1.02 KB 0644
fdtable.h File 3.28 KB 0644
fec.h File 609 B 0644
file.h File 2.18 KB 0644
filter.h File 27.5 KB 0644
fips.h File 167 B 0644
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