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/*
 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 *  vineetg: May 2011: for Non-aliasing VIPT D-cache following can be NOPs
 *   -flush_cache_dup_mm (fork)
 *   -likewise for flush_cache_mm (exit/execve)
 *   -likewise for flush_cache_{range,page} (munmap, exit, COW-break)
 *
 *  vineetg: April 2008
 *   -Added a critical CacheLine flush to copy_to_user_page( ) which
 *     was causing gdbserver to not setup breakpoints consistently
 */

#ifndef _ASM_CACHEFLUSH_H
#define _ASM_CACHEFLUSH_H

#include <linux/mm.h>
#include <asm/shmparam.h>

/*
 * Semantically we need this because icache doesn't snoop dcache/dma.
 * However ARC Cache flush requires paddr as well as vaddr, latter not available
 * in the flush_icache_page() API. So we no-op it but do the equivalent work
 * in update_mmu_cache()
 */
#define flush_icache_page(vma, page)

void flush_cache_all(void);

void flush_icache_range(unsigned long kstart, unsigned long kend);
void __sync_icache_dcache(phys_addr_t paddr, unsigned long vaddr, int len);
void __inv_icache_page(phys_addr_t paddr, unsigned long vaddr);
void __flush_dcache_page(phys_addr_t paddr, unsigned long vaddr);

#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1

void flush_dcache_page(struct page *page);

void dma_cache_wback_inv(phys_addr_t start, unsigned long sz);
void dma_cache_inv(phys_addr_t start, unsigned long sz);
void dma_cache_wback(phys_addr_t start, unsigned long sz);

#define flush_dcache_mmap_lock(mapping)		do { } while (0)
#define flush_dcache_mmap_unlock(mapping)	do { } while (0)

/* TBD: optimize this */
#define flush_cache_vmap(start, end)		flush_cache_all()
#define flush_cache_vunmap(start, end)		flush_cache_all()

#define flush_cache_dup_mm(mm)			/* called on fork (VIVT only) */

#ifndef CONFIG_ARC_CACHE_VIPT_ALIASING

#define flush_cache_mm(mm)			/* called on munmap/exit */
#define flush_cache_range(mm, u_vstart, u_vend)
#define flush_cache_page(vma, u_vaddr, pfn)	/* PF handling/COW-break */

#else	/* VIPT aliasing dcache */

/* To clear out stale userspace mappings */
void flush_cache_mm(struct mm_struct *mm);
void flush_cache_range(struct vm_area_struct *vma,
	unsigned long start,unsigned long end);
void flush_cache_page(struct vm_area_struct *vma,
	unsigned long user_addr, unsigned long page);

/*
 * To make sure that userspace mapping is flushed to memory before
 * get_user_pages() uses a kernel mapping to access the page
 */
#define ARCH_HAS_FLUSH_ANON_PAGE
void flush_anon_page(struct vm_area_struct *vma,
	struct page *page, unsigned long u_vaddr);

#endif	/* CONFIG_ARC_CACHE_VIPT_ALIASING */

/*
 * A new pagecache page has PG_arch_1 clear - thus dcache dirty by default
 * This works around some PIO based drivers which don't call flush_dcache_page
 * to record that they dirtied the dcache
 */
#define PG_dc_clean	PG_arch_1

#define CACHE_COLORS_NUM	4
#define CACHE_COLORS_MSK	(CACHE_COLORS_NUM - 1)
#define CACHE_COLOR(addr)	(((unsigned long)(addr) >> (PAGE_SHIFT)) & CACHE_COLORS_MSK)

/*
 * Simple wrapper over config option
 * Bootup code ensures that hardware matches kernel configuration
 */
static inline int cache_is_vipt_aliasing(void)
{
	return IS_ENABLED(CONFIG_ARC_CACHE_VIPT_ALIASING);
}

/*
 * checks if two addresses (after page aligning) index into same cache set
 */
#define addr_not_cache_congruent(addr1, addr2)				\
({									\
	cache_is_vipt_aliasing() ? 					\
		(CACHE_COLOR(addr1) != CACHE_COLOR(addr2)) : 0;		\
})

#define copy_to_user_page(vma, page, vaddr, dst, src, len)		\
do {									\
	memcpy(dst, src, len);						\
	if (vma->vm_flags & VM_EXEC)					\
		__sync_icache_dcache((unsigned long)(dst), vaddr, len);	\
} while (0)

#define copy_from_user_page(vma, page, vaddr, dst, src, len)		\
	memcpy(dst, src, len);						\

#endif

Filemanager

Name Type Size Permission Actions
Kbuild File 681 B 0644
arcregs.h File 8.59 KB 0644
asm-offsets.h File 311 B 0644
atomic.h File 15.14 KB 0644
barrier.h File 1.75 KB 0644
bitops.h File 9.81 KB 0644
bug.h File 938 B 0644
cache.h File 3.77 KB 0644
cacheflush.h File 3.88 KB 0644
checksum.h File 2.45 KB 0644
cmpxchg.h File 5.4 KB 0644
current.h File 695 B 0644
delay.h File 1.99 KB 0644
disasm.h File 3.87 KB 0644
dma-mapping.h File 734 B 0644
dma.h File 459 B 0644
dwarf.h File 892 B 0644
elf.h File 2.15 KB 0644
entry-arcv2.h File 4.85 KB 0644
entry-compact.h File 9.29 KB 0644
entry.h File 6.73 KB 0644
exec.h File 410 B 0644
fb.h File 411 B 0644
futex.h File 3.67 KB 0644
highmem.h File 1.46 KB 0644
hugepage.h File 2.41 KB 0644
io.h File 6.43 KB 0644
irq.h File 825 B 0644
irqflags-arcv2.h File 3.45 KB 0644
irqflags-compact.h File 4.25 KB 0644
irqflags.h File 509 B 0644
kdebug.h File 400 B 0644
kgdb.h File 1.35 KB 0644
kmap_types.h File 489 B 0644
kprobes.h File 1.37 KB 0644
linkage.h File 1.42 KB 0644
mach_desc.h File 2.06 KB 0644
mmu.h File 2.44 KB 0644
mmu_context.h File 5.67 KB 0644
mmzone.h File 989 B 0644
module.h File 661 B 0644
page.h File 2.99 KB 0644
pci.h File 705 B 0644
perf_event.h File 6.86 KB 0644
pgalloc.h File 3.79 KB 0644
pgtable.h File 14.2 KB 0644
processor.h File 4.69 KB 0644
ptrace.h File 3.87 KB 0644
sections.h File 407 B 0644
segment.h File 612 B 0644
serial.h File 644 B 0644
setup.h File 1.18 KB 0644
shmparam.h File 442 B 0644
smp.h File 4.25 KB 0644
spinlock.h File 8.79 KB 0644
spinlock_types.h File 1.03 KB 0644
stacktrace.h File 1.29 KB 0644
string.h File 1.15 KB 0644
switch_to.h File 1.17 KB 0644
syscall.h File 1.57 KB 0644
syscalls.h File 653 B 0644
thread_info.h File 3.39 KB 0644
timex.h File 508 B 0644
tlb-mmu1.h File 3.48 KB 0644
tlb.h File 1.23 KB 0644
tlbflush.h File 1.76 KB 0644
uaccess.h File 18.45 KB 0644
unaligned.h File 771 B 0644
unwind.h File 3.51 KB 0644