/* * arch/arm/include/asm/arch_gicv3.h * * Copyright (C) 2015 ARM Ltd. * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program. If not, see <http://www.gnu.org/licenses/>. */ #ifndef __ASM_ARCH_GICV3_H #define __ASM_ARCH_GICV3_H #ifndef __ASSEMBLY__ #include <linux/io.h> #include <asm/barrier.h> #include <asm/cacheflush.h> #include <asm/cp15.h> #define ICC_EOIR1 __ACCESS_CP15(c12, 0, c12, 1) #define ICC_DIR __ACCESS_CP15(c12, 0, c11, 1) #define ICC_IAR1 __ACCESS_CP15(c12, 0, c12, 0) #define ICC_SGI1R __ACCESS_CP15_64(0, c12) #define ICC_PMR __ACCESS_CP15(c4, 0, c6, 0) #define ICC_CTLR __ACCESS_CP15(c12, 0, c12, 4) #define ICC_SRE __ACCESS_CP15(c12, 0, c12, 5) #define ICC_IGRPEN1 __ACCESS_CP15(c12, 0, c12, 7) #define ICC_BPR1 __ACCESS_CP15(c12, 0, c12, 3) #define ICC_HSRE __ACCESS_CP15(c12, 4, c9, 5) #define ICH_VSEIR __ACCESS_CP15(c12, 4, c9, 4) #define ICH_HCR __ACCESS_CP15(c12, 4, c11, 0) #define ICH_VTR __ACCESS_CP15(c12, 4, c11, 1) #define ICH_MISR __ACCESS_CP15(c12, 4, c11, 2) #define ICH_EISR __ACCESS_CP15(c12, 4, c11, 3) #define ICH_ELSR __ACCESS_CP15(c12, 4, c11, 5) #define ICH_VMCR __ACCESS_CP15(c12, 4, c11, 7) #define __LR0(x) __ACCESS_CP15(c12, 4, c12, x) #define __LR8(x) __ACCESS_CP15(c12, 4, c13, x) #define ICH_LR0 __LR0(0) #define ICH_LR1 __LR0(1) #define ICH_LR2 __LR0(2) #define ICH_LR3 __LR0(3) #define ICH_LR4 __LR0(4) #define ICH_LR5 __LR0(5) #define ICH_LR6 __LR0(6) #define ICH_LR7 __LR0(7) #define ICH_LR8 __LR8(0) #define ICH_LR9 __LR8(1) #define ICH_LR10 __LR8(2) #define ICH_LR11 __LR8(3) #define ICH_LR12 __LR8(4) #define ICH_LR13 __LR8(5) #define ICH_LR14 __LR8(6) #define ICH_LR15 __LR8(7) /* LR top half */ #define __LRC0(x) __ACCESS_CP15(c12, 4, c14, x) #define __LRC8(x) __ACCESS_CP15(c12, 4, c15, x) #define ICH_LRC0 __LRC0(0) #define ICH_LRC1 __LRC0(1) #define ICH_LRC2 __LRC0(2) #define ICH_LRC3 __LRC0(3) #define ICH_LRC4 __LRC0(4) #define ICH_LRC5 __LRC0(5) #define ICH_LRC6 __LRC0(6) #define ICH_LRC7 __LRC0(7) #define ICH_LRC8 __LRC8(0) #define ICH_LRC9 __LRC8(1) #define ICH_LRC10 __LRC8(2) #define ICH_LRC11 __LRC8(3) #define ICH_LRC12 __LRC8(4) #define ICH_LRC13 __LRC8(5) #define ICH_LRC14 __LRC8(6) #define ICH_LRC15 __LRC8(7) #define __AP0Rx(x) __ACCESS_CP15(c12, 4, c8, x) #define ICH_AP0R0 __AP0Rx(0) #define ICH_AP0R1 __AP0Rx(1) #define ICH_AP0R2 __AP0Rx(2) #define ICH_AP0R3 __AP0Rx(3) #define __AP1Rx(x) __ACCESS_CP15(c12, 4, c9, x) #define ICH_AP1R0 __AP1Rx(0) #define ICH_AP1R1 __AP1Rx(1) #define ICH_AP1R2 __AP1Rx(2) #define ICH_AP1R3 __AP1Rx(3) /* A32-to-A64 mappings used by VGIC save/restore */ #define CPUIF_MAP(a32, a64) \ static inline void write_ ## a64(u32 val) \ { \ write_sysreg(val, a32); \ } \ static inline u32 read_ ## a64(void) \ { \ return read_sysreg(a32); \ } \ #define CPUIF_MAP_LO_HI(a32lo, a32hi, a64) \ static inline void write_ ## a64(u64 val) \ { \ write_sysreg(lower_32_bits(val), a32lo);\ write_sysreg(upper_32_bits(val), a32hi);\ } \ static inline u64 read_ ## a64(void) \ { \ u64 val = read_sysreg(a32lo); \ \ val |= (u64)read_sysreg(a32hi) << 32; \ \ return val; \ } CPUIF_MAP(ICH_HCR, ICH_HCR_EL2) CPUIF_MAP(ICH_VTR, ICH_VTR_EL2) CPUIF_MAP(ICH_MISR, ICH_MISR_EL2) CPUIF_MAP(ICH_EISR, ICH_EISR_EL2) CPUIF_MAP(ICH_ELSR, ICH_ELSR_EL2) CPUIF_MAP(ICH_VMCR, ICH_VMCR_EL2) CPUIF_MAP(ICH_AP0R3, ICH_AP0R3_EL2) CPUIF_MAP(ICH_AP0R2, ICH_AP0R2_EL2) CPUIF_MAP(ICH_AP0R1, ICH_AP0R1_EL2) CPUIF_MAP(ICH_AP0R0, ICH_AP0R0_EL2) CPUIF_MAP(ICH_AP1R3, ICH_AP1R3_EL2) CPUIF_MAP(ICH_AP1R2, ICH_AP1R2_EL2) CPUIF_MAP(ICH_AP1R1, ICH_AP1R1_EL2) CPUIF_MAP(ICH_AP1R0, ICH_AP1R0_EL2) CPUIF_MAP(ICC_HSRE, ICC_SRE_EL2) CPUIF_MAP(ICC_SRE, ICC_SRE_EL1) CPUIF_MAP_LO_HI(ICH_LR15, ICH_LRC15, ICH_LR15_EL2) CPUIF_MAP_LO_HI(ICH_LR14, ICH_LRC14, ICH_LR14_EL2) CPUIF_MAP_LO_HI(ICH_LR13, ICH_LRC13, ICH_LR13_EL2) CPUIF_MAP_LO_HI(ICH_LR12, ICH_LRC12, ICH_LR12_EL2) CPUIF_MAP_LO_HI(ICH_LR11, ICH_LRC11, ICH_LR11_EL2) CPUIF_MAP_LO_HI(ICH_LR10, ICH_LRC10, ICH_LR10_EL2) CPUIF_MAP_LO_HI(ICH_LR9, ICH_LRC9, ICH_LR9_EL2) CPUIF_MAP_LO_HI(ICH_LR8, ICH_LRC8, ICH_LR8_EL2) CPUIF_MAP_LO_HI(ICH_LR7, ICH_LRC7, ICH_LR7_EL2) CPUIF_MAP_LO_HI(ICH_LR6, ICH_LRC6, ICH_LR6_EL2) CPUIF_MAP_LO_HI(ICH_LR5, ICH_LRC5, ICH_LR5_EL2) CPUIF_MAP_LO_HI(ICH_LR4, ICH_LRC4, ICH_LR4_EL2) CPUIF_MAP_LO_HI(ICH_LR3, ICH_LRC3, ICH_LR3_EL2) CPUIF_MAP_LO_HI(ICH_LR2, ICH_LRC2, ICH_LR2_EL2) CPUIF_MAP_LO_HI(ICH_LR1, ICH_LRC1, ICH_LR1_EL2) CPUIF_MAP_LO_HI(ICH_LR0, ICH_LRC0, ICH_LR0_EL2) #define read_gicreg(r) read_##r() #define write_gicreg(v, r) write_##r(v) /* Low-level accessors */ static inline void gic_write_eoir(u32 irq) { write_sysreg(irq, ICC_EOIR1); isb(); } static inline void gic_write_dir(u32 val) { write_sysreg(val, ICC_DIR); isb(); } static inline u32 gic_read_iar(void) { u32 irqstat = read_sysreg(ICC_IAR1); dsb(sy); return irqstat; } static inline void gic_write_pmr(u32 val) { write_sysreg(val, ICC_PMR); } static inline void gic_write_ctlr(u32 val) { write_sysreg(val, ICC_CTLR); isb(); } static inline u32 gic_read_ctlr(void) { return read_sysreg(ICC_CTLR); } static inline void gic_write_grpen1(u32 val) { write_sysreg(val, ICC_IGRPEN1); isb(); } static inline void gic_write_sgi1r(u64 val) { write_sysreg(val, ICC_SGI1R); } static inline u32 gic_read_sre(void) { return read_sysreg(ICC_SRE); } static inline void gic_write_sre(u32 val) { write_sysreg(val, ICC_SRE); isb(); } static inline void gic_write_bpr1(u32 val) { write_sysreg(val, ICC_BPR1); } /* * Even in 32bit systems that use LPAE, there is no guarantee that the I/O * interface provides true 64bit atomic accesses, so using strd/ldrd doesn't * make much sense. * Moreover, 64bit I/O emulation is extremely difficult to implement on * AArch32, since the syndrome register doesn't provide any information for * them. * Consequently, the following IO helpers use 32bit accesses. */ static inline void __gic_writeq_nonatomic(u64 val, volatile void __iomem *addr) { writel_relaxed((u32)val, addr); writel_relaxed((u32)(val >> 32), addr + 4); } static inline u64 __gic_readq_nonatomic(const volatile void __iomem *addr) { u64 val; val = readl_relaxed(addr); val |= (u64)readl_relaxed(addr + 4) << 32; return val; } #define gic_flush_dcache_to_poc(a,l) __cpuc_flush_dcache_area((a), (l)) /* * GICD_IROUTERn, contain the affinity values associated to each interrupt. * The upper-word (aff3) will always be 0, so there is no need for a lock. */ #define gic_write_irouter(v, c) __gic_writeq_nonatomic(v, c) /* * GICR_TYPER is an ID register and doesn't need atomicity. */ #define gic_read_typer(c) __gic_readq_nonatomic(c) /* * GITS_BASER - hi and lo bits may be accessed independently. */ #define gits_read_baser(c) __gic_readq_nonatomic(c) #define gits_write_baser(v, c) __gic_writeq_nonatomic(v, c) /* * GICR_PENDBASER and GICR_PROPBASE are changed with LPIs disabled, so they * won't be being used during any updates and can be changed non-atomically */ #define gicr_read_propbaser(c) __gic_readq_nonatomic(c) #define gicr_write_propbaser(v, c) __gic_writeq_nonatomic(v, c) #define gicr_read_pendbaser(c) __gic_readq_nonatomic(c) #define gicr_write_pendbaser(v, c) __gic_writeq_nonatomic(v, c) /* * GICR_xLPIR - only the lower bits are significant */ #define gic_read_lpir(c) readl_relaxed(c) #define gic_write_lpir(v, c) writel_relaxed(lower_32_bits(v), c) /* * GITS_TYPER is an ID register and doesn't need atomicity. */ #define gits_read_typer(c) __gic_readq_nonatomic(c) /* * GITS_CBASER - hi and lo bits may be accessed independently. */ #define gits_read_cbaser(c) __gic_readq_nonatomic(c) #define gits_write_cbaser(v, c) __gic_writeq_nonatomic(v, c) /* * GITS_CWRITER - hi and lo bits may be accessed independently. */ #define gits_write_cwriter(v, c) __gic_writeq_nonatomic(v, c) /* * GITS_VPROPBASER - hi and lo bits may be accessed independently. */ #define gits_write_vpropbaser(v, c) __gic_writeq_nonatomic(v, c) /* * GITS_VPENDBASER - the Valid bit must be cleared before changing * anything else. */ static inline void gits_write_vpendbaser(u64 val, void * __iomem addr) { u32 tmp; tmp = readl_relaxed(addr + 4); if (tmp & (GICR_VPENDBASER_Valid >> 32)) { tmp &= ~(GICR_VPENDBASER_Valid >> 32); writel_relaxed(tmp, addr + 4); } /* * Use the fact that __gic_writeq_nonatomic writes the second * half of the 64bit quantity after the first. */ __gic_writeq_nonatomic(val, addr); } #define gits_read_vpendbaser(c) __gic_readq_nonatomic(c) #endif /* !__ASSEMBLY__ */ #endif /* !__ASM_ARCH_GICV3_H */
Name | Type | Size | Permission | Actions |
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hardware | Folder | 0755 |
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mach | Folder | 0755 |
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xen | Folder | 0755 |
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Kbuild | File | 568 B | 0644 |
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arch_gicv3.h | File | 9.05 KB | 0644 |
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arch_timer.h | File | 2.48 KB | 0644 |
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arm-cci.h | File | 1.05 KB | 0644 |
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asm-offsets.h | File | 35 B | 0644 |
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assembler.h | File | 10.46 KB | 0644 |
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atomic.h | File | 13.22 KB | 0644 |
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auxvec.h | File | 29 B | 0644 |
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bL_switcher.h | File | 2.28 KB | 0644 |
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barrier.h | File | 2.84 KB | 0644 |
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bitops.h | File | 8.62 KB | 0644 |
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bitrev.h | File | 451 B | 0644 |
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bug.h | File | 2.46 KB | 0644 |
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bugs.h | File | 546 B | 0644 |
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cache.h | File | 813 B | 0644 |
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cacheflush.h | File | 15.54 KB | 0644 |
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cachetype.h | File | 2.71 KB | 0644 |
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checksum.h | File | 3.71 KB | 0644 |
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clocksource.h | File | 153 B | 0644 |
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cmpxchg.h | File | 6.14 KB | 0644 |
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compiler.h | File | 978 B | 0644 |
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cp15.h | File | 3.84 KB | 0644 |
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cpu.h | File | 533 B | 0644 |
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cpufeature.h | File | 1.4 KB | 0644 |
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cpuidle.h | File | 1.33 KB | 0644 |
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cputype.h | File | 8.42 KB | 0644 |
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cti.h | File | 3.62 KB | 0644 |
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dcc.h | File | 1.01 KB | 0644 |
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delay.h | File | 2.83 KB | 0644 |
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device.h | File | 771 B | 0644 |
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div64.h | File | 3.17 KB | 0644 |
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dma-contiguous.h | File | 265 B | 0644 |
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dma-iommu.h | File | 1.01 KB | 0644 |
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dma-mapping.h | File | 7.44 KB | 0644 |
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dma.h | File | 4.18 KB | 0644 |
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dmi.h | File | 528 B | 0644 |
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domain.h | File | 3.65 KB | 0644 |
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ecard.h | File | 5.98 KB | 0644 |
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edac.h | File | 1.51 KB | 0644 |
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efi.h | File | 3.04 KB | 0644 |
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elf.h | File | 4.52 KB | 0644 |
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entry-macro-multi.S | File | 726 B | 0644 |
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exception.h | File | 571 B | 0644 |
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fb.h | File | 375 B | 0644 |
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fiq.h | File | 1.36 KB | 0644 |
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firmware.h | File | 1.82 KB | 0644 |
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fixmap.h | File | 1.84 KB | 0644 |
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flat.h | File | 915 B | 0644 |
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floppy.h | File | 3.61 KB | 0644 |
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fncpy.h | File | 3.08 KB | 0644 |
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fpstate.h | File | 1.73 KB | 0644 |
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ftrace.h | File | 1.92 KB | 0644 |
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futex.h | File | 4.24 KB | 0644 |
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glue-cache.h | File | 3.51 KB | 0644 |
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glue-df.h | File | 2.2 KB | 0644 |
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glue-pf.h | File | 1.12 KB | 0644 |
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glue-proc.h | File | 4.46 KB | 0644 |
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glue.h | File | 759 B | 0644 |
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gpio.h | File | 693 B | 0644 |
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hardirq.h | File | 803 B | 0644 |
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highmem.h | File | 2.15 KB | 0644 |
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hugetlb-3level.h | File | 2.03 KB | 0644 |
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hugetlb.h | File | 1.78 KB | 0644 |
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hw_breakpoint.h | File | 3.53 KB | 0644 |
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hw_irq.h | File | 349 B | 0644 |
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hwcap.h | File | 378 B | 0644 |
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hypervisor.h | File | 140 B | 0644 |
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ide.h | File | 566 B | 0644 |
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idmap.h | File | 355 B | 0644 |
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insn.h | File | 636 B | 0644 |
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io.h | File | 15.96 KB | 0644 |
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irq.h | File | 1015 B | 0644 |
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irq_work.h | File | 234 B | 0644 |
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irqflags.h | File | 3.88 KB | 0644 |
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jump_label.h | File | 1009 B | 0644 |
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kexec-internal.h | File | 272 B | 0644 |
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kexec.h | File | 2.3 KB | 0644 |
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kgdb.h | File | 2.72 KB | 0644 |
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kmap_types.h | File | 190 B | 0644 |
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kprobes.h | File | 2.65 KB | 0644 |
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kvm_arm.h | File | 7.6 KB | 0644 |
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kvm_asm.h | File | 2.84 KB | 0644 |
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kvm_coproc.h | File | 1.99 KB | 0644 |
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kvm_emulate.h | File | 7.84 KB | 0644 |
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kvm_host.h | File | 10.31 KB | 0644 |
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kvm_hyp.h | File | 4.49 KB | 0644 |
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kvm_mmio.h | File | 1.34 KB | 0644 |
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kvm_mmu.h | File | 7.27 KB | 0644 |
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limits.h | File | 166 B | 0644 |
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linkage.h | File | 216 B | 0644 |
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mc146818rtc.h | File | 720 B | 0644 |
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mcpm.h | File | 11.92 KB | 0644 |
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mcs_spinlock.h | File | 570 B | 0644 |
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memblock.h | File | 248 B | 0644 |
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memory.h | File | 9.95 KB | 0644 |
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mmu.h | File | 953 B | 0644 |
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mmu_context.h | File | 3.94 KB | 0644 |
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module.h | File | 1.57 KB | 0644 |
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mpu.h | File | 2.15 KB | 0644 |
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mtd-xip.h | File | 666 B | 0644 |
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neon.h | File | 1.16 KB | 0644 |
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nwflash.h | File | 252 B | 0644 |
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opcodes-sec.h | File | 742 B | 0644 |
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opcodes-virt.h | File | 1.32 KB | 0644 |
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opcodes.h | File | 8.07 KB | 0644 |
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outercache.h | File | 3.78 KB | 0644 |
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page-nommu.h | File | 957 B | 0644 |
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page.h | File | 3.61 KB | 0644 |
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paravirt.h | File | 454 B | 0644 |
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patch.h | File | 438 B | 0644 |
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pci.h | File | 956 B | 0644 |
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percpu.h | File | 1.56 KB | 0644 |
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perf_event.h | File | 857 B | 0644 |
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pgalloc.h | File | 3.79 KB | 0644 |
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pgtable-2level-hwdef.h | File | 3.45 KB | 0644 |
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pgtable-2level-types.h | File | 1.84 KB | 0644 |
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pgtable-2level.h | File | 8.51 KB | 0644 |
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pgtable-3level-hwdef.h | File | 3.95 KB | 0644 |
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pgtable-3level-types.h | File | 1.89 KB | 0644 |
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pgtable-3level.h | File | 9.54 KB | 0644 |
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pgtable-hwdef.h | File | 467 B | 0644 |
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pgtable-nommu.h | File | 2.51 KB | 0644 |
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pgtable.h | File | 11.71 KB | 0644 |
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probes.h | File | 1.73 KB | 0644 |
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proc-fns.h | File | 4.79 KB | 0644 |
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processor.h | File | 3.4 KB | 0644 |
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procinfo.h | File | 1.27 KB | 0644 |
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prom.h | File | 715 B | 0644 |
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psci.h | File | 771 B | 0644 |
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ptrace.h | File | 4.89 KB | 0644 |
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sections.h | File | 189 B | 0644 |
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set_memory.h | File | 1.04 KB | 0644 |
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setup.h | File | 934 B | 0644 |
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shmparam.h | File | 419 B | 0644 |
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signal.h | File | 500 B | 0644 |
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smp.h | File | 3.1 KB | 0644 |
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smp_plat.h | File | 2.48 KB | 0644 |
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smp_scu.h | File | 1.32 KB | 0644 |
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smp_twd.h | File | 908 B | 0644 |
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sparsemem.h | File | 716 B | 0644 |
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spectre.h | File | 906 B | 0644 |
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spinlock.h | File | 5.49 KB | 0644 |
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spinlock_types.h | File | 541 B | 0644 |
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stackprotector.h | File | 1.09 KB | 0644 |
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stacktrace.h | File | 742 B | 0644 |
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stage2_pgtable.h | File | 2.12 KB | 0644 |
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string.h | File | 1.43 KB | 0644 |
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suspend.h | File | 369 B | 0644 |
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swab.h | File | 1005 B | 0644 |
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switch_to.h | File | 1.03 KB | 0644 |
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sync_bitops.h | File | 1.03 KB | 0644 |
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syscall.h | File | 2.48 KB | 0644 |
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system_info.h | File | 763 B | 0644 |
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system_misc.h | File | 1.14 KB | 0644 |
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tcm.h | File | 937 B | 0644 |
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therm.h | File | 655 B | 0644 |
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thread_info.h | File | 5.2 KB | 0644 |
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thread_notify.h | File | 1.2 KB | 0644 |
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timex.h | File | 577 B | 0644 |
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tlb.h | File | 7.37 KB | 0644 |
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tlbflush.h | File | 17.88 KB | 0644 |
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tls.h | File | 3.09 KB | 0644 |
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topology.h | File | 1.18 KB | 0644 |
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traps.h | File | 1.17 KB | 0644 |
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trusted_foundations.h | File | 2.29 KB | 0644 |
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uaccess-asm.h | File | 2.83 KB | 0644 |
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uaccess.h | File | 16.22 KB | 0644 |
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ucontext.h | File | 2.98 KB | 0644 |
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unaligned.h | File | 846 B | 0644 |
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unified.h | File | 1.61 KB | 0644 |
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unistd.h | File | 1.68 KB | 0644 |
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unwind.h | File | 1.71 KB | 0644 |
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uprobes.h | File | 1.07 KB | 0644 |
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user.h | File | 4.2 KB | 0644 |
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v7m.h | File | 2.93 KB | 0644 |
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vdso.h | File | 507 B | 0644 |
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vdso_datapage.h | File | 1.69 KB | 0644 |
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vfp.h | File | 2.86 KB | 0644 |
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vfpmacros.h | File | 2.1 KB | 0644 |
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vga.h | File | 305 B | 0644 |
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virt.h | File | 2.9 KB | 0644 |
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word-at-a-time.h | File | 2.08 KB | 0644 |
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xor.h | File | 5.22 KB | 0644 |
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