/* * Copyright (C) 2012,2013 - ARM Ltd * Author: Marc Zyngier <marc.zyngier@arm.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program. If not, see <http://www.gnu.org/licenses/>. */ #ifndef __ARM64_KVM_ARM_H__ #define __ARM64_KVM_ARM_H__ #include <asm/esr.h> #include <asm/memory.h> #include <asm/types.h> /* Hyp Configuration Register (HCR) bits */ #define HCR_API (UL(1) << 41) #define HCR_APK (UL(1) << 40) #define HCR_TEA (UL(1) << 37) #define HCR_TERR (UL(1) << 36) #define HCR_E2H (UL(1) << 34) #define HCR_ID (UL(1) << 33) #define HCR_CD (UL(1) << 32) #define HCR_RW_SHIFT 31 #define HCR_RW (UL(1) << HCR_RW_SHIFT) #define HCR_TRVM (UL(1) << 30) #define HCR_HCD (UL(1) << 29) #define HCR_TDZ (UL(1) << 28) #define HCR_TGE (UL(1) << 27) #define HCR_TVM (UL(1) << 26) #define HCR_TTLB (UL(1) << 25) #define HCR_TPU (UL(1) << 24) #define HCR_TPC (UL(1) << 23) #define HCR_TSW (UL(1) << 22) #define HCR_TAC (UL(1) << 21) #define HCR_TIDCP (UL(1) << 20) #define HCR_TSC (UL(1) << 19) #define HCR_TID3 (UL(1) << 18) #define HCR_TID2 (UL(1) << 17) #define HCR_TID1 (UL(1) << 16) #define HCR_TID0 (UL(1) << 15) #define HCR_TWE (UL(1) << 14) #define HCR_TWI (UL(1) << 13) #define HCR_DC (UL(1) << 12) #define HCR_BSU (3 << 10) #define HCR_BSU_IS (UL(1) << 10) #define HCR_FB (UL(1) << 9) #define HCR_VSE (UL(1) << 8) #define HCR_VI (UL(1) << 7) #define HCR_VF (UL(1) << 6) #define HCR_AMO (UL(1) << 5) #define HCR_IMO (UL(1) << 4) #define HCR_FMO (UL(1) << 3) #define HCR_PTW (UL(1) << 2) #define HCR_SWIO (UL(1) << 1) #define HCR_VM (UL(1) << 0) /* * The bits we set in HCR: * RW: 64bit by default, can be overridden for 32bit VMs * TAC: Trap ACTLR * TSC: Trap SMC * TVM: Trap VM ops (until M+C set in SCTLR_EL1) * TSW: Trap cache operations by set/way * TWE: Trap WFE * TWI: Trap WFI * TIDCP: Trap L2CTLR/L2ECTLR * BSU_IS: Upgrade barriers to the inner shareable domain * FB: Force broadcast of all maintainance operations * AMO: Override CPSR.A and enable signaling with VA * IMO: Override CPSR.I and enable signaling with VI * FMO: Override CPSR.F and enable signaling with VF * SWIO: Turn set/way invalidates into set/way clean+invalidate * PTW: Take a stage2 fault if a stage1 walk steps in device memory */ #define HCR_GUEST_FLAGS (HCR_TSC | HCR_TSW | HCR_TWE | HCR_TWI | HCR_VM | \ HCR_TVM | HCR_BSU_IS | HCR_FB | HCR_TAC | \ HCR_AMO | HCR_SWIO | HCR_TIDCP | HCR_RW | HCR_PTW) #define HCR_VIRT_EXCP_MASK (HCR_VSE | HCR_VI | HCR_VF) #define HCR_INT_OVERRIDE (HCR_FMO | HCR_IMO) #define HCR_HOST_NVHE_FLAGS (HCR_RW | HCR_API | HCR_APK) #define HCR_HOST_VHE_FLAGS (HCR_RW | HCR_TGE | HCR_E2H) /* TCR_EL2 Registers bits */ #define TCR_EL2_RES1 ((1 << 31) | (1 << 23)) #define TCR_EL2_TBI (1 << 20) #define TCR_EL2_PS_SHIFT 16 #define TCR_EL2_PS_MASK (7 << TCR_EL2_PS_SHIFT) #define TCR_EL2_PS_40B (2 << TCR_EL2_PS_SHIFT) #define TCR_EL2_TG0_MASK TCR_TG0_MASK #define TCR_EL2_SH0_MASK TCR_SH0_MASK #define TCR_EL2_ORGN0_MASK TCR_ORGN0_MASK #define TCR_EL2_IRGN0_MASK TCR_IRGN0_MASK #define TCR_EL2_T0SZ_MASK 0x3f #define TCR_EL2_MASK (TCR_EL2_TG0_MASK | TCR_EL2_SH0_MASK | \ TCR_EL2_ORGN0_MASK | TCR_EL2_IRGN0_MASK | TCR_EL2_T0SZ_MASK) /* VTCR_EL2 Registers bits */ #define VTCR_EL2_RES1 (1U << 31) #define VTCR_EL2_HD (1 << 22) #define VTCR_EL2_HA (1 << 21) #define VTCR_EL2_PS_MASK TCR_EL2_PS_MASK #define VTCR_EL2_TG0_MASK TCR_TG0_MASK #define VTCR_EL2_TG0_4K TCR_TG0_4K #define VTCR_EL2_TG0_16K TCR_TG0_16K #define VTCR_EL2_TG0_64K TCR_TG0_64K #define VTCR_EL2_SH0_MASK TCR_SH0_MASK #define VTCR_EL2_SH0_INNER TCR_SH0_INNER #define VTCR_EL2_ORGN0_MASK TCR_ORGN0_MASK #define VTCR_EL2_ORGN0_WBWA TCR_ORGN0_WBWA #define VTCR_EL2_IRGN0_MASK TCR_IRGN0_MASK #define VTCR_EL2_IRGN0_WBWA TCR_IRGN0_WBWA #define VTCR_EL2_SL0_SHIFT 6 #define VTCR_EL2_SL0_MASK (3 << VTCR_EL2_SL0_SHIFT) #define VTCR_EL2_SL0_LVL1 (1 << VTCR_EL2_SL0_SHIFT) #define VTCR_EL2_T0SZ_MASK 0x3f #define VTCR_EL2_T0SZ_40B 24 #define VTCR_EL2_VS_SHIFT 19 #define VTCR_EL2_VS_8BIT (0 << VTCR_EL2_VS_SHIFT) #define VTCR_EL2_VS_16BIT (1 << VTCR_EL2_VS_SHIFT) /* * We configure the Stage-2 page tables to always restrict the IPA space to be * 40 bits wide (T0SZ = 24). Systems with a PARange smaller than 40 bits are * not known to exist and will break with this configuration. * * VTCR_EL2.PS is extracted from ID_AA64MMFR0_EL1.PARange at boot time * (see hyp-init.S). * * Note that when using 4K pages, we concatenate two first level page tables * together. With 16K pages, we concatenate 16 first level page tables. * * The magic numbers used for VTTBR_X in this patch can be found in Tables * D4-23 and D4-25 in ARM DDI 0487A.b. */ #define VTCR_EL2_T0SZ_IPA VTCR_EL2_T0SZ_40B #define VTCR_EL2_COMMON_BITS (VTCR_EL2_SH0_INNER | VTCR_EL2_ORGN0_WBWA | \ VTCR_EL2_IRGN0_WBWA | VTCR_EL2_RES1) #ifdef CONFIG_ARM64_64K_PAGES /* * Stage2 translation configuration: * 64kB pages (TG0 = 1) * 2 level page tables (SL = 1) */ #define VTCR_EL2_TGRAN_FLAGS (VTCR_EL2_TG0_64K | VTCR_EL2_SL0_LVL1) #define VTTBR_X_TGRAN_MAGIC 38 #elif defined(CONFIG_ARM64_16K_PAGES) /* * Stage2 translation configuration: * 16kB pages (TG0 = 2) * 2 level page tables (SL = 1) */ #define VTCR_EL2_TGRAN_FLAGS (VTCR_EL2_TG0_16K | VTCR_EL2_SL0_LVL1) #define VTTBR_X_TGRAN_MAGIC 42 #else /* 4K */ /* * Stage2 translation configuration: * 4kB pages (TG0 = 0) * 3 level page tables (SL = 1) */ #define VTCR_EL2_TGRAN_FLAGS (VTCR_EL2_TG0_4K | VTCR_EL2_SL0_LVL1) #define VTTBR_X_TGRAN_MAGIC 37 #endif #define VTCR_EL2_FLAGS (VTCR_EL2_COMMON_BITS | VTCR_EL2_TGRAN_FLAGS) #define VTTBR_X (VTTBR_X_TGRAN_MAGIC - VTCR_EL2_T0SZ_IPA) #define VTTBR_BADDR_MASK (((UL(1) << (PHYS_MASK_SHIFT - VTTBR_X)) - 1) << VTTBR_X) #define VTTBR_VMID_SHIFT (UL(48)) #define VTTBR_VMID_MASK(size) (_AT(u64, (1 << size) - 1) << VTTBR_VMID_SHIFT) /* Hyp System Trap Register */ #define HSTR_EL2_T(x) (1 << x) /* Hyp Coprocessor Trap Register Shifts */ #define CPTR_EL2_TFP_SHIFT 10 /* Hyp Coprocessor Trap Register */ #define CPTR_EL2_TCPAC (1 << 31) #define CPTR_EL2_TTA (1 << 20) #define CPTR_EL2_TFP (1 << CPTR_EL2_TFP_SHIFT) #define CPTR_EL2_TZ (1 << 8) #define CPTR_EL2_RES1 0x000032ff /* known RES1 bits in CPTR_EL2 */ #define CPTR_EL2_DEFAULT CPTR_EL2_RES1 /* Hyp Debug Configuration Register bits */ #define MDCR_EL2_TTRF (1 << 19) #define MDCR_EL2_TPMS (1 << 14) #define MDCR_EL2_E2PB_MASK (UL(0x3)) #define MDCR_EL2_E2PB_SHIFT (UL(12)) #define MDCR_EL2_TDRA (1 << 11) #define MDCR_EL2_TDOSA (1 << 10) #define MDCR_EL2_TDA (1 << 9) #define MDCR_EL2_TDE (1 << 8) #define MDCR_EL2_HPME (1 << 7) #define MDCR_EL2_TPM (1 << 6) #define MDCR_EL2_TPMCR (1 << 5) #define MDCR_EL2_HPMN_MASK (0x1F) /* For compatibility with fault code shared with 32-bit */ #define FSC_FAULT ESR_ELx_FSC_FAULT #define FSC_ACCESS ESR_ELx_FSC_ACCESS #define FSC_PERM ESR_ELx_FSC_PERM #define FSC_SEA ESR_ELx_FSC_EXTABT #define FSC_SEA_TTW0 (0x14) #define FSC_SEA_TTW1 (0x15) #define FSC_SEA_TTW2 (0x16) #define FSC_SEA_TTW3 (0x17) #define FSC_SECC (0x18) #define FSC_SECC_TTW0 (0x1c) #define FSC_SECC_TTW1 (0x1d) #define FSC_SECC_TTW2 (0x1e) #define FSC_SECC_TTW3 (0x1f) /* Hyp Prefetch Fault Address Register (HPFAR/HDFAR) */ #define HPFAR_MASK (~UL(0xf)) #define kvm_arm_exception_type \ {0, "IRQ" }, \ {1, "TRAP" } #define ECN(x) { ESR_ELx_EC_##x, #x } #define kvm_arm_exception_class \ ECN(UNKNOWN), ECN(WFx), ECN(CP15_32), ECN(CP15_64), ECN(CP14_MR), \ ECN(CP14_LS), ECN(FP_ASIMD), ECN(CP10_ID), ECN(CP14_64), ECN(SVC64), \ ECN(HVC64), ECN(SMC64), ECN(SYS64), ECN(IMP_DEF), ECN(IABT_LOW), \ ECN(IABT_CUR), ECN(PC_ALIGN), ECN(DABT_LOW), ECN(DABT_CUR), \ ECN(SP_ALIGN), ECN(FP_EXC32), ECN(FP_EXC64), ECN(SERROR), \ ECN(BREAKPT_LOW), ECN(BREAKPT_CUR), ECN(SOFTSTP_LOW), \ ECN(SOFTSTP_CUR), ECN(WATCHPT_LOW), ECN(WATCHPT_CUR), \ ECN(BKPT32), ECN(VECTOR32), ECN(BRK64) #define CPACR_EL1_FPEN (3 << 20) #define CPACR_EL1_TTA (1 << 28) #define CPACR_EL1_DEFAULT (CPACR_EL1_FPEN | CPACR_EL1_ZEN_EL1EN) #endif /* __ARM64_KVM_ARM_H__ */
Name | Type | Size | Permission | Actions |
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xen | Folder | 0755 |
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Kbuild | File | 703 B | 0644 |
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acenv.h | File | 541 B | 0644 |
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acpi.h | File | 4.34 KB | 0644 |
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alternative.h | File | 7.63 KB | 0644 |
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arch_gicv3.h | File | 3.44 KB | 0644 |
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arch_timer.h | File | 4.87 KB | 0644 |
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arm-cci.h | File | 794 B | 0644 |
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asm-bug.h | File | 1.45 KB | 0644 |
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asm-offsets.h | File | 35 B | 0644 |
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asm-uaccess.h | File | 2.09 KB | 0644 |
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assembler.h | File | 13.51 KB | 0644 |
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atomic.h | File | 8.35 KB | 0644 |
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atomic_ll_sc.h | File | 10.61 KB | 0644 |
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atomic_lse.h | File | 14.82 KB | 0644 |
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barrier.h | File | 3.78 KB | 0644 |
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bitops.h | File | 1.9 KB | 0644 |
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bitrev.h | File | 452 B | 0644 |
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boot.h | File | 384 B | 0644 |
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brk-imm.h | File | 706 B | 0644 |
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bug.h | File | 1.09 KB | 0644 |
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cache.h | File | 2.23 KB | 0644 |
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cacheflush.h | File | 4.87 KB | 0644 |
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checksum.h | File | 1.35 KB | 0644 |
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clocksource.h | File | 192 B | 0644 |
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cmpxchg.h | File | 7.98 KB | 0644 |
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compat.h | File | 7.15 KB | 0644 |
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compiler.h | File | 1.18 KB | 0644 |
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cpu.h | File | 1.84 KB | 0644 |
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cpu_ops.h | File | 2.73 KB | 0644 |
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cpucaps.h | File | 1.87 KB | 0644 |
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cpufeature.h | File | 19.14 KB | 0644 |
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cpuidle.h | File | 401 B | 0644 |
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cputype.h | File | 8.1 KB | 0644 |
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current.h | File | 517 B | 0644 |
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daifflags.h | File | 1.59 KB | 0644 |
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dcc.h | File | 1.36 KB | 0644 |
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debug-monitors.h | File | 3.76 KB | 0644 |
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device.h | File | 886 B | 0644 |
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dma-mapping.h | File | 2.42 KB | 0644 |
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dmi.h | File | 850 B | 0644 |
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efi.h | File | 4.57 KB | 0644 |
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elf.h | File | 5.7 KB | 0644 |
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esr.h | File | 9.02 KB | 0644 |
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exception.h | File | 1.21 KB | 0644 |
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exec.h | File | 868 B | 0644 |
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extable.h | File | 815 B | 0644 |
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fb.h | File | 1000 B | 0644 |
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fixmap.h | File | 2.91 KB | 0644 |
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fpsimd.h | File | 4.21 KB | 0644 |
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fpsimdmacros.h | File | 5.62 KB | 0644 |
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ftrace.h | File | 1.92 KB | 0644 |
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futex.h | File | 3.41 KB | 0644 |
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hardirq.h | File | 2.08 KB | 0644 |
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hugetlb.h | File | 2.71 KB | 0644 |
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hw_breakpoint.h | File | 4.46 KB | 0644 |
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hwcap.h | File | 1.86 KB | 0644 |
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hypervisor.h | File | 144 B | 0644 |
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insn.h | File | 16.03 KB | 0644 |
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io.h | File | 7.72 KB | 0644 |
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irq.h | File | 307 B | 0644 |
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irq_work.h | File | 228 B | 0644 |
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irqflags.h | File | 2.3 KB | 0644 |
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jump_label.h | File | 1.68 KB | 0644 |
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kasan.h | File | 1.16 KB | 0644 |
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kernel-pgtable.h | File | 4.03 KB | 0644 |
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kexec.h | File | 2.42 KB | 0644 |
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kgdb.h | File | 3.79 KB | 0644 |
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kprobes.h | File | 1.74 KB | 0644 |
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kvm_arm.h | File | 8.38 KB | 0644 |
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kvm_asm.h | File | 4.26 KB | 0644 |
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kvm_coproc.h | File | 2.04 KB | 0644 |
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kvm_emulate.h | File | 10.38 KB | 0644 |
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kvm_host.h | File | 15.73 KB | 0644 |
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kvm_hyp.h | File | 5.79 KB | 0644 |
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kvm_mmio.h | File | 1.3 KB | 0644 |
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kvm_mmu.h | File | 11.72 KB | 0644 |
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linkage.h | File | 114 B | 0644 |
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lse.h | File | 1.26 KB | 0644 |
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memblock.h | File | 720 B | 0644 |
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memory.h | File | 9.16 KB | 0644 |
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mmu.h | File | 2.76 KB | 0644 |
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mmu_context.h | File | 6.35 KB | 0644 |
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mmzone.h | File | 266 B | 0644 |
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module.h | File | 2.8 KB | 0644 |
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neon.h | File | 815 B | 0644 |
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numa.h | File | 1.33 KB | 0644 |
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page-def.h | File | 1.17 KB | 0644 |
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page.h | File | 1.61 KB | 0644 |
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paravirt.h | File | 458 B | 0644 |
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pci.h | File | 878 B | 0644 |
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percpu.h | File | 7.48 KB | 0644 |
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perf_event.h | File | 3.17 KB | 0644 |
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pgalloc.h | File | 3.71 KB | 0644 |
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pgtable-hwdef.h | File | 9.4 KB | 0644 |
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pgtable-prot.h | File | 4.38 KB | 0644 |
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pgtable-types.h | File | 1.84 KB | 0644 |
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pgtable.h | File | 21.55 KB | 0644 |
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probes.h | File | 1022 B | 0644 |
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proc-fns.h | File | 1.21 KB | 0644 |
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processor.h | File | 6.52 KB | 0644 |
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ptdump.h | File | 1.42 KB | 0644 |
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ptrace.h | File | 9 KB | 0644 |
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sdei.h | File | 1.46 KB | 0644 |
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seccomp.h | File | 714 B | 0644 |
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sections.h | File | 1.46 KB | 0644 |
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shmparam.h | File | 965 B | 0644 |
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signal32.h | File | 1.45 KB | 0644 |
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simd.h | File | 1.39 KB | 0644 |
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smp.h | File | 4.23 KB | 0644 |
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smp_plat.h | File | 1.43 KB | 0644 |
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sparsemem.h | File | 771 B | 0644 |
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spinlock.h | File | 3.33 KB | 0644 |
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spinlock_types.h | File | 1.06 KB | 0644 |
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stack_pointer.h | File | 247 B | 0644 |
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stackprotector.h | File | 1.11 KB | 0644 |
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stacktrace.h | File | 2.53 KB | 0644 |
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stage2_pgtable-nopmd.h | File | 1.3 KB | 0644 |
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stage2_pgtable-nopud.h | File | 1.24 KB | 0644 |
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stage2_pgtable.h | File | 4.89 KB | 0644 |
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stat.h | File | 1.43 KB | 0644 |
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string.h | File | 2.33 KB | 0644 |
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suspend.h | File | 1.65 KB | 0644 |
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sync_bitops.h | File | 1.11 KB | 0644 |
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syscall.h | File | 2.87 KB | 0644 |
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sysreg.h | File | 25.1 KB | 0644 |
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system_misc.h | File | 1.86 KB | 0644 |
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thread_info.h | File | 3.93 KB | 0644 |
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timex.h | File | 883 B | 0644 |
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tlb.h | File | 2.22 KB | 0644 |
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tlbflush.h | File | 5.38 KB | 0644 |
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topology.h | File | 1.29 KB | 0644 |
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traps.h | File | 3.33 KB | 0644 |
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uaccess.h | File | 12.01 KB | 0644 |
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unistd.h | File | 1.6 KB | 0644 |
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unistd32.h | File | 27.53 KB | 0644 |
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uprobes.h | File | 777 B | 0644 |
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vdso.h | File | 1.09 KB | 0644 |
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vdso_datapage.h | File | 1.53 KB | 0644 |
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vectors.h | File | 1.75 KB | 0644 |
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virt.h | File | 3 KB | 0644 |
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vmap_stack.h | File | 769 B | 0644 |
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word-at-a-time.h | File | 2.22 KB | 0644 |
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