/* * bfin_twi.h - interface to Blackfin TWIs * * Copyright 2005-2014 Analog Devices Inc. * * Licensed under the GPL-2 or later. */ #ifndef __ASM_BFIN_TWI_H__ #define __ASM_BFIN_TWI_H__ #include <asm/blackfin.h> #include <linux/types.h> #include <linux/i2c.h> /* * ADI twi registers layout */ struct bfin_twi_regs { u16 clkdiv; u16 dummy1; u16 control; u16 dummy2; u16 slave_ctl; u16 dummy3; u16 slave_stat; u16 dummy4; u16 slave_addr; u16 dummy5; u16 master_ctl; u16 dummy6; u16 master_stat; u16 dummy7; u16 master_addr; u16 dummy8; u16 int_stat; u16 dummy9; u16 int_mask; u16 dummy10; u16 fifo_ctl; u16 dummy11; u16 fifo_stat; u16 dummy12; u32 __pad[20]; u16 xmt_data8; u16 dummy13; u16 xmt_data16; u16 dummy14; u16 rcv_data8; u16 dummy15; u16 rcv_data16; u16 dummy16; }; struct bfin_twi_iface { int irq; spinlock_t lock; char read_write; u8 command; u8 *transPtr; int readNum; int writeNum; int cur_mode; int manual_stop; int result; struct i2c_adapter adap; struct completion complete; struct i2c_msg *pmsg; int msg_num; int cur_msg; u16 saved_clkdiv; u16 saved_control; struct bfin_twi_regs __iomem *regs_base; }; /* ******************** TWO-WIRE INTERFACE (TWI) MASKS ********************/ /* TWI_CLKDIV Macros (Use: *pTWI_CLKDIV = CLKLOW(x)|CLKHI(y); ) */ #define CLKLOW(x) ((x) & 0xFF) /* Periods Clock Is Held Low */ #define CLKHI(y) (((y)&0xFF)<<0x8) /* Periods Before New Clock Low */ /* TWI_PRESCALE Masks */ #define PRESCALE 0x007F /* SCLKs Per Internal Time Reference (10MHz) */ #define TWI_ENA 0x0080 /* TWI Enable */ #define SCCB 0x0200 /* SCCB Compatibility Enable */ /* TWI_SLAVE_CTL Masks */ #define SEN 0x0001 /* Slave Enable */ #define SADD_LEN 0x0002 /* Slave Address Length */ #define STDVAL 0x0004 /* Slave Transmit Data Valid */ #define NAK 0x0008 /* NAK Generated At Conclusion Of Transfer */ #define GEN 0x0010 /* General Call Address Matching Enabled */ /* TWI_SLAVE_STAT Masks */ #define SDIR 0x0001 /* Slave Transfer Direction (RX/TX*) */ #define GCALL 0x0002 /* General Call Indicator */ /* TWI_MASTER_CTL Masks */ #define MEN 0x0001 /* Master Mode Enable */ #define MADD_LEN 0x0002 /* Master Address Length */ #define MDIR 0x0004 /* Master Transmit Direction (RX/TX*) */ #define FAST 0x0008 /* Use Fast Mode Timing Specs */ #define STOP 0x0010 /* Issue Stop Condition */ #define RSTART 0x0020 /* Repeat Start or Stop* At End Of Transfer */ #define DCNT 0x3FC0 /* Data Bytes To Transfer */ #define SDAOVR 0x4000 /* Serial Data Override */ #define SCLOVR 0x8000 /* Serial Clock Override */ /* TWI_MASTER_STAT Masks */ #define MPROG 0x0001 /* Master Transfer In Progress */ #define LOSTARB 0x0002 /* Lost Arbitration Indicator (Xfer Aborted) */ #define ANAK 0x0004 /* Address Not Acknowledged */ #define DNAK 0x0008 /* Data Not Acknowledged */ #define BUFRDERR 0x0010 /* Buffer Read Error */ #define BUFWRERR 0x0020 /* Buffer Write Error */ #define SDASEN 0x0040 /* Serial Data Sense */ #define SCLSEN 0x0080 /* Serial Clock Sense */ #define BUSBUSY 0x0100 /* Bus Busy Indicator */ /* TWI_INT_SRC and TWI_INT_ENABLE Masks */ #define SINIT 0x0001 /* Slave Transfer Initiated */ #define SCOMP 0x0002 /* Slave Transfer Complete */ #define SERR 0x0004 /* Slave Transfer Error */ #define SOVF 0x0008 /* Slave Overflow */ #define MCOMP 0x0010 /* Master Transfer Complete */ #define MERR 0x0020 /* Master Transfer Error */ #define XMTSERV 0x0040 /* Transmit FIFO Service */ #define RCVSERV 0x0080 /* Receive FIFO Service */ /* TWI_FIFO_CTRL Masks */ #define XMTFLUSH 0x0001 /* Transmit Buffer Flush */ #define RCVFLUSH 0x0002 /* Receive Buffer Flush */ #define XMTINTLEN 0x0004 /* Transmit Buffer Interrupt Length */ #define RCVINTLEN 0x0008 /* Receive Buffer Interrupt Length */ /* TWI_FIFO_STAT Masks */ #define XMTSTAT 0x0003 /* Transmit FIFO Status */ #define XMT_EMPTY 0x0000 /* Transmit FIFO Empty */ #define XMT_HALF 0x0001 /* Transmit FIFO Has 1 Byte To Write */ #define XMT_FULL 0x0003 /* Transmit FIFO Full (2 Bytes To Write) */ #define RCVSTAT 0x000C /* Receive FIFO Status */ #define RCV_EMPTY 0x0000 /* Receive FIFO Empty */ #define RCV_HALF 0x0004 /* Receive FIFO Has 1 Byte To Read */ #define RCV_FULL 0x000C /* Receive FIFO Full (2 Bytes To Read) */ #define DEFINE_TWI_REG(reg_name, reg) \ static inline u16 read_##reg_name(struct bfin_twi_iface *iface) \ { return bfin_read16(&iface->regs_base->reg); } \ static inline void write_##reg_name(struct bfin_twi_iface *iface, u16 v) \ { bfin_write16(&iface->regs_base->reg, v); } DEFINE_TWI_REG(CLKDIV, clkdiv) DEFINE_TWI_REG(SLAVE_CTL, slave_ctl) DEFINE_TWI_REG(SLAVE_STAT, slave_stat) DEFINE_TWI_REG(SLAVE_ADDR, slave_addr) DEFINE_TWI_REG(MASTER_CTL, master_ctl) DEFINE_TWI_REG(MASTER_STAT, master_stat) DEFINE_TWI_REG(MASTER_ADDR, master_addr) DEFINE_TWI_REG(INT_STAT, int_stat) DEFINE_TWI_REG(INT_MASK, int_mask) DEFINE_TWI_REG(FIFO_STAT, fifo_stat) DEFINE_TWI_REG(XMT_DATA8, xmt_data8) DEFINE_TWI_REG(XMT_DATA16, xmt_data16) #if !ANOMALY_16000030 DEFINE_TWI_REG(RCV_DATA8, rcv_data8) DEFINE_TWI_REG(RCV_DATA16, rcv_data16) #else static inline u16 read_RCV_DATA8(struct bfin_twi_iface *iface) { u16 ret; unsigned long flags; flags = hard_local_irq_save(); ret = bfin_read16(&iface->regs_base->rcv_data8); hard_local_irq_restore(flags); return ret; } static inline u16 read_RCV_DATA16(struct bfin_twi_iface *iface) { u16 ret; unsigned long flags; flags = hard_local_irq_save(); ret = bfin_read16(&iface->regs_base->rcv_data16); hard_local_irq_restore(flags); return ret; } #endif static inline u16 read_FIFO_CTL(struct bfin_twi_iface *iface) { return bfin_read16(&iface->regs_base->fifo_ctl); } static inline void write_FIFO_CTL(struct bfin_twi_iface *iface, u16 v) { bfin_write16(&iface->regs_base->fifo_ctl, v); SSYNC(); } static inline u16 read_CONTROL(struct bfin_twi_iface *iface) { return bfin_read16(&iface->regs_base->control); } static inline void write_CONTROL(struct bfin_twi_iface *iface, u16 v) { SSYNC(); bfin_write16(&iface->regs_base->control, v); } #endif
Name | Type | Size | Permission | Actions |
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Kbuild | File | 658 B | 0644 |
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asm-offsets.h | File | 35 B | 0644 |
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atomic.h | File | 1.55 KB | 0644 |
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barrier.h | File | 2.55 KB | 0644 |
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bfin-global.h | File | 2.8 KB | 0644 |
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bfin-lq035q1.h | File | 868 B | 0644 |
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bfin5xx_spi.h | File | 2.07 KB | 0644 |
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bfin_can.h | File | 36.04 KB | 0644 |
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bfin_dma.h | File | 5.46 KB | 0644 |
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bfin_pfmon.h | File | 1.11 KB | 0644 |
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bfin_ppi.h | File | 9.01 KB | 0644 |
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bfin_sdh.h | File | 7.2 KB | 0644 |
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bfin_serial.h | File | 17.02 KB | 0644 |
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bfin_simple_timer.h | File | 949 B | 0644 |
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bfin_sport.h | File | 1.21 KB | 0644 |
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bfin_sport3.h | File | 5.47 KB | 0644 |
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bfin_twi.h | File | 6.25 KB | 0644 |
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bfin_watchdog.h | File | 696 B | 0644 |
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bfrom.h | File | 3.36 KB | 0644 |
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bitops.h | File | 3.45 KB | 0644 |
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blackfin.h | File | 1.55 KB | 0644 |
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bug.h | File | 1.49 KB | 0644 |
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cache.h | File | 1.47 KB | 0644 |
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cacheflush.h | File | 3.79 KB | 0644 |
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cdef_LPBlackfin.h | File | 18.93 KB | 0644 |
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checksum.h | File | 899 B | 0644 |
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clkdev.h | File | 318 B | 0644 |
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clocks.h | File | 1.66 KB | 0644 |
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cmpxchg.h | File | 3.2 KB | 0644 |
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context.S | File | 5.92 KB | 0644 |
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cplb.h | File | 4.86 KB | 0644 |
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cplbinit.h | File | 1.6 KB | 0644 |
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cpu.h | File | 443 B | 0644 |
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def_LPBlackfin.h | File | 28.6 KB | 0644 |
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delay.h | File | 917 B | 0644 |
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dma-mapping.h | File | 1.09 KB | 0644 |
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dma.h | File | 9.28 KB | 0644 |
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dpmc.h | File | 18.24 KB | 0644 |
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early_printk.h | File | 1.09 KB | 0644 |
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elf.h | File | 4.88 KB | 0644 |
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entry.h | File | 5.27 KB | 0644 |
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exec.h | File | 37 B | 0644 |
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fixed_code.h | File | 806 B | 0644 |
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flat.h | File | 1.41 KB | 0644 |
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ftrace.h | File | 1.37 KB | 0644 |
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gpio.h | File | 5.91 KB | 0644 |
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gptimers.h | File | 8.95 KB | 0644 |
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hardirq.h | File | 301 B | 0644 |
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io.h | File | 1.52 KB | 0644 |
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ipipe.h | File | 5.81 KB | 0644 |
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ipipe_base.h | File | 2.38 KB | 0644 |
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irq.h | File | 879 B | 0644 |
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irq_handler.h | File | 1.93 KB | 0644 |
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irqflags.h | File | 7.13 KB | 0644 |
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kgdb.h | File | 3.23 KB | 0644 |
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l1layout.h | File | 879 B | 0644 |
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linkage.h | File | 205 B | 0644 |
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mem_init.h | File | 13.1 KB | 0644 |
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mem_map.h | File | 1.73 KB | 0644 |
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mmu.h | File | 713 B | 0644 |
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mmu_context.h | File | 5.35 KB | 0644 |
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module.h | File | 410 B | 0644 |
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nand.h | File | 895 B | 0644 |
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nmi.h | File | 195 B | 0644 |
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page.h | File | 546 B | 0644 |
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page_offset.h | File | 192 B | 0644 |
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pci.h | File | 310 B | 0644 |
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pda.h | File | 1.86 KB | 0644 |
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perf_event.h | File | 23 B | 0644 |
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pgtable.h | File | 3 KB | 0644 |
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pm.h | File | 590 B | 0644 |
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portmux.h | File | 16.38 KB | 0644 |
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processor.h | File | 3.21 KB | 0644 |
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pseudo_instructions.h | File | 391 B | 0644 |
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ptrace.h | File | 1.19 KB | 0644 |
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reboot.h | File | 446 B | 0644 |
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rwlock.h | File | 142 B | 0644 |
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scb.h | File | 445 B | 0644 |
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sections.h | File | 2 KB | 0644 |
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segment.h | File | 226 B | 0644 |
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smp.h | File | 1.34 KB | 0644 |
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spinlock.h | File | 1.87 KB | 0644 |
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spinlock_types.h | File | 495 B | 0644 |
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string.h | File | 1.04 KB | 0644 |
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switch_to.h | File | 997 B | 0644 |
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syscall.h | File | 2.15 KB | 0644 |
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thread_info.h | File | 2.66 KB | 0644 |
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time.h | File | 1.33 KB | 0644 |
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timex.h | File | 477 B | 0644 |
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tlb.h | File | 481 B | 0644 |
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tlbflush.h | File | 88 B | 0644 |
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trace.h | File | 2.67 KB | 0644 |
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traps.h | File | 4.87 KB | 0644 |
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uaccess.h | File | 5.79 KB | 0644 |
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unistd.h | File | 523 B | 0644 |
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vga.h | File | 29 B | 0644 |
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