404

[ Avaa Bypassed ]




Upload:

Command:

botdev@18.216.45.133: ~ $
/*
 * Blackfin low-level cache routines
 *
 * Copyright 2004-2009 Analog Devices Inc.
 *
 * Licensed under the GPL-2 or later.
 */

#ifndef _BLACKFIN_CACHEFLUSH_H
#define _BLACKFIN_CACHEFLUSH_H

#include <asm/blackfin.h>	/* for SSYNC() */
#include <asm/sections.h>	/* for _ramend */
#ifdef CONFIG_SMP
#include <asm/smp.h>
#endif

extern void blackfin_icache_flush_range(unsigned long start_address, unsigned long end_address);
extern void blackfin_dcache_flush_range(unsigned long start_address, unsigned long end_address);
extern void blackfin_dcache_invalidate_range(unsigned long start_address, unsigned long end_address);
extern void blackfin_dflush_page(void *page);
extern void blackfin_invalidate_entire_dcache(void);
extern void blackfin_invalidate_entire_icache(void);

#define flush_dcache_mmap_lock(mapping)		do { } while (0)
#define flush_dcache_mmap_unlock(mapping)	do { } while (0)
#define flush_cache_mm(mm)			do { } while (0)
#define flush_cache_range(vma, start, end)	do { } while (0)
#define flush_cache_page(vma, vmaddr)		do { } while (0)
#define flush_cache_vmap(start, end)		do { } while (0)
#define flush_cache_vunmap(start, end)		do { } while (0)

#ifdef CONFIG_SMP
#define flush_icache_range_others(start, end)	\
	smp_icache_flush_range_others((start), (end))
#else
#define flush_icache_range_others(start, end)	do { } while (0)
#endif

static inline void flush_icache_range(unsigned start, unsigned end)
{
#if defined(CONFIG_BFIN_EXTMEM_WRITEBACK)
	if (end <= physical_mem_end)
		blackfin_dcache_flush_range(start, end);
#endif
#if defined(CONFIG_BFIN_L2_WRITEBACK)
	if (start >= L2_START && end <= L2_START + L2_LENGTH)
		blackfin_dcache_flush_range(start, end);
#endif

	/* Make sure all write buffers in the data side of the core
	 * are flushed before trying to invalidate the icache.  This
	 * needs to be after the data flush and before the icache
	 * flush so that the SSYNC does the right thing in preventing
	 * the instruction prefetcher from hitting things in cached
	 * memory at the wrong time -- it runs much further ahead than
	 * the pipeline.
	 */
	SSYNC();
#if defined(CONFIG_BFIN_EXTMEM_ICACHEABLE)
	if (end <= physical_mem_end) {
		blackfin_icache_flush_range(start, end);
		flush_icache_range_others(start, end);
	}
#endif
#if defined(CONFIG_BFIN_L2_ICACHEABLE)
	if (start >= L2_START && end <= L2_START + L2_LENGTH) {
		blackfin_icache_flush_range(start, end);
		flush_icache_range_others(start, end);
	}
#endif
}

#define copy_to_user_page(vma, page, vaddr, dst, src, len)		\
do { memcpy(dst, src, len);						\
     flush_icache_range((unsigned) (dst), (unsigned) (dst) + (len));	\
} while (0)

#define copy_from_user_page(vma, page, vaddr, dst, src, len)	memcpy(dst, src, len)

#if defined(CONFIG_BFIN_DCACHE)
# define invalidate_dcache_range(start,end)	blackfin_dcache_invalidate_range((start), (end))
#else
# define invalidate_dcache_range(start,end)	do { } while (0)
#endif
#if defined(CONFIG_BFIN_EXTMEM_WRITEBACK) || defined(CONFIG_BFIN_L2_WRITEBACK)
# define flush_dcache_range(start,end)		blackfin_dcache_flush_range((start), (end))
#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
# define flush_dcache_page(page)		blackfin_dflush_page(page_address(page))
#else
# define flush_dcache_range(start,end)		do { } while (0)
#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
# define flush_dcache_page(page)		do { } while (0)
#endif

extern unsigned long reserved_mem_dcache_on;
extern unsigned long reserved_mem_icache_on;

static inline int bfin_addr_dcacheable(unsigned long addr)
{
#ifdef CONFIG_BFIN_EXTMEM_DCACHEABLE
	if (addr < (_ramend - DMA_UNCACHED_REGION))
		return 1;
#endif

	if (reserved_mem_dcache_on &&
		addr >= _ramend && addr < physical_mem_end)
		return 1;

#ifdef CONFIG_BFIN_L2_DCACHEABLE
	if (addr >= L2_START && addr < L2_START + L2_LENGTH)
		return 1;
#endif

	return 0;
}

#endif				/* _BLACKFIN_ICACHEFLUSH_H */

Filemanager

Name Type Size Permission Actions
Kbuild File 658 B 0644
asm-offsets.h File 35 B 0644
atomic.h File 1.55 KB 0644
barrier.h File 2.55 KB 0644
bfin-global.h File 2.8 KB 0644
bfin-lq035q1.h File 868 B 0644
bfin5xx_spi.h File 2.07 KB 0644
bfin_can.h File 36.04 KB 0644
bfin_dma.h File 5.46 KB 0644
bfin_pfmon.h File 1.11 KB 0644
bfin_ppi.h File 9.01 KB 0644
bfin_sdh.h File 7.2 KB 0644
bfin_serial.h File 17.02 KB 0644
bfin_simple_timer.h File 949 B 0644
bfin_sport.h File 1.21 KB 0644
bfin_sport3.h File 5.47 KB 0644
bfin_twi.h File 6.25 KB 0644
bfin_watchdog.h File 696 B 0644
bfrom.h File 3.36 KB 0644
bitops.h File 3.45 KB 0644
blackfin.h File 1.55 KB 0644
bug.h File 1.49 KB 0644
cache.h File 1.47 KB 0644
cacheflush.h File 3.79 KB 0644
cdef_LPBlackfin.h File 18.93 KB 0644
checksum.h File 899 B 0644
clkdev.h File 318 B 0644
clocks.h File 1.66 KB 0644
cmpxchg.h File 3.2 KB 0644
context.S File 5.92 KB 0644
cplb.h File 4.86 KB 0644
cplbinit.h File 1.6 KB 0644
cpu.h File 443 B 0644
def_LPBlackfin.h File 28.6 KB 0644
delay.h File 917 B 0644
dma-mapping.h File 1.09 KB 0644
dma.h File 9.28 KB 0644
dpmc.h File 18.24 KB 0644
early_printk.h File 1.09 KB 0644
elf.h File 4.88 KB 0644
entry.h File 5.27 KB 0644
exec.h File 37 B 0644
fixed_code.h File 806 B 0644
flat.h File 1.41 KB 0644
ftrace.h File 1.37 KB 0644
gpio.h File 5.91 KB 0644
gptimers.h File 8.95 KB 0644
hardirq.h File 301 B 0644
io.h File 1.52 KB 0644
ipipe.h File 5.81 KB 0644
ipipe_base.h File 2.38 KB 0644
irq.h File 879 B 0644
irq_handler.h File 1.93 KB 0644
irqflags.h File 7.13 KB 0644
kgdb.h File 3.23 KB 0644
l1layout.h File 879 B 0644
linkage.h File 205 B 0644
mem_init.h File 13.1 KB 0644
mem_map.h File 1.73 KB 0644
mmu.h File 713 B 0644
mmu_context.h File 5.35 KB 0644
module.h File 410 B 0644
nand.h File 895 B 0644
nmi.h File 195 B 0644
page.h File 546 B 0644
page_offset.h File 192 B 0644
pci.h File 310 B 0644
pda.h File 1.86 KB 0644
perf_event.h File 23 B 0644
pgtable.h File 3 KB 0644
pm.h File 590 B 0644
portmux.h File 16.38 KB 0644
processor.h File 3.21 KB 0644
pseudo_instructions.h File 391 B 0644
ptrace.h File 1.19 KB 0644
reboot.h File 446 B 0644
rwlock.h File 142 B 0644
scb.h File 445 B 0644
sections.h File 2 KB 0644
segment.h File 226 B 0644
smp.h File 1.34 KB 0644
spinlock.h File 1.87 KB 0644
spinlock_types.h File 495 B 0644
string.h File 1.04 KB 0644
switch_to.h File 997 B 0644
syscall.h File 2.15 KB 0644
thread_info.h File 2.66 KB 0644
time.h File 1.33 KB 0644
timex.h File 477 B 0644
tlb.h File 481 B 0644
tlbflush.h File 88 B 0644
trace.h File 2.67 KB 0644
traps.h File 4.87 KB 0644
uaccess.h File 5.79 KB 0644
unistd.h File 523 B 0644
vga.h File 29 B 0644