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/*
 * Copyright 2004-2009 Analog Devices Inc.
 *
 * Licensed under the GPL-2 or later.
 */

#ifndef __BLACKFIN_MMU_CONTEXT_H__
#define __BLACKFIN_MMU_CONTEXT_H__

#include <linux/slab.h>
#include <linux/sched.h>
#include <linux/mm_types.h>

#include <asm/setup.h>
#include <asm/page.h>
#include <asm/pgalloc.h>
#include <asm/cplbinit.h>
#include <asm/sections.h>

/* Note: L1 stacks are CPU-private things, so we bluntly disable this
   feature in SMP mode, and use the per-CPU scratch SRAM bank only to
   store the PDA instead. */

extern void *current_l1_stack_save;
extern int nr_l1stack_tasks;
extern void *l1_stack_base;
extern unsigned long l1_stack_len;

extern int l1sram_free(const void*);
extern void *l1sram_alloc_max(void*);

static inline void free_l1stack(void)
{
	nr_l1stack_tasks--;
	if (nr_l1stack_tasks == 0) {
		l1sram_free(l1_stack_base);
		l1_stack_base = NULL;
		l1_stack_len = 0;
	}
}

static inline unsigned long
alloc_l1stack(unsigned long length, unsigned long *stack_base)
{
	if (nr_l1stack_tasks == 0) {
		l1_stack_base = l1sram_alloc_max(&l1_stack_len);
		if (!l1_stack_base)
			return 0;
	}

	if (l1_stack_len < length) {
		if (nr_l1stack_tasks == 0)
			l1sram_free(l1_stack_base);
		return 0;
	}
	*stack_base = (unsigned long)l1_stack_base;
	nr_l1stack_tasks++;
	return l1_stack_len;
}

static inline int
activate_l1stack(struct mm_struct *mm, unsigned long sp_base)
{
	if (current_l1_stack_save)
		memcpy(current_l1_stack_save, l1_stack_base, l1_stack_len);
	mm->context.l1_stack_save = current_l1_stack_save = (void*)sp_base;
	memcpy(l1_stack_base, current_l1_stack_save, l1_stack_len);
	return 1;
}

#define deactivate_mm(tsk,mm)	do { } while (0)

#define activate_mm(prev, next) switch_mm(prev, next, NULL)

static inline void __switch_mm(struct mm_struct *prev_mm, struct mm_struct *next_mm,
			       struct task_struct *tsk)
{
#ifdef CONFIG_MPU
	unsigned int cpu = smp_processor_id();
#endif
	if (prev_mm == next_mm)
		return;
#ifdef CONFIG_MPU
	if (prev_mm->context.page_rwx_mask == current_rwx_mask[cpu]) {
		flush_switched_cplbs(cpu);
		set_mask_dcplbs(next_mm->context.page_rwx_mask, cpu);
	}
#endif

#ifdef CONFIG_APP_STACK_L1
	/* L1 stack switching.  */
	if (!next_mm->context.l1_stack_save)
		return;
	if (next_mm->context.l1_stack_save == current_l1_stack_save)
		return;
	if (current_l1_stack_save) {
		memcpy(current_l1_stack_save, l1_stack_base, l1_stack_len);
	}
	current_l1_stack_save = next_mm->context.l1_stack_save;
	memcpy(l1_stack_base, current_l1_stack_save, l1_stack_len);
#endif
}

#ifdef CONFIG_IPIPE
#define lock_mm_switch(flags)	flags = hard_local_irq_save_cond()
#define unlock_mm_switch(flags)	hard_local_irq_restore_cond(flags)
#else
#define lock_mm_switch(flags)	do { (void)(flags); } while (0)
#define unlock_mm_switch(flags)	do { (void)(flags); } while (0)
#endif /* CONFIG_IPIPE */

#ifdef CONFIG_MPU
static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
			     struct task_struct *tsk)
{
	unsigned long flags;
	lock_mm_switch(flags);
	__switch_mm(prev, next, tsk);
	unlock_mm_switch(flags);
}

static inline void protect_page(struct mm_struct *mm, unsigned long addr,
				unsigned long flags)
{
	unsigned long *mask = mm->context.page_rwx_mask;
	unsigned long page;
	unsigned long idx;
	unsigned long bit;

	if (unlikely(addr >= ASYNC_BANK0_BASE && addr < ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE))
		page = (addr - (ASYNC_BANK0_BASE - _ramend)) >> 12;
	else
		page = addr >> 12;
	idx = page >> 5;
	bit = 1 << (page & 31);

	if (flags & VM_READ)
		mask[idx] |= bit;
	else
		mask[idx] &= ~bit;
	mask += page_mask_nelts;
	if (flags & VM_WRITE)
		mask[idx] |= bit;
	else
		mask[idx] &= ~bit;
	mask += page_mask_nelts;
	if (flags & VM_EXEC)
		mask[idx] |= bit;
	else
		mask[idx] &= ~bit;
}

static inline void update_protections(struct mm_struct *mm)
{
	unsigned int cpu = smp_processor_id();
	if (mm->context.page_rwx_mask == current_rwx_mask[cpu]) {
		flush_switched_cplbs(cpu);
		set_mask_dcplbs(mm->context.page_rwx_mask, cpu);
	}
}
#else /* !CONFIG_MPU */
static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
			     struct task_struct *tsk)
{
	__switch_mm(prev, next, tsk);
}
#endif

static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
{
}

/* Called when creating a new context during fork() or execve().  */
static inline int
init_new_context(struct task_struct *tsk, struct mm_struct *mm)
{
#ifdef CONFIG_MPU
	unsigned long p = __get_free_pages(GFP_KERNEL, page_mask_order);
	mm->context.page_rwx_mask = (unsigned long *)p;
	memset(mm->context.page_rwx_mask, 0,
	       page_mask_nelts * 3 * sizeof(long));
#endif
	return 0;
}

static inline void destroy_context(struct mm_struct *mm)
{
	struct sram_list_struct *tmp;
#ifdef CONFIG_MPU
	unsigned int cpu = smp_processor_id();
#endif

#ifdef CONFIG_APP_STACK_L1
	if (current_l1_stack_save == mm->context.l1_stack_save)
		current_l1_stack_save = 0;
	if (mm->context.l1_stack_save)
		free_l1stack();
#endif

	while ((tmp = mm->context.sram_list)) {
		mm->context.sram_list = tmp->next;
		sram_free(tmp->addr);
		kfree(tmp);
	}
#ifdef CONFIG_MPU
	if (current_rwx_mask[cpu] == mm->context.page_rwx_mask)
		current_rwx_mask[cpu] = NULL;
	free_pages((unsigned long)mm->context.page_rwx_mask, page_mask_order);
#endif
}

#define ipipe_mm_switch_protect(flags)		\
	flags = hard_local_irq_save_cond()

#define ipipe_mm_switch_unprotect(flags)	\
	hard_local_irq_restore_cond(flags)

#endif

Filemanager

Name Type Size Permission Actions
Kbuild File 658 B 0644
asm-offsets.h File 35 B 0644
atomic.h File 1.55 KB 0644
barrier.h File 2.55 KB 0644
bfin-global.h File 2.8 KB 0644
bfin-lq035q1.h File 868 B 0644
bfin5xx_spi.h File 2.07 KB 0644
bfin_can.h File 36.04 KB 0644
bfin_dma.h File 5.46 KB 0644
bfin_pfmon.h File 1.11 KB 0644
bfin_ppi.h File 9.01 KB 0644
bfin_sdh.h File 7.2 KB 0644
bfin_serial.h File 17.02 KB 0644
bfin_simple_timer.h File 949 B 0644
bfin_sport.h File 1.21 KB 0644
bfin_sport3.h File 5.47 KB 0644
bfin_twi.h File 6.25 KB 0644
bfin_watchdog.h File 696 B 0644
bfrom.h File 3.36 KB 0644
bitops.h File 3.45 KB 0644
blackfin.h File 1.55 KB 0644
bug.h File 1.49 KB 0644
cache.h File 1.47 KB 0644
cacheflush.h File 3.79 KB 0644
cdef_LPBlackfin.h File 18.93 KB 0644
checksum.h File 899 B 0644
clkdev.h File 318 B 0644
clocks.h File 1.66 KB 0644
cmpxchg.h File 3.2 KB 0644
context.S File 5.92 KB 0644
cplb.h File 4.86 KB 0644
cplbinit.h File 1.6 KB 0644
cpu.h File 443 B 0644
def_LPBlackfin.h File 28.6 KB 0644
delay.h File 917 B 0644
dma-mapping.h File 1.09 KB 0644
dma.h File 9.28 KB 0644
dpmc.h File 18.24 KB 0644
early_printk.h File 1.09 KB 0644
elf.h File 4.88 KB 0644
entry.h File 5.27 KB 0644
exec.h File 37 B 0644
fixed_code.h File 806 B 0644
flat.h File 1.41 KB 0644
ftrace.h File 1.37 KB 0644
gpio.h File 5.91 KB 0644
gptimers.h File 8.95 KB 0644
hardirq.h File 301 B 0644
io.h File 1.52 KB 0644
ipipe.h File 5.81 KB 0644
ipipe_base.h File 2.38 KB 0644
irq.h File 879 B 0644
irq_handler.h File 1.93 KB 0644
irqflags.h File 7.13 KB 0644
kgdb.h File 3.23 KB 0644
l1layout.h File 879 B 0644
linkage.h File 205 B 0644
mem_init.h File 13.1 KB 0644
mem_map.h File 1.73 KB 0644
mmu.h File 713 B 0644
mmu_context.h File 5.35 KB 0644
module.h File 410 B 0644
nand.h File 895 B 0644
nmi.h File 195 B 0644
page.h File 546 B 0644
page_offset.h File 192 B 0644
pci.h File 310 B 0644
pda.h File 1.86 KB 0644
perf_event.h File 23 B 0644
pgtable.h File 3 KB 0644
pm.h File 590 B 0644
portmux.h File 16.38 KB 0644
processor.h File 3.21 KB 0644
pseudo_instructions.h File 391 B 0644
ptrace.h File 1.19 KB 0644
reboot.h File 446 B 0644
rwlock.h File 142 B 0644
scb.h File 445 B 0644
sections.h File 2 KB 0644
segment.h File 226 B 0644
smp.h File 1.34 KB 0644
spinlock.h File 1.87 KB 0644
spinlock_types.h File 495 B 0644
string.h File 1.04 KB 0644
switch_to.h File 997 B 0644
syscall.h File 2.15 KB 0644
thread_info.h File 2.66 KB 0644
time.h File 1.33 KB 0644
timex.h File 477 B 0644
tlb.h File 481 B 0644
tlbflush.h File 88 B 0644
trace.h File 2.67 KB 0644
traps.h File 4.87 KB 0644
uaccess.h File 5.79 KB 0644
unistd.h File 523 B 0644
vga.h File 29 B 0644