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/* mb-regs.h: motherboard registers
 *
 * Copyright (C) 2003, 2004 Red Hat, Inc. All Rights Reserved.
 * Written by David Howells (dhowells@redhat.com)
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */

#ifndef _ASM_MB_REGS_H
#define _ASM_MB_REGS_H

#include <asm/cpu-irqs.h>
#include <asm/sections.h>
#include <asm/mem-layout.h>

#ifndef __ASSEMBLY__
/* gcc builtins, annotated */

unsigned long __builtin_read8(volatile void __iomem *);
unsigned long __builtin_read16(volatile void __iomem *);
unsigned long __builtin_read32(volatile void __iomem *);
void __builtin_write8(volatile void __iomem *, unsigned char);
void __builtin_write16(volatile void __iomem *, unsigned short);
void __builtin_write32(volatile void __iomem *, unsigned long);
#endif

#define __region_IO	KERNEL_IO_START	/* the region from 0xe0000000 to 0xffffffff has suitable
					 * protection laid over the top for use in memory-mapped
					 * I/O
					 */

#define __region_CS0	0xff000000	/* Boot ROMs area */

#ifdef CONFIG_MB93091_VDK
/*
 * VDK motherboard and CPU card specific stuff
 */

#include <asm/mb93091-fpga-irqs.h>

#define IRQ_CPU_MB93493_0	IRQ_CPU_EXTERNAL0
#define IRQ_CPU_MB93493_1	IRQ_CPU_EXTERNAL1

#define __region_CS2	0xe0000000	/* SLBUS/PCI I/O space */
#define __region_CS2_M		0x0fffffff /* mask */
#define __region_CS2_C		0x00000000 /* control */
#define __region_CS5	0xf0000000	/* MB93493 CSC area (DAV daughter board) */
#define __region_CS5_M		0x00ffffff
#define __region_CS5_C		0x00010000
#define __region_CS7	0xf1000000	/* CB70 CPU-card PCMCIA port I/O space */
#define __region_CS7_M		0x00ffffff
#define __region_CS7_C		0x00410701
#define __region_CS1	0xfc000000	/* SLBUS/PCI bridge control registers */
#define __region_CS1_M		0x000fffff
#define __region_CS1_C		0x00000000
#define __region_CS6	0xfc100000	/* CB70 CPU-card DM9000 LAN I/O space */
#define __region_CS6_M		0x000fffff
#define __region_CS6_C		0x00400707
#define __region_CS3	0xfc200000	/* MB93493 CSR area (DAV daughter board) */
#define __region_CS3_M		0x000fffff
#define __region_CS3_C		0xc8100000
#define __region_CS4	0xfd000000	/* CB70 CPU-card extra flash space */
#define __region_CS4_M		0x00ffffff
#define __region_CS4_C		0x00000f07

#define __region_PCI_IO		(__region_CS2 + 0x04000000UL)
#define __region_PCI_MEM	(__region_CS2 + 0x08000000UL)
#define __flush_PCI_writes()						\
do {									\
	__builtin_write8((volatile void __iomem *) __region_PCI_MEM, 0);	\
} while(0)

#define __is_PCI_IO(addr) \
	(((unsigned long)(addr) >> 24) - (__region_PCI_IO >> 24)  < (0x04000000UL >> 24))

#define __is_PCI_MEM(addr) \
	((unsigned long)(addr) - __region_PCI_MEM < 0x08000000UL)

#define __is_PCI_addr(addr) \
	((unsigned long)(addr) - __region_PCI_IO < 0x0c000000UL)

#define __get_CLKSW()	({ *(volatile unsigned long *)(__region_CS2 + 0x0130000cUL) & 0xffUL; })
#define __get_CLKIN()	(__get_CLKSW() * 125U * 100000U / 24U)

#ifndef __ASSEMBLY__
extern int __nongprelbss mb93090_mb00_detected;
#endif

#define __addr_LEDS()		(__region_CS2 + 0x01200004UL)
#ifdef CONFIG_MB93090_MB00
#define __set_LEDS(X)							\
do {									\
	if (mb93090_mb00_detected)					\
		__builtin_write32((void __iomem *) __addr_LEDS(), ~(X));	\
} while (0)
#else
#define __set_LEDS(X)
#endif

#define __addr_LCD()		(__region_CS2 + 0x01200008UL)
#define __get_LCD(B)		__builtin_read32((volatile void __iomem *) (B))
#define __set_LCD(B,X)		__builtin_write32((volatile void __iomem *) (B), (X))

#define LCD_D			0x000000ff		/* LCD data bus */
#define LCD_RW			0x00000100		/* LCD R/W signal */
#define LCD_RS			0x00000200		/* LCD Register Select */
#define LCD_E			0x00000400		/* LCD Start Enable Signal */

#define LCD_CMD_CLEAR		(LCD_E|0x001)
#define LCD_CMD_HOME		(LCD_E|0x002)
#define LCD_CMD_CURSOR_INC	(LCD_E|0x004)
#define LCD_CMD_SCROLL_INC	(LCD_E|0x005)
#define LCD_CMD_CURSOR_DEC	(LCD_E|0x006)
#define LCD_CMD_SCROLL_DEC	(LCD_E|0x007)
#define LCD_CMD_OFF		(LCD_E|0x008)
#define LCD_CMD_ON(CRSR,BLINK)	(LCD_E|0x00c|(CRSR<<1)|BLINK)
#define LCD_CMD_CURSOR_MOVE_L	(LCD_E|0x010)
#define LCD_CMD_CURSOR_MOVE_R	(LCD_E|0x014)
#define LCD_CMD_DISPLAY_SHIFT_L	(LCD_E|0x018)
#define LCD_CMD_DISPLAY_SHIFT_R	(LCD_E|0x01c)
#define LCD_CMD_FUNCSET(DL,N,F)	(LCD_E|0x020|(DL<<4)|(N<<3)|(F<<2))
#define LCD_CMD_SET_CG_ADDR(X)	(LCD_E|0x040|X)
#define LCD_CMD_SET_DD_ADDR(X)	(LCD_E|0x080|X)
#define LCD_CMD_READ_BUSY	(LCD_E|LCD_RW)
#define LCD_DATA_WRITE(X)	(LCD_E|LCD_RS|(X))
#define LCD_DATA_READ		(LCD_E|LCD_RS|LCD_RW)

#else
/*
 * PDK unit specific stuff
 */

#include <asm/mb93093-fpga-irqs.h>

#define IRQ_CPU_MB93493_0	IRQ_CPU_EXTERNAL0
#define IRQ_CPU_MB93493_1	IRQ_CPU_EXTERNAL1

#define __region_CS5	0xf0000000	/* MB93493 CSC area (DAV daughter board) */
#define __region_CS5_M		0x00ffffff /* mask */
#define __region_CS5_C		0x00010000 /* control */
#define __region_CS2	0x20000000	/* FPGA registers */
#define __region_CS2_M		0x000fffff
#define __region_CS2_C		0x00000000
#define __region_CS1	0xfc100000	/* LAN registers */
#define __region_CS1_M		0x000fffff
#define __region_CS1_C		0x00010404
#define __region_CS3	0xfc200000	/* MB93493 CSR area (DAV daughter board) */
#define __region_CS3_M		0x000fffff
#define __region_CS3_C		0xc8000000
#define __region_CS4	0xfd000000	/* extra ROMs area */
#define __region_CS4_M		0x00ffffff
#define __region_CS4_C		0x00000f07

#define __region_CS6	0xfe000000	/* not used - hide behind CPU resource I/O regs */
#define __region_CS6_M		0x000fffff
#define __region_CS6_C		0x00000f07
#define __region_CS7	0xfe000000	/* not used - hide behind CPU resource I/O regs */
#define __region_CS7_M		0x000fffff
#define __region_CS7_C		0x00000f07

#define __is_PCI_IO(addr)	0	/* no PCI */
#define __is_PCI_MEM(addr)	0
#define __is_PCI_addr(addr)	0
#define __region_PCI_IO		0
#define __region_PCI_MEM	0
#define __flush_PCI_writes()	do { } while(0)

#define __get_CLKSW()		0UL
#define __get_CLKIN()		66000000UL

#define __addr_LEDS()		(__region_CS2 + 0x00000023UL)
#define __set_LEDS(X)		__builtin_write8((volatile void __iomem *) __addr_LEDS(), (X))

#define __addr_FPGATR()		(__region_CS2 + 0x00000030UL)
#define __set_FPGATR(X)		__builtin_write32((volatile void __iomem *) __addr_FPGATR(), (X))
#define __get_FPGATR()		__builtin_read32((volatile void __iomem *) __addr_FPGATR())

#define MB93093_FPGA_FPGATR_AUDIO_CLK	0x00000003

#define __set_FPGATR_AUDIO_CLK(V) \
	__set_FPGATR((__get_FPGATR() & ~MB93093_FPGA_FPGATR_AUDIO_CLK) | (V))

#define MB93093_FPGA_FPGATR_AUDIO_CLK_OFF	0x0
#define MB93093_FPGA_FPGATR_AUDIO_CLK_11MHz	0x1
#define MB93093_FPGA_FPGATR_AUDIO_CLK_12MHz	0x2
#define MB93093_FPGA_FPGATR_AUDIO_CLK_02MHz	0x3

#define MB93093_FPGA_SWR_PUSHSWMASK	(0x1F<<26)
#define MB93093_FPGA_SWR_PUSHSW4	(1<<29)

#define __addr_FPGA_SWR		((volatile void __iomem *)(__region_CS2 + 0x28UL))
#define __get_FPGA_PUSHSW1_5()	(__builtin_read32(__addr_FPGA_SWR) & MB93093_FPGA_SWR_PUSHSWMASK)


#endif

#endif /* _ASM_MB_REGS_H */

Filemanager

Name Type Size Permission Actions
Kbuild File 290 B 0644
asm-offsets.h File 35 B 0644
atomic.h File 4.97 KB 0644
atomic_defs.h File 4.66 KB 0644
ax88796.h File 751 B 0644
barrier.h File 720 B 0644
bitops.h File 7.12 KB 0644
bug.h File 1.36 KB 0644
bugs.h File 445 B 0644
busctl-regs.h File 2.02 KB 0644
cache.h File 727 B 0644
cacheflush.h File 3.05 KB 0644
checksum.h File 4.53 KB 0644
cmpxchg.h File 4.56 KB 0644
cpu-irqs.h File 2.59 KB 0644
current.h File 685 B 0644
delay.h File 1.28 KB 0644
div64.h File 31 B 0644
dm9000.h File 1.12 KB 0644
dma-mapping.h File 448 B 0644
dma.h File 3.63 KB 0644
elf.h File 5.18 KB 0644
emergency-restart.h File 149 B 0644
fpu.h File 261 B 0644
ftrace.h File 12 B 0644
futex.h File 416 B 0644
gdb-stub.h File 4.47 KB 0644
gpio-regs.h File 3.64 KB 0644
hardirq.h File 666 B 0644
highmem.h File 4.09 KB 0644
hw_irq.h File 484 B 0644
io.h File 9.75 KB 0644
irc-regs.h File 1.78 KB 0644
irq.h File 760 B 0644
irq_regs.h File 764 B 0644
irqflags.h File 3.71 KB 0644
kdebug.h File 32 B 0644
kmap_types.h File 123 B 0644
linkage.h File 114 B 0644
local.h File 140 B 0644
local64.h File 33 B 0644
math-emu.h File 6.38 KB 0644
mb-regs.h File 6.94 KB 0644
mb86943a.h File 1.84 KB 0644
mb93091-fpga-irqs.h File 1.06 KB 0644
mb93093-fpga-irqs.h File 789 B 0644
mb93493-irqs.h File 1.69 KB 0644
mb93493-regs.h File 12.46 KB 0644
mem-layout.h File 2.21 KB 0644
mmu.h File 1.26 KB 0644
mmu_context.h File 1.38 KB 0644
module.h File 617 B 0644
page.h File 2.08 KB 0644
pci.h File 1.23 KB 0644
percpu.h File 147 B 0644
perf_event.h File 487 B 0644
pgalloc.h File 1.87 KB 0644
pgtable.h File 16.02 KB 0644
processor.h File 2.85 KB 0644
ptrace.h File 1.2 KB 0644
sections.h File 1.1 KB 0644
segment.h File 1.08 KB 0644
serial-regs.h File 1.63 KB 0644
serial.h File 308 B 0644
setup.h File 641 B 0644
shmparam.h File 183 B 0644
signal.h File 141 B 0644
smp.h File 139 B 0644
spinlock.h File 516 B 0644
spr-regs.h File 17.93 KB 0644
string.h File 1.36 KB 0644
switch_to.h File 1.07 KB 0644
syscall.h File 2.73 KB 0644
termios.h File 425 B 0644
thread_info.h File 3.48 KB 0644
timer-regs.h File 3.63 KB 0644
timex.h File 720 B 0644
tlb.h File 615 B 0644
tlbflush.h File 1.88 KB 0644
topology.h File 229 B 0644
types.h File 595 B 0644
uaccess.h File 6.79 KB 0644
ucontext.h File 281 B 0644
unaligned.h File 694 B 0644
unistd.h File 928 B 0644
user.h File 3.29 KB 0644
vga.h File 464 B 0644
virtconvert.h File 1.09 KB 0644
xor.h File 29 B 0644