/* SPDX-License-Identifier: GPL-2.0 */ #ifndef _ASM_IA64_IO_H #define _ASM_IA64_IO_H /* * This file contains the definitions for the emulated IO instructions * inb/inw/inl/outb/outw/outl and the "string versions" of the same * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing" * versions of the single-IO instructions (inb_p/inw_p/..). * * This file is not meant to be obfuscating: it's just complicated to * (a) handle it all in a way that makes gcc able to optimize it as * well as possible and (b) trying to avoid writing the same thing * over and over again with slight variations and possibly making a * mistake somewhere. * * Copyright (C) 1998-2003 Hewlett-Packard Co * David Mosberger-Tang <davidm@hpl.hp.com> * Copyright (C) 1999 Asit Mallick <asit.k.mallick@intel.com> * Copyright (C) 1999 Don Dugger <don.dugger@intel.com> */ #include <asm/unaligned.h> #include <asm/early_ioremap.h> /* We don't use IO slowdowns on the ia64, but.. */ #define __SLOW_DOWN_IO do { } while (0) #define SLOW_DOWN_IO do { } while (0) #define __IA64_UNCACHED_OFFSET RGN_BASE(RGN_UNCACHED) /* * The legacy I/O space defined by the ia64 architecture supports only 65536 ports, but * large machines may have multiple other I/O spaces so we can't place any a priori limit * on IO_SPACE_LIMIT. These additional spaces are described in ACPI. */ #define IO_SPACE_LIMIT 0xffffffffffffffffUL #define MAX_IO_SPACES_BITS 8 #define MAX_IO_SPACES (1UL << MAX_IO_SPACES_BITS) #define IO_SPACE_BITS 24 #define IO_SPACE_SIZE (1UL << IO_SPACE_BITS) #define IO_SPACE_NR(port) ((port) >> IO_SPACE_BITS) #define IO_SPACE_BASE(space) ((space) << IO_SPACE_BITS) #define IO_SPACE_PORT(port) ((port) & (IO_SPACE_SIZE - 1)) #define IO_SPACE_SPARSE_ENCODING(p) ((((p) >> 2) << 12) | ((p) & 0xfff)) struct io_space { unsigned long mmio_base; /* base in MMIO space */ int sparse; }; extern struct io_space io_space[]; extern unsigned int num_io_spaces; # ifdef __KERNEL__ /* * All MMIO iomem cookies are in region 6; anything less is a PIO cookie: * 0xCxxxxxxxxxxxxxxx MMIO cookie (return from ioremap) * 0x000000001SPPPPPP PIO cookie (S=space number, P..P=port) * * ioread/writeX() uses the leading 1 in PIO cookies (PIO_OFFSET) to catch * code that uses bare port numbers without the prerequisite pci_iomap(). */ #define PIO_OFFSET (1UL << (MAX_IO_SPACES_BITS + IO_SPACE_BITS)) #define PIO_MASK (PIO_OFFSET - 1) #define PIO_RESERVED __IA64_UNCACHED_OFFSET #define HAVE_ARCH_PIO_SIZE #include <asm/intrinsics.h> #include <asm/machvec.h> #include <asm/page.h> #include <asm-generic/iomap.h> /* * Change virtual addresses to physical addresses and vv. */ static inline unsigned long virt_to_phys (volatile void *address) { return (unsigned long) address - PAGE_OFFSET; } static inline void* phys_to_virt (unsigned long address) { return (void *) (address + PAGE_OFFSET); } #define ARCH_HAS_VALID_PHYS_ADDR_RANGE extern u64 kern_mem_attribute (unsigned long phys_addr, unsigned long size); extern int valid_phys_addr_range (phys_addr_t addr, size_t count); /* efi.c */ extern int valid_mmap_phys_addr_range (unsigned long pfn, size_t count); /* * The following two macros are deprecated and scheduled for removal. * Please use the PCI-DMA interface defined in <asm/pci.h> instead. */ #define bus_to_virt phys_to_virt #define virt_to_bus virt_to_phys #define page_to_bus page_to_phys # endif /* KERNEL */ /* * Memory fence w/accept. This should never be used in code that is * not IA-64 specific. */ #define __ia64_mf_a() ia64_mfa() /** * ___ia64_mmiowb - I/O write barrier * * Ensure ordering of I/O space writes. This will make sure that writes * following the barrier will arrive after all previous writes. For most * ia64 platforms, this is a simple 'mf.a' instruction. * * See Documentation/driver-api/device-io.rst for more information. */ static inline void ___ia64_mmiowb(void) { ia64_mfa(); } static inline void* __ia64_mk_io_addr (unsigned long port) { struct io_space *space; unsigned long offset; space = &io_space[IO_SPACE_NR(port)]; port = IO_SPACE_PORT(port); if (space->sparse) offset = IO_SPACE_SPARSE_ENCODING(port); else offset = port; return (void *) (space->mmio_base | offset); } #define __ia64_inb ___ia64_inb #define __ia64_inw ___ia64_inw #define __ia64_inl ___ia64_inl #define __ia64_outb ___ia64_outb #define __ia64_outw ___ia64_outw #define __ia64_outl ___ia64_outl #define __ia64_readb ___ia64_readb #define __ia64_readw ___ia64_readw #define __ia64_readl ___ia64_readl #define __ia64_readq ___ia64_readq #define __ia64_readb_relaxed ___ia64_readb #define __ia64_readw_relaxed ___ia64_readw #define __ia64_readl_relaxed ___ia64_readl #define __ia64_readq_relaxed ___ia64_readq #define __ia64_writeb ___ia64_writeb #define __ia64_writew ___ia64_writew #define __ia64_writel ___ia64_writel #define __ia64_writeq ___ia64_writeq #define __ia64_mmiowb ___ia64_mmiowb /* * For the in/out routines, we need to do "mf.a" _after_ doing the I/O access to ensure * that the access has completed before executing other I/O accesses. Since we're doing * the accesses through an uncachable (UC) translation, the CPU will execute them in * program order. However, we still need to tell the compiler not to shuffle them around * during optimization, which is why we use "volatile" pointers. */ static inline unsigned int ___ia64_inb (unsigned long port) { volatile unsigned char *addr = __ia64_mk_io_addr(port); unsigned char ret; ret = *addr; __ia64_mf_a(); return ret; } static inline unsigned int ___ia64_inw (unsigned long port) { volatile unsigned short *addr = __ia64_mk_io_addr(port); unsigned short ret; ret = *addr; __ia64_mf_a(); return ret; } static inline unsigned int ___ia64_inl (unsigned long port) { volatile unsigned int *addr = __ia64_mk_io_addr(port); unsigned int ret; ret = *addr; __ia64_mf_a(); return ret; } static inline void ___ia64_outb (unsigned char val, unsigned long port) { volatile unsigned char *addr = __ia64_mk_io_addr(port); *addr = val; __ia64_mf_a(); } static inline void ___ia64_outw (unsigned short val, unsigned long port) { volatile unsigned short *addr = __ia64_mk_io_addr(port); *addr = val; __ia64_mf_a(); } static inline void ___ia64_outl (unsigned int val, unsigned long port) { volatile unsigned int *addr = __ia64_mk_io_addr(port); *addr = val; __ia64_mf_a(); } static inline void __insb (unsigned long port, void *dst, unsigned long count) { unsigned char *dp = dst; while (count--) *dp++ = platform_inb(port); } static inline void __insw (unsigned long port, void *dst, unsigned long count) { unsigned short *dp = dst; while (count--) put_unaligned(platform_inw(port), dp++); } static inline void __insl (unsigned long port, void *dst, unsigned long count) { unsigned int *dp = dst; while (count--) put_unaligned(platform_inl(port), dp++); } static inline void __outsb (unsigned long port, const void *src, unsigned long count) { const unsigned char *sp = src; while (count--) platform_outb(*sp++, port); } static inline void __outsw (unsigned long port, const void *src, unsigned long count) { const unsigned short *sp = src; while (count--) platform_outw(get_unaligned(sp++), port); } static inline void __outsl (unsigned long port, const void *src, unsigned long count) { const unsigned int *sp = src; while (count--) platform_outl(get_unaligned(sp++), port); } /* * Unfortunately, some platforms are broken and do not follow the IA-64 architecture * specification regarding legacy I/O support. Thus, we have to make these operations * platform dependent... */ #define __inb platform_inb #define __inw platform_inw #define __inl platform_inl #define __outb platform_outb #define __outw platform_outw #define __outl platform_outl #define __mmiowb platform_mmiowb #define inb(p) __inb(p) #define inw(p) __inw(p) #define inl(p) __inl(p) #define insb(p,d,c) __insb(p,d,c) #define insw(p,d,c) __insw(p,d,c) #define insl(p,d,c) __insl(p,d,c) #define outb(v,p) __outb(v,p) #define outw(v,p) __outw(v,p) #define outl(v,p) __outl(v,p) #define outsb(p,s,c) __outsb(p,s,c) #define outsw(p,s,c) __outsw(p,s,c) #define outsl(p,s,c) __outsl(p,s,c) #define mmiowb() __mmiowb() /* * The address passed to these functions are ioremap()ped already. * * We need these to be machine vectors since some platforms don't provide * DMA coherence via PIO reads (PCI drivers and the spec imply that this is * a good idea). Writes are ok though for all existing ia64 platforms (and * hopefully it'll stay that way). */ static inline unsigned char ___ia64_readb (const volatile void __iomem *addr) { return *(volatile unsigned char __force *)addr; } static inline unsigned short ___ia64_readw (const volatile void __iomem *addr) { return *(volatile unsigned short __force *)addr; } static inline unsigned int ___ia64_readl (const volatile void __iomem *addr) { return *(volatile unsigned int __force *) addr; } static inline unsigned long ___ia64_readq (const volatile void __iomem *addr) { return *(volatile unsigned long __force *) addr; } static inline void __writeb (unsigned char val, volatile void __iomem *addr) { *(volatile unsigned char __force *) addr = val; } static inline void __writew (unsigned short val, volatile void __iomem *addr) { *(volatile unsigned short __force *) addr = val; } static inline void __writel (unsigned int val, volatile void __iomem *addr) { *(volatile unsigned int __force *) addr = val; } static inline void __writeq (unsigned long val, volatile void __iomem *addr) { *(volatile unsigned long __force *) addr = val; } #define __readb platform_readb #define __readw platform_readw #define __readl platform_readl #define __readq platform_readq #define __readb_relaxed platform_readb_relaxed #define __readw_relaxed platform_readw_relaxed #define __readl_relaxed platform_readl_relaxed #define __readq_relaxed platform_readq_relaxed #define readb(a) __readb((a)) #define readw(a) __readw((a)) #define readl(a) __readl((a)) #define readq(a) __readq((a)) #define readb_relaxed(a) __readb_relaxed((a)) #define readw_relaxed(a) __readw_relaxed((a)) #define readl_relaxed(a) __readl_relaxed((a)) #define readq_relaxed(a) __readq_relaxed((a)) #define __raw_readb readb #define __raw_readw readw #define __raw_readl readl #define __raw_readq readq #define __raw_readb_relaxed readb_relaxed #define __raw_readw_relaxed readw_relaxed #define __raw_readl_relaxed readl_relaxed #define __raw_readq_relaxed readq_relaxed #define writeb(v,a) __writeb((v), (a)) #define writew(v,a) __writew((v), (a)) #define writel(v,a) __writel((v), (a)) #define writeq(v,a) __writeq((v), (a)) #define writeb_relaxed(v,a) __writeb((v), (a)) #define writew_relaxed(v,a) __writew((v), (a)) #define writel_relaxed(v,a) __writel((v), (a)) #define writeq_relaxed(v,a) __writeq((v), (a)) #define __raw_writeb writeb #define __raw_writew writew #define __raw_writel writel #define __raw_writeq writeq #ifndef inb_p # define inb_p inb #endif #ifndef inw_p # define inw_p inw #endif #ifndef inl_p # define inl_p inl #endif #ifndef outb_p # define outb_p outb #endif #ifndef outw_p # define outw_p outw #endif #ifndef outl_p # define outl_p outl #endif # ifdef __KERNEL__ extern void __iomem * ioremap(unsigned long offset, unsigned long size); extern void __iomem * ioremap_nocache (unsigned long offset, unsigned long size); extern void iounmap (volatile void __iomem *addr); static inline void __iomem * ioremap_cache (unsigned long phys_addr, unsigned long size) { return ioremap(phys_addr, size); } #define ioremap_cache ioremap_cache #define ioremap_uc ioremap_nocache /* * String version of IO memory access ops: */ extern void memcpy_fromio(void *dst, const volatile void __iomem *src, long n); extern void memcpy_toio(volatile void __iomem *dst, const void *src, long n); extern void memset_io(volatile void __iomem *s, int c, long n); # endif /* __KERNEL__ */ #endif /* _ASM_IA64_IO_H */
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acenv.h | File | 1.27 KB | 0644 |
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acpi-ext.h | File | 590 B | 0644 |
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acpi.h | File | 4.1 KB | 0644 |
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agp.h | File | 857 B | 0644 |
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asm-offsets.h | File | 35 B | 0644 |
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asm-prototypes.h | File | 890 B | 0644 |
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asmmacro.h | File | 3.29 KB | 0644 |
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atomic.h | File | 9.47 KB | 0644 |
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barrier.h | File | 2.36 KB | 0644 |
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bitops.h | File | 10.84 KB | 0644 |
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bug.h | File | 404 B | 0644 |
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bugs.h | File | 436 B | 0644 |
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cache.h | File | 771 B | 0644 |
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cacheflush.h | File | 1.71 KB | 0644 |
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checksum.h | File | 2.1 KB | 0644 |
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clocksource.h | File | 276 B | 0644 |
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cpu.h | File | 456 B | 0644 |
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cputime.h | File | 855 B | 0644 |
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current.h | File | 418 B | 0644 |
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cyclone.h | File | 442 B | 0644 |
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delay.h | File | 1.7 KB | 0644 |
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device.h | File | 323 B | 0644 |
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div64.h | File | 31 B | 0644 |
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dma-mapping.h | File | 1.17 KB | 0644 |
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dma.h | File | 466 B | 0644 |
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dmi.h | File | 343 B | 0644 |
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early_ioremap.h | File | 428 B | 0644 |
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elf.h | File | 9.83 KB | 0644 |
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emergency-restart.h | File | 149 B | 0644 |
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esi.h | File | 887 B | 0644 |
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exception.h | File | 1.13 KB | 0644 |
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export.h | File | 115 B | 0644 |
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futex.h | File | 2.56 KB | 0644 |
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gcc_intrin.h | File | 368 B | 0644 |
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hardirq.h | File | 564 B | 0644 |
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hpsim.h | File | 364 B | 0644 |
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hugetlb.h | File | 1.67 KB | 0644 |
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hw_irq.h | File | 6.33 KB | 0644 |
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idle.h | File | 200 B | 0644 |
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intrinsics.h | File | 306 B | 0644 |
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io.h | File | 11.77 KB | 0644 |
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iommu.h | File | 555 B | 0644 |
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iommu_table.h | File | 175 B | 0644 |
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iosapic.h | File | 3.16 KB | 0644 |
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irq.h | File | 1.02 KB | 0644 |
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irq_regs.h | File | 34 B | 0644 |
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irq_remapping.h | File | 142 B | 0644 |
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irqflags.h | File | 2.11 KB | 0644 |
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kdebug.h | File | 1.64 KB | 0644 |
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kexec.h | File | 1.57 KB | 0644 |
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kmap_types.h | File | 260 B | 0644 |
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kprobes.h | File | 3.82 KB | 0644 |
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kregs.h | File | 6.73 KB | 0644 |
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libata-portmap.h | File | 225 B | 0644 |
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linkage.h | File | 398 B | 0644 |
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local.h | File | 31 B | 0644 |
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local64.h | File | 33 B | 0644 |
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machvec.h | File | 12.1 KB | 0644 |
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machvec_dig_vtd.h | File | 558 B | 0644 |
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machvec_hpzx1.h | File | 544 B | 0644 |
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machvec_hpzx1_swiotlb.h | File | 632 B | 0644 |
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mca_asm.h | File | 7.18 KB | 0644 |
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meminit.h | File | 2.24 KB | 0644 |
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mman.h | File | 432 B | 0644 |
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mmu.h | File | 374 B | 0644 |
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mmu_context.h | File | 5.29 KB | 0644 |
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mmzone.h | File | 1.1 KB | 0644 |
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module.h | File | 1.1 KB | 0644 |
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msidef.h | File | 1.4 KB | 0644 |
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numa.h | File | 2.18 KB | 0644 |
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page.h | File | 6.49 KB | 0644 |
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param.h | File | 439 B | 0644 |
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parport.h | File | 534 B | 0644 |
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patch.h | File | 1.19 KB | 0644 |
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pci.h | File | 2.83 KB | 0644 |
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percpu.h | File | 1.32 KB | 0644 |
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perfmon.h | File | 4.33 KB | 0644 |
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pgalloc.h | File | 2.84 KB | 0644 |
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pgtable.h | File | 20.92 KB | 0644 |
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processor.h | File | 17.98 KB | 0644 |
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ptrace.h | File | 5.2 KB | 0644 |
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rwsem.h | File | 3.82 KB | 0644 |
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sal.h | File | 26.51 KB | 0644 |
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sections.h | File | 1.35 KB | 0644 |
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segment.h | File | 162 B | 0644 |
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serial.h | File | 446 B | 0644 |
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shmparam.h | File | 445 B | 0644 |
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signal.h | File | 749 B | 0644 |
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smp.h | File | 3.21 KB | 0644 |
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sparsemem.h | File | 621 B | 0644 |
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spinlock.h | File | 6.92 KB | 0644 |
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spinlock_types.h | File | 475 B | 0644 |
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string.h | File | 659 B | 0644 |
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swiotlb.h | File | 344 B | 0644 |
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switch_to.h | File | 2.89 KB | 0644 |
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syscall.h | File | 2.06 KB | 0644 |
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termios.h | File | 1.88 KB | 0644 |
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thread_info.h | File | 4.66 KB | 0644 |
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timex.h | File | 1.47 KB | 0644 |
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tlb.h | File | 8.42 KB | 0644 |
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tlbflush.h | File | 2.33 KB | 0644 |
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topology.h | File | 1.58 KB | 0644 |
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types.h | File | 828 B | 0644 |
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uaccess.h | File | 9.86 KB | 0644 |
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unaligned.h | File | 337 B | 0644 |
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uncached.h | File | 463 B | 0644 |
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unistd.h | File | 1.45 KB | 0644 |
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unwind.h | File | 5.74 KB | 0644 |
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user.h | File | 2.25 KB | 0644 |
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ustack.h | File | 403 B | 0644 |
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vga.h | File | 657 B | 0644 |
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xor.h | File | 1.12 KB | 0644 |
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