/* SPDX-License-Identifier: GPL-2.0 */ #ifndef _ASM_IA64_MMU_CONTEXT_H #define _ASM_IA64_MMU_CONTEXT_H /* * Copyright (C) 1998-2002 Hewlett-Packard Co * David Mosberger-Tang <davidm@hpl.hp.com> */ /* * Routines to manage the allocation of task context numbers. Task context * numbers are used to reduce or eliminate the need to perform TLB flushes * due to context switches. Context numbers are implemented using ia-64 * region ids. Since the IA-64 TLB does not consider the region number when * performing a TLB lookup, we need to assign a unique region id to each * region in a process. We use the least significant three bits in aregion * id for this purpose. */ #define IA64_REGION_ID_KERNEL 0 /* the kernel's region id (tlb.c depends on this being 0) */ #define ia64_rid(ctx,addr) (((ctx) << 3) | (addr >> 61)) # include <asm/page.h> # ifndef __ASSEMBLY__ #include <linux/compiler.h> #include <linux/percpu.h> #include <linux/sched.h> #include <linux/mm_types.h> #include <linux/spinlock.h> #include <asm/processor.h> #include <asm-generic/mm_hooks.h> struct ia64_ctx { spinlock_t lock; unsigned int next; /* next context number to use */ unsigned int limit; /* available free range */ unsigned int max_ctx; /* max. context value supported by all CPUs */ /* call wrap_mmu_context when next >= max */ unsigned long *bitmap; /* bitmap size is max_ctx+1 */ unsigned long *flushmap;/* pending rid to be flushed */ }; extern struct ia64_ctx ia64_ctx; DECLARE_PER_CPU(u8, ia64_need_tlb_flush); extern void mmu_context_init (void); extern void wrap_mmu_context (struct mm_struct *mm); static inline void enter_lazy_tlb (struct mm_struct *mm, struct task_struct *tsk) { } /* * When the context counter wraps around all TLBs need to be flushed because * an old context number might have been reused. This is signalled by the * ia64_need_tlb_flush per-CPU variable, which is checked in the routine * below. Called by activate_mm(). <efocht@ess.nec.de> */ static inline void delayed_tlb_flush (void) { extern void local_flush_tlb_all (void); unsigned long flags; if (unlikely(__ia64_per_cpu_var(ia64_need_tlb_flush))) { spin_lock_irqsave(&ia64_ctx.lock, flags); if (__ia64_per_cpu_var(ia64_need_tlb_flush)) { local_flush_tlb_all(); __ia64_per_cpu_var(ia64_need_tlb_flush) = 0; } spin_unlock_irqrestore(&ia64_ctx.lock, flags); } } static inline nv_mm_context_t get_mmu_context (struct mm_struct *mm) { unsigned long flags; nv_mm_context_t context = mm->context; if (likely(context)) goto out; spin_lock_irqsave(&ia64_ctx.lock, flags); /* re-check, now that we've got the lock: */ context = mm->context; if (context == 0) { cpumask_clear(mm_cpumask(mm)); if (ia64_ctx.next >= ia64_ctx.limit) { ia64_ctx.next = find_next_zero_bit(ia64_ctx.bitmap, ia64_ctx.max_ctx, ia64_ctx.next); ia64_ctx.limit = find_next_bit(ia64_ctx.bitmap, ia64_ctx.max_ctx, ia64_ctx.next); if (ia64_ctx.next >= ia64_ctx.max_ctx) wrap_mmu_context(mm); } mm->context = context = ia64_ctx.next++; __set_bit(context, ia64_ctx.bitmap); } spin_unlock_irqrestore(&ia64_ctx.lock, flags); out: /* * Ensure we're not starting to use "context" before any old * uses of it are gone from our TLB. */ delayed_tlb_flush(); return context; } /* * Initialize context number to some sane value. MM is guaranteed to be a * brand-new address-space, so no TLB flushing is needed, ever. */ static inline int init_new_context (struct task_struct *p, struct mm_struct *mm) { mm->context = 0; return 0; } static inline void destroy_context (struct mm_struct *mm) { /* Nothing to do. */ } static inline void reload_context (nv_mm_context_t context) { unsigned long rid; unsigned long rid_incr = 0; unsigned long rr0, rr1, rr2, rr3, rr4, old_rr4; old_rr4 = ia64_get_rr(RGN_BASE(RGN_HPAGE)); rid = context << 3; /* make space for encoding the region number */ rid_incr = 1 << 8; /* encode the region id, preferred page size, and VHPT enable bit: */ rr0 = (rid << 8) | (PAGE_SHIFT << 2) | 1; rr1 = rr0 + 1*rid_incr; rr2 = rr0 + 2*rid_incr; rr3 = rr0 + 3*rid_incr; rr4 = rr0 + 4*rid_incr; #ifdef CONFIG_HUGETLB_PAGE rr4 = (rr4 & (~(0xfcUL))) | (old_rr4 & 0xfc); # if RGN_HPAGE != 4 # error "reload_context assumes RGN_HPAGE is 4" # endif #endif ia64_set_rr0_to_rr4(rr0, rr1, rr2, rr3, rr4); ia64_srlz_i(); /* srlz.i implies srlz.d */ } /* * Must be called with preemption off */ static inline void activate_context (struct mm_struct *mm) { nv_mm_context_t context; do { context = get_mmu_context(mm); if (!cpumask_test_cpu(smp_processor_id(), mm_cpumask(mm))) cpumask_set_cpu(smp_processor_id(), mm_cpumask(mm)); reload_context(context); /* * in the unlikely event of a TLB-flush by another thread, * redo the load. */ } while (unlikely(context != mm->context)); } #define deactivate_mm(tsk,mm) do { } while (0) /* * Switch from address space PREV to address space NEXT. */ static inline void activate_mm (struct mm_struct *prev, struct mm_struct *next) { /* * We may get interrupts here, but that's OK because interrupt * handlers cannot touch user-space. */ ia64_set_kr(IA64_KR_PT_BASE, __pa(next->pgd)); activate_context(next); } #define switch_mm(prev_mm,next_mm,next_task) activate_mm(prev_mm, next_mm) # endif /* ! __ASSEMBLY__ */ #endif /* _ASM_IA64_MMU_CONTEXT_H */
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acenv.h | File | 1.27 KB | 0644 |
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acpi-ext.h | File | 590 B | 0644 |
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acpi.h | File | 4.1 KB | 0644 |
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agp.h | File | 857 B | 0644 |
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asm-offsets.h | File | 35 B | 0644 |
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asm-prototypes.h | File | 890 B | 0644 |
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atomic.h | File | 9.47 KB | 0644 |
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barrier.h | File | 2.36 KB | 0644 |
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bitops.h | File | 10.84 KB | 0644 |
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bugs.h | File | 436 B | 0644 |
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cache.h | File | 771 B | 0644 |
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cacheflush.h | File | 1.71 KB | 0644 |
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checksum.h | File | 2.1 KB | 0644 |
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clocksource.h | File | 276 B | 0644 |
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cpu.h | File | 456 B | 0644 |
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cputime.h | File | 855 B | 0644 |
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current.h | File | 418 B | 0644 |
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cyclone.h | File | 442 B | 0644 |
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delay.h | File | 1.7 KB | 0644 |
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device.h | File | 323 B | 0644 |
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div64.h | File | 31 B | 0644 |
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dma-mapping.h | File | 1.17 KB | 0644 |
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dma.h | File | 466 B | 0644 |
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dmi.h | File | 343 B | 0644 |
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early_ioremap.h | File | 428 B | 0644 |
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elf.h | File | 9.83 KB | 0644 |
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emergency-restart.h | File | 149 B | 0644 |
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esi.h | File | 887 B | 0644 |
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exception.h | File | 1.13 KB | 0644 |
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export.h | File | 115 B | 0644 |
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extable.h | File | 330 B | 0644 |
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fb.h | File | 569 B | 0644 |
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fpswa.h | File | 1.88 KB | 0644 |
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ftrace.h | File | 748 B | 0644 |
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futex.h | File | 2.56 KB | 0644 |
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gcc_intrin.h | File | 368 B | 0644 |
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hardirq.h | File | 564 B | 0644 |
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hpsim.h | File | 364 B | 0644 |
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hugetlb.h | File | 1.67 KB | 0644 |
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hw_irq.h | File | 6.33 KB | 0644 |
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idle.h | File | 200 B | 0644 |
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intrinsics.h | File | 306 B | 0644 |
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io.h | File | 11.77 KB | 0644 |
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iommu.h | File | 555 B | 0644 |
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iommu_table.h | File | 175 B | 0644 |
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iosapic.h | File | 3.16 KB | 0644 |
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irq.h | File | 1.02 KB | 0644 |
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irq_regs.h | File | 34 B | 0644 |
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irq_remapping.h | File | 142 B | 0644 |
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irqflags.h | File | 2.11 KB | 0644 |
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kdebug.h | File | 1.64 KB | 0644 |
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kexec.h | File | 1.57 KB | 0644 |
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kmap_types.h | File | 260 B | 0644 |
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kprobes.h | File | 3.82 KB | 0644 |
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kregs.h | File | 6.73 KB | 0644 |
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libata-portmap.h | File | 225 B | 0644 |
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linkage.h | File | 398 B | 0644 |
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local.h | File | 31 B | 0644 |
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local64.h | File | 33 B | 0644 |
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machvec.h | File | 12.1 KB | 0644 |
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machvec_dig.h | File | 449 B | 0644 |
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machvec_dig_vtd.h | File | 558 B | 0644 |
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machvec_hpsim.h | File | 544 B | 0644 |
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machvec_hpzx1.h | File | 544 B | 0644 |
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machvec_hpzx1_swiotlb.h | File | 632 B | 0644 |
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machvec_init.h | File | 1.33 KB | 0644 |
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machvec_sn2.h | File | 4.71 KB | 0644 |
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machvec_uv.h | File | 684 B | 0644 |
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mca.h | File | 5.91 KB | 0644 |
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mca_asm.h | File | 7.18 KB | 0644 |
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meminit.h | File | 2.24 KB | 0644 |
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mman.h | File | 432 B | 0644 |
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mmu.h | File | 374 B | 0644 |
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mmu_context.h | File | 5.29 KB | 0644 |
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mmzone.h | File | 1.1 KB | 0644 |
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module.h | File | 1.1 KB | 0644 |
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msidef.h | File | 1.4 KB | 0644 |
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numa.h | File | 2.18 KB | 0644 |
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page.h | File | 6.49 KB | 0644 |
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pal.h | File | 53.39 KB | 0644 |
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param.h | File | 439 B | 0644 |
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parport.h | File | 534 B | 0644 |
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patch.h | File | 1.19 KB | 0644 |
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pci.h | File | 2.83 KB | 0644 |
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percpu.h | File | 1.32 KB | 0644 |
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perfmon.h | File | 4.33 KB | 0644 |
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pgalloc.h | File | 2.84 KB | 0644 |
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pgtable.h | File | 20.92 KB | 0644 |
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processor.h | File | 17.98 KB | 0644 |
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ptrace.h | File | 5.2 KB | 0644 |
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rwsem.h | File | 3.82 KB | 0644 |
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sal.h | File | 26.51 KB | 0644 |
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sections.h | File | 1.35 KB | 0644 |
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segment.h | File | 162 B | 0644 |
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serial.h | File | 446 B | 0644 |
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shmparam.h | File | 445 B | 0644 |
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signal.h | File | 749 B | 0644 |
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smp.h | File | 3.21 KB | 0644 |
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sparsemem.h | File | 621 B | 0644 |
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spinlock.h | File | 6.92 KB | 0644 |
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spinlock_types.h | File | 475 B | 0644 |
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string.h | File | 659 B | 0644 |
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swiotlb.h | File | 344 B | 0644 |
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switch_to.h | File | 2.89 KB | 0644 |
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syscall.h | File | 2.06 KB | 0644 |
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termios.h | File | 1.88 KB | 0644 |
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thread_info.h | File | 4.66 KB | 0644 |
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timex.h | File | 1.47 KB | 0644 |
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tlb.h | File | 8.42 KB | 0644 |
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tlbflush.h | File | 2.33 KB | 0644 |
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topology.h | File | 1.58 KB | 0644 |
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types.h | File | 828 B | 0644 |
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uaccess.h | File | 9.86 KB | 0644 |
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unaligned.h | File | 337 B | 0644 |
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uncached.h | File | 463 B | 0644 |
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unistd.h | File | 1.45 KB | 0644 |
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unwind.h | File | 5.74 KB | 0644 |
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user.h | File | 2.25 KB | 0644 |
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ustack.h | File | 403 B | 0644 |
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vga.h | File | 657 B | 0644 |
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xor.h | File | 1.12 KB | 0644 |
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