/* SPDX-License-Identifier: GPL-2.0 */ #ifndef _ASM_IA64_SPINLOCK_H #define _ASM_IA64_SPINLOCK_H /* * Copyright (C) 1998-2003 Hewlett-Packard Co * David Mosberger-Tang <davidm@hpl.hp.com> * Copyright (C) 1999 Walt Drummond <drummond@valinux.com> * * This file is used for SMP configurations only. */ #include <linux/compiler.h> #include <linux/kernel.h> #include <linux/bitops.h> #include <linux/atomic.h> #include <asm/intrinsics.h> #include <asm/barrier.h> #include <asm/processor.h> #define arch_spin_lock_init(x) ((x)->lock = 0) /* * Ticket locks are conceptually two parts, one indicating the current head of * the queue, and the other indicating the current tail. The lock is acquired * by atomically noting the tail and incrementing it by one (thus adding * ourself to the queue and noting our position), then waiting until the head * becomes equal to the the initial value of the tail. * The pad bits in the middle are used to prevent the next_ticket number * overflowing into the now_serving number. * * 31 17 16 15 14 0 * +----------------------------------------------------+ * | now_serving | padding | next_ticket | * +----------------------------------------------------+ */ #define TICKET_SHIFT 17 #define TICKET_BITS 15 #define TICKET_MASK ((1 << TICKET_BITS) - 1) static __always_inline void __ticket_spin_lock(arch_spinlock_t *lock) { int *p = (int *)&lock->lock, ticket, serve; ticket = ia64_fetchadd(1, p, acq); if (!(((ticket >> TICKET_SHIFT) ^ ticket) & TICKET_MASK)) return; ia64_invala(); for (;;) { asm volatile ("ld4.c.nc %0=[%1]" : "=r"(serve) : "r"(p) : "memory"); if (!(((serve >> TICKET_SHIFT) ^ ticket) & TICKET_MASK)) return; cpu_relax(); } } static __always_inline int __ticket_spin_trylock(arch_spinlock_t *lock) { int tmp = READ_ONCE(lock->lock); if (!(((tmp >> TICKET_SHIFT) ^ tmp) & TICKET_MASK)) return ia64_cmpxchg(acq, &lock->lock, tmp, tmp + 1, sizeof (tmp)) == tmp; return 0; } static __always_inline void __ticket_spin_unlock(arch_spinlock_t *lock) { unsigned short *p = (unsigned short *)&lock->lock + 1, tmp; asm volatile ("ld2.bias %0=[%1]" : "=r"(tmp) : "r"(p)); WRITE_ONCE(*p, (tmp + 2) & ~1); } static inline int __ticket_spin_is_locked(arch_spinlock_t *lock) { long tmp = READ_ONCE(lock->lock); return !!(((tmp >> TICKET_SHIFT) ^ tmp) & TICKET_MASK); } static inline int __ticket_spin_is_contended(arch_spinlock_t *lock) { long tmp = READ_ONCE(lock->lock); return ((tmp - (tmp >> TICKET_SHIFT)) & TICKET_MASK) > 1; } static __always_inline int arch_spin_value_unlocked(arch_spinlock_t lock) { return !(((lock.lock >> TICKET_SHIFT) ^ lock.lock) & TICKET_MASK); } static inline int arch_spin_is_locked(arch_spinlock_t *lock) { return __ticket_spin_is_locked(lock); } static inline int arch_spin_is_contended(arch_spinlock_t *lock) { return __ticket_spin_is_contended(lock); } #define arch_spin_is_contended arch_spin_is_contended static __always_inline void arch_spin_lock(arch_spinlock_t *lock) { __ticket_spin_lock(lock); } static __always_inline int arch_spin_trylock(arch_spinlock_t *lock) { return __ticket_spin_trylock(lock); } static __always_inline void arch_spin_unlock(arch_spinlock_t *lock) { __ticket_spin_unlock(lock); } static __always_inline void arch_spin_lock_flags(arch_spinlock_t *lock, unsigned long flags) { arch_spin_lock(lock); } #define arch_spin_lock_flags arch_spin_lock_flags #ifdef ASM_SUPPORTED static __always_inline void arch_read_lock_flags(arch_rwlock_t *lock, unsigned long flags) { __asm__ __volatile__ ( "tbit.nz p6, p0 = %1,%2\n" "br.few 3f\n" "1:\n" "fetchadd4.rel r2 = [%0], -1;;\n" "(p6) ssm psr.i\n" "2:\n" "hint @pause\n" "ld4 r2 = [%0];;\n" "cmp4.lt p7,p0 = r2, r0\n" "(p7) br.cond.spnt.few 2b\n" "(p6) rsm psr.i\n" ";;\n" "3:\n" "fetchadd4.acq r2 = [%0], 1;;\n" "cmp4.lt p7,p0 = r2, r0\n" "(p7) br.cond.spnt.few 1b\n" : : "r"(lock), "r"(flags), "i"(IA64_PSR_I_BIT) : "p6", "p7", "r2", "memory"); } #define arch_read_lock_flags arch_read_lock_flags #define arch_read_lock(lock) arch_read_lock_flags(lock, 0) #else /* !ASM_SUPPORTED */ #define arch_read_lock_flags(rw, flags) arch_read_lock(rw) #define arch_read_lock(rw) \ do { \ arch_rwlock_t *__read_lock_ptr = (rw); \ \ while (unlikely(ia64_fetchadd(1, (int *) __read_lock_ptr, acq) < 0)) { \ ia64_fetchadd(-1, (int *) __read_lock_ptr, rel); \ while (*(volatile int *)__read_lock_ptr < 0) \ cpu_relax(); \ } \ } while (0) #endif /* !ASM_SUPPORTED */ #define arch_read_unlock(rw) \ do { \ arch_rwlock_t *__read_lock_ptr = (rw); \ ia64_fetchadd(-1, (int *) __read_lock_ptr, rel); \ } while (0) #ifdef ASM_SUPPORTED static __always_inline void arch_write_lock_flags(arch_rwlock_t *lock, unsigned long flags) { __asm__ __volatile__ ( "tbit.nz p6, p0 = %1, %2\n" "mov ar.ccv = r0\n" "dep r29 = -1, r0, 31, 1\n" "br.few 3f;;\n" "1:\n" "(p6) ssm psr.i\n" "2:\n" "hint @pause\n" "ld4 r2 = [%0];;\n" "cmp4.eq p0,p7 = r0, r2\n" "(p7) br.cond.spnt.few 2b\n" "(p6) rsm psr.i\n" ";;\n" "3:\n" "cmpxchg4.acq r2 = [%0], r29, ar.ccv;;\n" "cmp4.eq p0,p7 = r0, r2\n" "(p7) br.cond.spnt.few 1b;;\n" : : "r"(lock), "r"(flags), "i"(IA64_PSR_I_BIT) : "ar.ccv", "p6", "p7", "r2", "r29", "memory"); } #define arch_write_lock_flags arch_write_lock_flags #define arch_write_lock(rw) arch_write_lock_flags(rw, 0) #define arch_write_trylock(rw) \ ({ \ register long result; \ \ __asm__ __volatile__ ( \ "mov ar.ccv = r0\n" \ "dep r29 = -1, r0, 31, 1;;\n" \ "cmpxchg4.acq %0 = [%1], r29, ar.ccv\n" \ : "=r"(result) : "r"(rw) : "ar.ccv", "r29", "memory"); \ (result == 0); \ }) static inline void arch_write_unlock(arch_rwlock_t *x) { u8 *y = (u8 *)x; barrier(); asm volatile ("st1.rel.nta [%0] = r0\n\t" :: "r"(y+3) : "memory" ); } #else /* !ASM_SUPPORTED */ #define arch_write_lock(l) \ ({ \ __u64 ia64_val, ia64_set_val = ia64_dep_mi(-1, 0, 31, 1); \ __u32 *ia64_write_lock_ptr = (__u32 *) (l); \ do { \ while (*ia64_write_lock_ptr) \ ia64_barrier(); \ ia64_val = ia64_cmpxchg4_acq(ia64_write_lock_ptr, ia64_set_val, 0); \ } while (ia64_val); \ }) #define arch_write_trylock(rw) \ ({ \ __u64 ia64_val; \ __u64 ia64_set_val = ia64_dep_mi(-1, 0, 31,1); \ ia64_val = ia64_cmpxchg4_acq((__u32 *)(rw), ia64_set_val, 0); \ (ia64_val == 0); \ }) static inline void arch_write_unlock(arch_rwlock_t *x) { barrier(); x->write_lock = 0; } #endif /* !ASM_SUPPORTED */ static inline int arch_read_trylock(arch_rwlock_t *x) { union { arch_rwlock_t lock; __u32 word; } old, new; old.lock = new.lock = *x; old.lock.write_lock = new.lock.write_lock = 0; ++new.lock.read_counter; return (u32)ia64_cmpxchg4_acq((__u32 *)(x), new.word, old.word) == old.word; } #endif /* _ASM_IA64_SPINLOCK_H */
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native | Folder | 0755 |
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sn | Folder | 0755 |
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uv | Folder | 0755 |
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Kbuild | File | 224 B | 0644 |
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acenv.h | File | 1.27 KB | 0644 |
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acpi-ext.h | File | 590 B | 0644 |
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acpi.h | File | 4.1 KB | 0644 |
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agp.h | File | 857 B | 0644 |
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asm-offsets.h | File | 35 B | 0644 |
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asm-prototypes.h | File | 890 B | 0644 |
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asmmacro.h | File | 3.29 KB | 0644 |
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atomic.h | File | 9.47 KB | 0644 |
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barrier.h | File | 2.36 KB | 0644 |
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bitops.h | File | 10.84 KB | 0644 |
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bug.h | File | 404 B | 0644 |
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bugs.h | File | 436 B | 0644 |
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cache.h | File | 771 B | 0644 |
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cacheflush.h | File | 1.71 KB | 0644 |
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checksum.h | File | 2.1 KB | 0644 |
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clocksource.h | File | 276 B | 0644 |
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cpu.h | File | 456 B | 0644 |
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cputime.h | File | 855 B | 0644 |
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current.h | File | 418 B | 0644 |
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cyclone.h | File | 442 B | 0644 |
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delay.h | File | 1.7 KB | 0644 |
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device.h | File | 323 B | 0644 |
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div64.h | File | 31 B | 0644 |
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dma-mapping.h | File | 1.17 KB | 0644 |
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dma.h | File | 466 B | 0644 |
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dmi.h | File | 343 B | 0644 |
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early_ioremap.h | File | 428 B | 0644 |
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elf.h | File | 9.83 KB | 0644 |
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emergency-restart.h | File | 149 B | 0644 |
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esi.h | File | 887 B | 0644 |
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exception.h | File | 1.13 KB | 0644 |
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export.h | File | 115 B | 0644 |
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extable.h | File | 330 B | 0644 |
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fb.h | File | 569 B | 0644 |
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fpswa.h | File | 1.88 KB | 0644 |
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ftrace.h | File | 748 B | 0644 |
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futex.h | File | 2.56 KB | 0644 |
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gcc_intrin.h | File | 368 B | 0644 |
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hardirq.h | File | 564 B | 0644 |
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hpsim.h | File | 364 B | 0644 |
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hugetlb.h | File | 1.67 KB | 0644 |
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hw_irq.h | File | 6.33 KB | 0644 |
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idle.h | File | 200 B | 0644 |
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intrinsics.h | File | 306 B | 0644 |
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io.h | File | 11.77 KB | 0644 |
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iommu.h | File | 555 B | 0644 |
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iommu_table.h | File | 175 B | 0644 |
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iosapic.h | File | 3.16 KB | 0644 |
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irq.h | File | 1.02 KB | 0644 |
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irq_regs.h | File | 34 B | 0644 |
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irq_remapping.h | File | 142 B | 0644 |
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irqflags.h | File | 2.11 KB | 0644 |
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kdebug.h | File | 1.64 KB | 0644 |
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kexec.h | File | 1.57 KB | 0644 |
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kmap_types.h | File | 260 B | 0644 |
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kprobes.h | File | 3.82 KB | 0644 |
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kregs.h | File | 6.73 KB | 0644 |
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libata-portmap.h | File | 225 B | 0644 |
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linkage.h | File | 398 B | 0644 |
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local.h | File | 31 B | 0644 |
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local64.h | File | 33 B | 0644 |
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machvec.h | File | 12.1 KB | 0644 |
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machvec_dig.h | File | 449 B | 0644 |
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machvec_dig_vtd.h | File | 558 B | 0644 |
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machvec_hpsim.h | File | 544 B | 0644 |
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machvec_hpzx1.h | File | 544 B | 0644 |
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machvec_hpzx1_swiotlb.h | File | 632 B | 0644 |
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machvec_init.h | File | 1.33 KB | 0644 |
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machvec_sn2.h | File | 4.71 KB | 0644 |
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machvec_uv.h | File | 684 B | 0644 |
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mca.h | File | 5.91 KB | 0644 |
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mca_asm.h | File | 7.18 KB | 0644 |
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meminit.h | File | 2.24 KB | 0644 |
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mman.h | File | 432 B | 0644 |
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mmu.h | File | 374 B | 0644 |
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mmu_context.h | File | 5.29 KB | 0644 |
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mmzone.h | File | 1.1 KB | 0644 |
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module.h | File | 1.1 KB | 0644 |
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msidef.h | File | 1.4 KB | 0644 |
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nodedata.h | File | 1.85 KB | 0644 |
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numa.h | File | 2.18 KB | 0644 |
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page.h | File | 6.49 KB | 0644 |
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pal.h | File | 53.39 KB | 0644 |
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param.h | File | 439 B | 0644 |
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parport.h | File | 534 B | 0644 |
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patch.h | File | 1.19 KB | 0644 |
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pci.h | File | 2.83 KB | 0644 |
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percpu.h | File | 1.32 KB | 0644 |
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perfmon.h | File | 4.33 KB | 0644 |
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pgalloc.h | File | 2.84 KB | 0644 |
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pgtable.h | File | 20.92 KB | 0644 |
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processor.h | File | 17.98 KB | 0644 |
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ptrace.h | File | 5.2 KB | 0644 |
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rwsem.h | File | 3.82 KB | 0644 |
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sal.h | File | 26.51 KB | 0644 |
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sections.h | File | 1.35 KB | 0644 |
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segment.h | File | 162 B | 0644 |
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serial.h | File | 446 B | 0644 |
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shmparam.h | File | 445 B | 0644 |
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signal.h | File | 749 B | 0644 |
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smp.h | File | 3.21 KB | 0644 |
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sparsemem.h | File | 621 B | 0644 |
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spinlock.h | File | 6.92 KB | 0644 |
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spinlock_types.h | File | 475 B | 0644 |
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string.h | File | 659 B | 0644 |
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swiotlb.h | File | 344 B | 0644 |
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switch_to.h | File | 2.89 KB | 0644 |
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syscall.h | File | 2.06 KB | 0644 |
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termios.h | File | 1.88 KB | 0644 |
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thread_info.h | File | 4.66 KB | 0644 |
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timex.h | File | 1.47 KB | 0644 |
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tlb.h | File | 8.42 KB | 0644 |
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tlbflush.h | File | 2.33 KB | 0644 |
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topology.h | File | 1.58 KB | 0644 |
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types.h | File | 828 B | 0644 |
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uaccess.h | File | 9.86 KB | 0644 |
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unaligned.h | File | 337 B | 0644 |
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uncached.h | File | 463 B | 0644 |
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unistd.h | File | 1.45 KB | 0644 |
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unwind.h | File | 5.74 KB | 0644 |
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user.h | File | 2.25 KB | 0644 |
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ustack.h | File | 403 B | 0644 |
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vga.h | File | 657 B | 0644 |
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xor.h | File | 1.12 KB | 0644 |
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