/* SPDX-License-Identifier: GPL-2.0 */ #ifndef _ASM_M32R_BITOPS_H #define _ASM_M32R_BITOPS_H /* * linux/include/asm-m32r/bitops.h * * Copyright 1992, Linus Torvalds. * * M32R version: * Copyright (C) 2001, 2002 Hitoshi Yamamoto * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org> */ #ifndef _LINUX_BITOPS_H #error only <linux/bitops.h> can be included directly #endif #include <linux/compiler.h> #include <linux/irqflags.h> #include <asm/assembler.h> #include <asm/byteorder.h> #include <asm/dcache_clear.h> #include <asm/types.h> #include <asm/barrier.h> /* * These have to be done with inline assembly: that way the bit-setting * is guaranteed to be atomic. All bit operations return 0 if the bit * was cleared before the operation and != 0 if it was not. * * bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1). */ /** * set_bit - Atomically set a bit in memory * @nr: the bit to set * @addr: the address to start counting from * * This function is atomic and may not be reordered. See __set_bit() * if you do not require the atomic guarantees. * Note that @nr may be almost arbitrarily large; this function is not * restricted to acting on a single-word quantity. */ static __inline__ void set_bit(int nr, volatile void * addr) { __u32 mask; volatile __u32 *a = addr; unsigned long flags; unsigned long tmp; a += (nr >> 5); mask = (1 << (nr & 0x1F)); local_irq_save(flags); __asm__ __volatile__ ( DCACHE_CLEAR("%0", "r6", "%1") M32R_LOCK" %0, @%1; \n\t" "or %0, %2; \n\t" M32R_UNLOCK" %0, @%1; \n\t" : "=&r" (tmp) : "r" (a), "r" (mask) : "memory" #ifdef CONFIG_CHIP_M32700_TS1 , "r6" #endif /* CONFIG_CHIP_M32700_TS1 */ ); local_irq_restore(flags); } /** * clear_bit - Clears a bit in memory * @nr: Bit to clear * @addr: Address to start counting from * * clear_bit() is atomic and may not be reordered. However, it does * not contain a memory barrier, so if it is used for locking purposes, * you should call smp_mb__before_atomic() and/or smp_mb__after_atomic() * in order to ensure changes are visible on other processors. */ static __inline__ void clear_bit(int nr, volatile void * addr) { __u32 mask; volatile __u32 *a = addr; unsigned long flags; unsigned long tmp; a += (nr >> 5); mask = (1 << (nr & 0x1F)); local_irq_save(flags); __asm__ __volatile__ ( DCACHE_CLEAR("%0", "r6", "%1") M32R_LOCK" %0, @%1; \n\t" "and %0, %2; \n\t" M32R_UNLOCK" %0, @%1; \n\t" : "=&r" (tmp) : "r" (a), "r" (~mask) : "memory" #ifdef CONFIG_CHIP_M32700_TS1 , "r6" #endif /* CONFIG_CHIP_M32700_TS1 */ ); local_irq_restore(flags); } /** * change_bit - Toggle a bit in memory * @nr: Bit to clear * @addr: Address to start counting from * * change_bit() is atomic and may not be reordered. * Note that @nr may be almost arbitrarily large; this function is not * restricted to acting on a single-word quantity. */ static __inline__ void change_bit(int nr, volatile void * addr) { __u32 mask; volatile __u32 *a = addr; unsigned long flags; unsigned long tmp; a += (nr >> 5); mask = (1 << (nr & 0x1F)); local_irq_save(flags); __asm__ __volatile__ ( DCACHE_CLEAR("%0", "r6", "%1") M32R_LOCK" %0, @%1; \n\t" "xor %0, %2; \n\t" M32R_UNLOCK" %0, @%1; \n\t" : "=&r" (tmp) : "r" (a), "r" (mask) : "memory" #ifdef CONFIG_CHIP_M32700_TS1 , "r6" #endif /* CONFIG_CHIP_M32700_TS1 */ ); local_irq_restore(flags); } /** * test_and_set_bit - Set a bit and return its old value * @nr: Bit to set * @addr: Address to count from * * This operation is atomic and cannot be reordered. * It also implies a memory barrier. */ static __inline__ int test_and_set_bit(int nr, volatile void * addr) { __u32 mask, oldbit; volatile __u32 *a = addr; unsigned long flags; unsigned long tmp; a += (nr >> 5); mask = (1 << (nr & 0x1F)); local_irq_save(flags); __asm__ __volatile__ ( DCACHE_CLEAR("%0", "%1", "%2") M32R_LOCK" %0, @%2; \n\t" "mv %1, %0; \n\t" "and %0, %3; \n\t" "or %1, %3; \n\t" M32R_UNLOCK" %1, @%2; \n\t" : "=&r" (oldbit), "=&r" (tmp) : "r" (a), "r" (mask) : "memory" ); local_irq_restore(flags); return (oldbit != 0); } /** * test_and_clear_bit - Clear a bit and return its old value * @nr: Bit to set * @addr: Address to count from * * This operation is atomic and cannot be reordered. * It also implies a memory barrier. */ static __inline__ int test_and_clear_bit(int nr, volatile void * addr) { __u32 mask, oldbit; volatile __u32 *a = addr; unsigned long flags; unsigned long tmp; a += (nr >> 5); mask = (1 << (nr & 0x1F)); local_irq_save(flags); __asm__ __volatile__ ( DCACHE_CLEAR("%0", "%1", "%3") M32R_LOCK" %0, @%3; \n\t" "mv %1, %0; \n\t" "and %0, %2; \n\t" "not %2, %2; \n\t" "and %1, %2; \n\t" M32R_UNLOCK" %1, @%3; \n\t" : "=&r" (oldbit), "=&r" (tmp), "+r" (mask) : "r" (a) : "memory" ); local_irq_restore(flags); return (oldbit != 0); } /** * test_and_change_bit - Change a bit and return its old value * @nr: Bit to set * @addr: Address to count from * * This operation is atomic and cannot be reordered. * It also implies a memory barrier. */ static __inline__ int test_and_change_bit(int nr, volatile void * addr) { __u32 mask, oldbit; volatile __u32 *a = addr; unsigned long flags; unsigned long tmp; a += (nr >> 5); mask = (1 << (nr & 0x1F)); local_irq_save(flags); __asm__ __volatile__ ( DCACHE_CLEAR("%0", "%1", "%2") M32R_LOCK" %0, @%2; \n\t" "mv %1, %0; \n\t" "and %0, %3; \n\t" "xor %1, %3; \n\t" M32R_UNLOCK" %1, @%2; \n\t" : "=&r" (oldbit), "=&r" (tmp) : "r" (a), "r" (mask) : "memory" ); local_irq_restore(flags); return (oldbit != 0); } #include <asm-generic/bitops/non-atomic.h> #include <asm-generic/bitops/ffz.h> #include <asm-generic/bitops/__ffs.h> #include <asm-generic/bitops/fls.h> #include <asm-generic/bitops/__fls.h> #include <asm-generic/bitops/fls64.h> #ifdef __KERNEL__ #include <asm-generic/bitops/sched.h> #include <asm-generic/bitops/find.h> #include <asm-generic/bitops/ffs.h> #include <asm-generic/bitops/hweight.h> #include <asm-generic/bitops/lock.h> #endif /* __KERNEL__ */ #ifdef __KERNEL__ #include <asm-generic/bitops/le.h> #include <asm-generic/bitops/ext2-atomic.h> #endif /* __KERNEL__ */ #endif /* _ASM_M32R_BITOPS_H */
Name | Type | Size | Permission | Actions |
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m32104ut | Folder | 0755 |
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m32700ut | Folder | 0755 |
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mappi2 | Folder | 0755 |
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mappi3 | Folder | 0755 |
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opsput | Folder | 0755 |
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Kbuild | File | 318 B | 0644 |
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addrspace.h | File | 1.67 KB | 0644 |
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asm-offsets.h | File | 35 B | 0644 |
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assembler.h | File | 4.2 KB | 0644 |
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atomic.h | File | 6.29 KB | 0644 |
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barrier.h | File | 506 B | 0644 |
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bitops.h | File | 6.23 KB | 0644 |
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bug.h | File | 115 B | 0644 |
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bugs.h | File | 410 B | 0644 |
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cache.h | File | 222 B | 0644 |
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cachectl.h | File | 739 B | 0644 |
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cacheflush.h | File | 3.2 KB | 0644 |
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checksum.h | File | 4.83 KB | 0644 |
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cmpxchg.h | File | 4.86 KB | 0644 |
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dcache_clear.h | File | 1.01 KB | 0644 |
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delay.h | File | 31 B | 0644 |
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device.h | File | 148 B | 0644 |
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div64.h | File | 31 B | 0644 |
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dma-mapping.h | File | 570 B | 0644 |
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dma.h | File | 281 B | 0644 |
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elf.h | File | 3.64 KB | 0644 |
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emergency-restart.h | File | 188 B | 0644 |
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fb.h | File | 414 B | 0644 |
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flat.h | File | 4.2 KB | 0644 |
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ftrace.h | File | 12 B | 0644 |
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futex.h | File | 82 B | 0644 |
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hardirq.h | File | 214 B | 0644 |
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hw_irq.h | File | 87 B | 0644 |
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io.h | File | 6.44 KB | 0644 |
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irq.h | File | 2.94 KB | 0644 |
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irq_regs.h | File | 34 B | 0644 |
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irqflags.h | File | 2.24 KB | 0644 |
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kdebug.h | File | 32 B | 0644 |
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kmap_types.h | File | 251 B | 0644 |
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linkage.h | File | 177 B | 0644 |
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local.h | File | 7.8 KB | 0644 |
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local64.h | File | 33 B | 0644 |
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m32102.h | File | 14.71 KB | 0644 |
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m32r.h | File | 5.7 KB | 0644 |
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m32r_mp_fpga.h | File | 14.89 KB | 0644 |
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mc146818rtc.h | File | 671 B | 0644 |
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mmu.h | File | 403 B | 0644 |
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mmu_context.h | File | 4.23 KB | 0644 |
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mmzone.h | File | 1.29 KB | 0644 |
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page.h | File | 2.62 KB | 0644 |
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pci.h | File | 147 B | 0644 |
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percpu.h | File | 165 B | 0644 |
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pgalloc.h | File | 1.84 KB | 0644 |
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pgtable-2level.h | File | 2.31 KB | 0644 |
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pgtable.h | File | 9.7 KB | 0644 |
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processor.h | File | 2.93 KB | 0644 |
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ptrace.h | File | 1.3 KB | 0644 |
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rtc.h | File | 1.99 KB | 0644 |
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s1d13806.h | File | 9.84 KB | 0644 |
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segment.h | File | 228 B | 0644 |
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serial.h | File | 187 B | 0644 |
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setup.h | File | 1022 B | 0644 |
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shmparam.h | File | 197 B | 0644 |
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signal.h | File | 561 B | 0644 |
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smp.h | File | 3.5 KB | 0644 |
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spinlock.h | File | 7.15 KB | 0644 |
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spinlock_types.h | File | 520 B | 0644 |
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string.h | File | 378 B | 0644 |
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switch_to.h | File | 1.48 KB | 0644 |
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syscall.h | File | 252 B | 0644 |
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termios.h | File | 1.74 KB | 0644 |
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thread_info.h | File | 3.71 KB | 0644 |
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timex.h | File | 581 B | 0644 |
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tlb.h | File | 483 B | 0644 |
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tlbflush.h | File | 2.94 KB | 0644 |
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topology.h | File | 167 B | 0644 |
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types.h | File | 258 B | 0644 |
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uaccess.h | File | 15.3 KB | 0644 |
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ucontext.h | File | 321 B | 0644 |
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unaligned.h | File | 592 B | 0644 |
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unistd.h | File | 1.23 KB | 0644 |
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user.h | File | 2.1 KB | 0644 |
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vga.h | File | 436 B | 0644 |
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xor.h | File | 148 B | 0644 |
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