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/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_M32R_SMP_H
#define _ASM_M32R_SMP_H

#ifdef CONFIG_SMP
#ifndef __ASSEMBLY__

#include <linux/cpumask.h>
#include <linux/spinlock.h>
#include <linux/threads.h>
#include <asm/m32r.h>

#define PHYSID_ARRAY_SIZE       1

struct physid_mask
{
	unsigned long mask[PHYSID_ARRAY_SIZE];
};

typedef struct physid_mask physid_mask_t;

#define physid_set(physid, map)                 set_bit(physid, (map).mask)
#define physid_clear(physid, map)               clear_bit(physid, (map).mask)
#define physid_isset(physid, map)               test_bit(physid, (map).mask)
#define physid_test_and_set(physid, map)        test_and_set_bit(physid, (map).mask)

#define physids_and(dst, src1, src2)            bitmap_and((dst).mask, (src1).mask, (src2).mask, MAX_APICS)
#define physids_or(dst, src1, src2)             bitmap_or((dst).mask, (src1).mask, (src2).mask, MAX_APICS)
#define physids_clear(map)                      bitmap_zero((map).mask, MAX_APICS)
#define physids_complement(dst, src)            bitmap_complement((dst).mask,(src).mask, MAX_APICS)
#define physids_empty(map)                      bitmap_empty((map).mask, MAX_APICS)
#define physids_equal(map1, map2)               bitmap_equal((map1).mask, (map2).mask, MAX_APICS)
#define physids_weight(map)                     bitmap_weight((map).mask, MAX_APICS)
#define physids_shift_right(d, s, n)            bitmap_shift_right((d).mask, (s).mask, n, MAX_APICS)
#define physids_shift_left(d, s, n)             bitmap_shift_left((d).mask, (s).mask, n, MAX_APICS)
#define physids_coerce(map)                     ((map).mask[0])

#define physids_promote(physids)					\
	({								\
		physid_mask_t __physid_mask = PHYSID_MASK_NONE;		\
		__physid_mask.mask[0] = physids;			\
		__physid_mask;						\
	})

#define physid_mask_of_physid(physid)					\
	({								\
		physid_mask_t __physid_mask = PHYSID_MASK_NONE;		\
		physid_set(physid, __physid_mask);			\
		__physid_mask;						\
	})

#define PHYSID_MASK_ALL         { {[0 ... PHYSID_ARRAY_SIZE-1] = ~0UL} }
#define PHYSID_MASK_NONE        { {[0 ... PHYSID_ARRAY_SIZE-1] = 0UL} }

extern physid_mask_t phys_cpu_present_map;

/*
 * Some lowlevel functions might want to know about
 * the real CPU ID <-> CPU # mapping.
 */
extern volatile int cpu_2_physid[NR_CPUS];
#define cpu_to_physid(cpu_id)	cpu_2_physid[cpu_id]

#define raw_smp_processor_id()	(current_thread_info()->cpu)

extern cpumask_t cpu_callout_map;

static __inline__ int hard_smp_processor_id(void)
{
	return (int)*(volatile long *)M32R_CPUID_PORTL;
}

static __inline__ int cpu_logical_map(int cpu)
{
	return cpu;
}

static __inline__ int cpu_number_map(int cpu)
{
	return cpu;
}

extern void smp_send_timer(void);
extern unsigned long send_IPI_mask_phys(const cpumask_t*, int, int);

extern void arch_send_call_function_single_ipi(int cpu);
extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);

#endif	/* not __ASSEMBLY__ */

#define NO_PROC_ID (0xff)	/* No processor magic marker */

/*
 * M32R-mp IPI
 */
#define RESCHEDULE_IPI		(M32R_IRQ_IPI0-M32R_IRQ_IPI0)
#define INVALIDATE_TLB_IPI	(M32R_IRQ_IPI1-M32R_IRQ_IPI0)
#define CALL_FUNCTION_IPI	(M32R_IRQ_IPI2-M32R_IRQ_IPI0)
#define LOCAL_TIMER_IPI		(M32R_IRQ_IPI3-M32R_IRQ_IPI0)
#define INVALIDATE_CACHE_IPI	(M32R_IRQ_IPI4-M32R_IRQ_IPI0)
#define CPU_BOOT_IPI		(M32R_IRQ_IPI5-M32R_IRQ_IPI0)
#define CALL_FUNC_SINGLE_IPI	(M32R_IRQ_IPI6-M32R_IRQ_IPI0)

#define IPI_SHIFT	(0)
#define NR_IPIS		(8)

#else	/* CONFIG_SMP */

#define hard_smp_processor_id()		0

#endif /* CONFIG_SMP */

#endif	/* _ASM_M32R_SMP_H */

Filemanager

Name Type Size Permission Actions
m32104ut Folder 0755
m32700ut Folder 0755
mappi2 Folder 0755
mappi3 Folder 0755
opsput Folder 0755
Kbuild File 318 B 0644
addrspace.h File 1.67 KB 0644
asm-offsets.h File 35 B 0644
assembler.h File 4.2 KB 0644
atomic.h File 6.29 KB 0644
barrier.h File 506 B 0644
bitops.h File 6.23 KB 0644
bug.h File 115 B 0644
bugs.h File 410 B 0644
cache.h File 222 B 0644
cachectl.h File 739 B 0644
cacheflush.h File 3.2 KB 0644
checksum.h File 4.83 KB 0644
cmpxchg.h File 4.86 KB 0644
dcache_clear.h File 1.01 KB 0644
delay.h File 31 B 0644
device.h File 148 B 0644
div64.h File 31 B 0644
dma-mapping.h File 570 B 0644
dma.h File 281 B 0644
elf.h File 3.64 KB 0644
emergency-restart.h File 188 B 0644
fb.h File 414 B 0644
flat.h File 4.2 KB 0644
ftrace.h File 12 B 0644
futex.h File 82 B 0644
hardirq.h File 214 B 0644
hw_irq.h File 87 B 0644
io.h File 6.44 KB 0644
irq.h File 2.94 KB 0644
irq_regs.h File 34 B 0644
irqflags.h File 2.24 KB 0644
kdebug.h File 32 B 0644
kmap_types.h File 251 B 0644
linkage.h File 177 B 0644
local.h File 7.8 KB 0644
local64.h File 33 B 0644
m32102.h File 14.71 KB 0644
m32r.h File 5.7 KB 0644
m32r_mp_fpga.h File 14.89 KB 0644
mc146818rtc.h File 671 B 0644
mmu.h File 403 B 0644
mmu_context.h File 4.23 KB 0644
mmzone.h File 1.29 KB 0644
page.h File 2.62 KB 0644
pci.h File 147 B 0644
percpu.h File 165 B 0644
pgalloc.h File 1.84 KB 0644
pgtable-2level.h File 2.31 KB 0644
pgtable.h File 9.7 KB 0644
processor.h File 2.93 KB 0644
ptrace.h File 1.3 KB 0644
rtc.h File 1.99 KB 0644
s1d13806.h File 9.84 KB 0644
segment.h File 228 B 0644
serial.h File 187 B 0644
setup.h File 1022 B 0644
shmparam.h File 197 B 0644
signal.h File 561 B 0644
smp.h File 3.5 KB 0644
spinlock.h File 7.15 KB 0644
spinlock_types.h File 520 B 0644
string.h File 378 B 0644
switch_to.h File 1.48 KB 0644
syscall.h File 252 B 0644
termios.h File 1.74 KB 0644
thread_info.h File 3.71 KB 0644
timex.h File 581 B 0644
tlb.h File 483 B 0644
tlbflush.h File 2.94 KB 0644
topology.h File 167 B 0644
types.h File 258 B 0644
uaccess.h File 15.3 KB 0644
ucontext.h File 321 B 0644
unaligned.h File 592 B 0644
unistd.h File 1.23 KB 0644
user.h File 2.1 KB 0644
vga.h File 436 B 0644
xor.h File 148 B 0644