#ifndef _M68K_BITOPS_H #define _M68K_BITOPS_H /* * Copyright 1992, Linus Torvalds. * * This file is subject to the terms and conditions of the GNU General Public * License. See the file COPYING in the main directory of this archive * for more details. */ #ifndef _LINUX_BITOPS_H #error only <linux/bitops.h> can be included directly #endif #include <linux/compiler.h> #include <asm/barrier.h> /* * Bit access functions vary across the ColdFire and 68k families. * So we will break them out here, and then macro in the ones we want. * * ColdFire - supports standard bset/bclr/bchg with register operand only * 68000 - supports standard bset/bclr/bchg with memory operand * >= 68020 - also supports the bfset/bfclr/bfchg instructions * * Although it is possible to use only the bset/bclr/bchg with register * operands on all platforms you end up with larger generated code. * So we use the best form possible on a given platform. */ static inline void bset_reg_set_bit(int nr, volatile unsigned long *vaddr) { char *p = (char *)vaddr + (nr ^ 31) / 8; __asm__ __volatile__ ("bset %1,(%0)" : : "a" (p), "di" (nr & 7) : "memory"); } static inline void bset_mem_set_bit(int nr, volatile unsigned long *vaddr) { char *p = (char *)vaddr + (nr ^ 31) / 8; __asm__ __volatile__ ("bset %1,%0" : "+m" (*p) : "di" (nr & 7)); } static inline void bfset_mem_set_bit(int nr, volatile unsigned long *vaddr) { __asm__ __volatile__ ("bfset %1{%0:#1}" : : "d" (nr ^ 31), "o" (*vaddr) : "memory"); } #if defined(CONFIG_COLDFIRE) #define set_bit(nr, vaddr) bset_reg_set_bit(nr, vaddr) #elif defined(CONFIG_CPU_HAS_NO_BITFIELDS) #define set_bit(nr, vaddr) bset_mem_set_bit(nr, vaddr) #else #define set_bit(nr, vaddr) (__builtin_constant_p(nr) ? \ bset_mem_set_bit(nr, vaddr) : \ bfset_mem_set_bit(nr, vaddr)) #endif #define __set_bit(nr, vaddr) set_bit(nr, vaddr) static inline void bclr_reg_clear_bit(int nr, volatile unsigned long *vaddr) { char *p = (char *)vaddr + (nr ^ 31) / 8; __asm__ __volatile__ ("bclr %1,(%0)" : : "a" (p), "di" (nr & 7) : "memory"); } static inline void bclr_mem_clear_bit(int nr, volatile unsigned long *vaddr) { char *p = (char *)vaddr + (nr ^ 31) / 8; __asm__ __volatile__ ("bclr %1,%0" : "+m" (*p) : "di" (nr & 7)); } static inline void bfclr_mem_clear_bit(int nr, volatile unsigned long *vaddr) { __asm__ __volatile__ ("bfclr %1{%0:#1}" : : "d" (nr ^ 31), "o" (*vaddr) : "memory"); } #if defined(CONFIG_COLDFIRE) #define clear_bit(nr, vaddr) bclr_reg_clear_bit(nr, vaddr) #elif defined(CONFIG_CPU_HAS_NO_BITFIELDS) #define clear_bit(nr, vaddr) bclr_mem_clear_bit(nr, vaddr) #else #define clear_bit(nr, vaddr) (__builtin_constant_p(nr) ? \ bclr_mem_clear_bit(nr, vaddr) : \ bfclr_mem_clear_bit(nr, vaddr)) #endif #define __clear_bit(nr, vaddr) clear_bit(nr, vaddr) static inline void bchg_reg_change_bit(int nr, volatile unsigned long *vaddr) { char *p = (char *)vaddr + (nr ^ 31) / 8; __asm__ __volatile__ ("bchg %1,(%0)" : : "a" (p), "di" (nr & 7) : "memory"); } static inline void bchg_mem_change_bit(int nr, volatile unsigned long *vaddr) { char *p = (char *)vaddr + (nr ^ 31) / 8; __asm__ __volatile__ ("bchg %1,%0" : "+m" (*p) : "di" (nr & 7)); } static inline void bfchg_mem_change_bit(int nr, volatile unsigned long *vaddr) { __asm__ __volatile__ ("bfchg %1{%0:#1}" : : "d" (nr ^ 31), "o" (*vaddr) : "memory"); } #if defined(CONFIG_COLDFIRE) #define change_bit(nr, vaddr) bchg_reg_change_bit(nr, vaddr) #elif defined(CONFIG_CPU_HAS_NO_BITFIELDS) #define change_bit(nr, vaddr) bchg_mem_change_bit(nr, vaddr) #else #define change_bit(nr, vaddr) (__builtin_constant_p(nr) ? \ bchg_mem_change_bit(nr, vaddr) : \ bfchg_mem_change_bit(nr, vaddr)) #endif #define __change_bit(nr, vaddr) change_bit(nr, vaddr) static inline int test_bit(int nr, const volatile unsigned long *vaddr) { return (vaddr[nr >> 5] & (1UL << (nr & 31))) != 0; } static inline int bset_reg_test_and_set_bit(int nr, volatile unsigned long *vaddr) { char *p = (char *)vaddr + (nr ^ 31) / 8; char retval; __asm__ __volatile__ ("bset %2,(%1); sne %0" : "=d" (retval) : "a" (p), "di" (nr & 7) : "memory"); return retval; } static inline int bset_mem_test_and_set_bit(int nr, volatile unsigned long *vaddr) { char *p = (char *)vaddr + (nr ^ 31) / 8; char retval; __asm__ __volatile__ ("bset %2,%1; sne %0" : "=d" (retval), "+m" (*p) : "di" (nr & 7)); return retval; } static inline int bfset_mem_test_and_set_bit(int nr, volatile unsigned long *vaddr) { char retval; __asm__ __volatile__ ("bfset %2{%1:#1}; sne %0" : "=d" (retval) : "d" (nr ^ 31), "o" (*vaddr) : "memory"); return retval; } #if defined(CONFIG_COLDFIRE) #define test_and_set_bit(nr, vaddr) bset_reg_test_and_set_bit(nr, vaddr) #elif defined(CONFIG_CPU_HAS_NO_BITFIELDS) #define test_and_set_bit(nr, vaddr) bset_mem_test_and_set_bit(nr, vaddr) #else #define test_and_set_bit(nr, vaddr) (__builtin_constant_p(nr) ? \ bset_mem_test_and_set_bit(nr, vaddr) : \ bfset_mem_test_and_set_bit(nr, vaddr)) #endif #define __test_and_set_bit(nr, vaddr) test_and_set_bit(nr, vaddr) static inline int bclr_reg_test_and_clear_bit(int nr, volatile unsigned long *vaddr) { char *p = (char *)vaddr + (nr ^ 31) / 8; char retval; __asm__ __volatile__ ("bclr %2,(%1); sne %0" : "=d" (retval) : "a" (p), "di" (nr & 7) : "memory"); return retval; } static inline int bclr_mem_test_and_clear_bit(int nr, volatile unsigned long *vaddr) { char *p = (char *)vaddr + (nr ^ 31) / 8; char retval; __asm__ __volatile__ ("bclr %2,%1; sne %0" : "=d" (retval), "+m" (*p) : "di" (nr & 7)); return retval; } static inline int bfclr_mem_test_and_clear_bit(int nr, volatile unsigned long *vaddr) { char retval; __asm__ __volatile__ ("bfclr %2{%1:#1}; sne %0" : "=d" (retval) : "d" (nr ^ 31), "o" (*vaddr) : "memory"); return retval; } #if defined(CONFIG_COLDFIRE) #define test_and_clear_bit(nr, vaddr) bclr_reg_test_and_clear_bit(nr, vaddr) #elif defined(CONFIG_CPU_HAS_NO_BITFIELDS) #define test_and_clear_bit(nr, vaddr) bclr_mem_test_and_clear_bit(nr, vaddr) #else #define test_and_clear_bit(nr, vaddr) (__builtin_constant_p(nr) ? \ bclr_mem_test_and_clear_bit(nr, vaddr) : \ bfclr_mem_test_and_clear_bit(nr, vaddr)) #endif #define __test_and_clear_bit(nr, vaddr) test_and_clear_bit(nr, vaddr) static inline int bchg_reg_test_and_change_bit(int nr, volatile unsigned long *vaddr) { char *p = (char *)vaddr + (nr ^ 31) / 8; char retval; __asm__ __volatile__ ("bchg %2,(%1); sne %0" : "=d" (retval) : "a" (p), "di" (nr & 7) : "memory"); return retval; } static inline int bchg_mem_test_and_change_bit(int nr, volatile unsigned long *vaddr) { char *p = (char *)vaddr + (nr ^ 31) / 8; char retval; __asm__ __volatile__ ("bchg %2,%1; sne %0" : "=d" (retval), "+m" (*p) : "di" (nr & 7)); return retval; } static inline int bfchg_mem_test_and_change_bit(int nr, volatile unsigned long *vaddr) { char retval; __asm__ __volatile__ ("bfchg %2{%1:#1}; sne %0" : "=d" (retval) : "d" (nr ^ 31), "o" (*vaddr) : "memory"); return retval; } #if defined(CONFIG_COLDFIRE) #define test_and_change_bit(nr, vaddr) bchg_reg_test_and_change_bit(nr, vaddr) #elif defined(CONFIG_CPU_HAS_NO_BITFIELDS) #define test_and_change_bit(nr, vaddr) bchg_mem_test_and_change_bit(nr, vaddr) #else #define test_and_change_bit(nr, vaddr) (__builtin_constant_p(nr) ? \ bchg_mem_test_and_change_bit(nr, vaddr) : \ bfchg_mem_test_and_change_bit(nr, vaddr)) #endif #define __test_and_change_bit(nr, vaddr) test_and_change_bit(nr, vaddr) /* * The true 68020 and more advanced processors support the "bfffo" * instruction for finding bits. ColdFire and simple 68000 parts * (including CPU32) do not support this. They simply use the generic * functions. */ #if defined(CONFIG_CPU_HAS_NO_BITFIELDS) #include <asm-generic/bitops/find.h> #include <asm-generic/bitops/ffz.h> #else static inline int find_first_zero_bit(const unsigned long *vaddr, unsigned size) { const unsigned long *p = vaddr; int res = 32; unsigned int words; unsigned long num; if (!size) return 0; words = (size + 31) >> 5; while (!(num = ~*p++)) { if (!--words) goto out; } __asm__ __volatile__ ("bfffo %1{#0,#0},%0" : "=d" (res) : "d" (num & -num)); res ^= 31; out: res += ((long)p - (long)vaddr - 4) * 8; return res < size ? res : size; } #define find_first_zero_bit find_first_zero_bit static inline int find_next_zero_bit(const unsigned long *vaddr, int size, int offset) { const unsigned long *p = vaddr + (offset >> 5); int bit = offset & 31UL, res; if (offset >= size) return size; if (bit) { unsigned long num = ~*p++ & (~0UL << bit); offset -= bit; /* Look for zero in first longword */ __asm__ __volatile__ ("bfffo %1{#0,#0},%0" : "=d" (res) : "d" (num & -num)); if (res < 32) { offset += res ^ 31; return offset < size ? offset : size; } offset += 32; if (offset >= size) return size; } /* No zero yet, search remaining full bytes for a zero */ return offset + find_first_zero_bit(p, size - offset); } #define find_next_zero_bit find_next_zero_bit static inline int find_first_bit(const unsigned long *vaddr, unsigned size) { const unsigned long *p = vaddr; int res = 32; unsigned int words; unsigned long num; if (!size) return 0; words = (size + 31) >> 5; while (!(num = *p++)) { if (!--words) goto out; } __asm__ __volatile__ ("bfffo %1{#0,#0},%0" : "=d" (res) : "d" (num & -num)); res ^= 31; out: res += ((long)p - (long)vaddr - 4) * 8; return res < size ? res : size; } #define find_first_bit find_first_bit static inline int find_next_bit(const unsigned long *vaddr, int size, int offset) { const unsigned long *p = vaddr + (offset >> 5); int bit = offset & 31UL, res; if (offset >= size) return size; if (bit) { unsigned long num = *p++ & (~0UL << bit); offset -= bit; /* Look for one in first longword */ __asm__ __volatile__ ("bfffo %1{#0,#0},%0" : "=d" (res) : "d" (num & -num)); if (res < 32) { offset += res ^ 31; return offset < size ? offset : size; } offset += 32; if (offset >= size) return size; } /* No one yet, search remaining full bytes for a one */ return offset + find_first_bit(p, size - offset); } #define find_next_bit find_next_bit /* * ffz = Find First Zero in word. Undefined if no zero exists, * so code should check against ~0UL first.. */ static inline unsigned long ffz(unsigned long word) { int res; __asm__ __volatile__ ("bfffo %1{#0,#0},%0" : "=d" (res) : "d" (~word & -~word)); return res ^ 31; } #endif #ifdef __KERNEL__ #if defined(CONFIG_CPU_HAS_NO_BITFIELDS) /* * The newer ColdFire family members support a "bitrev" instruction * and we can use that to implement a fast ffs. Older Coldfire parts, * and normal 68000 parts don't have anything special, so we use the * generic functions for those. */ #if (defined(__mcfisaaplus__) || defined(__mcfisac__)) && \ !defined(CONFIG_M68000) && !defined(CONFIG_MCPU32) static inline int __ffs(int x) { __asm__ __volatile__ ("bitrev %0; ff1 %0" : "=d" (x) : "0" (x)); return x; } static inline int ffs(int x) { if (!x) return 0; return __ffs(x) + 1; } #else #include <asm-generic/bitops/ffs.h> #include <asm-generic/bitops/__ffs.h> #endif #include <asm-generic/bitops/fls.h> #include <asm-generic/bitops/__fls.h> #else /* * ffs: find first bit set. This is defined the same way as * the libc and compiler builtin ffs routines, therefore * differs in spirit from the above ffz (man ffs). */ static inline int ffs(int x) { int cnt; __asm__ ("bfffo %1{#0:#0},%0" : "=d" (cnt) : "dm" (x & -x)); return 32 - cnt; } #define __ffs(x) (ffs(x) - 1) /* * fls: find last bit set. */ static inline int fls(int x) { int cnt; __asm__ ("bfffo %1{#0,#0},%0" : "=d" (cnt) : "dm" (x)); return 32 - cnt; } static inline int __fls(int x) { return fls(x) - 1; } #endif #include <asm-generic/bitops/ext2-atomic.h> #include <asm-generic/bitops/le.h> #include <asm-generic/bitops/fls64.h> #include <asm-generic/bitops/sched.h> #include <asm-generic/bitops/hweight.h> #include <asm-generic/bitops/lock.h> #endif /* __KERNEL__ */ #endif /* _M68K_BITOPS_H */
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MC68328.h | File | 37.82 KB | 0644 |
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MC68EZ328.h | File | 37.74 KB | 0644 |
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MC68VZ328.h | File | 41.02 KB | 0644 |
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a.out-core.h | File | 1.98 KB | 0644 |
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adb_iop.h | File | 1.09 KB | 0644 |
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amigahw.h | File | 10.49 KB | 0644 |
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amigaints.h | File | 3.5 KB | 0644 |
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amigayle.h | File | 3.19 KB | 0644 |
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amipcmcia.h | File | 2.51 KB | 0644 |
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apollohw.h | File | 2.35 KB | 0644 |
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asm-offsets.h | File | 35 B | 0644 |
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asm-prototypes.h | File | 211 B | 0644 |
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atafd.h | File | 300 B | 0644 |
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atafdreg.h | File | 2.68 KB | 0644 |
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atari_joystick.h | File | 457 B | 0644 |
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atari_stdma.h | File | 514 B | 0644 |
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atari_stram.h | File | 528 B | 0644 |
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atarihw.h | File | 20.3 KB | 0644 |
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atariints.h | File | 5.56 KB | 0644 |
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atarikb.h | File | 1.4 KB | 0644 |
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atomic.h | File | 4.86 KB | 0644 |
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bitops.h | File | 12.19 KB | 0644 |
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blinken.h | File | 641 B | 0644 |
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bootinfo.h | File | 783 B | 0644 |
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bootstd.h | File | 4.64 KB | 0644 |
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bug.h | File | 659 B | 0644 |
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bugs.h | File | 369 B | 0644 |
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bvme6000hw.h | File | 3.45 KB | 0644 |
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cache.h | File | 296 B | 0644 |
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cacheflush.h | File | 133 B | 0644 |
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cacheflush_mm.h | File | 6.92 KB | 0644 |
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cacheflush_no.h | File | 2.61 KB | 0644 |
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checksum.h | File | 3.4 KB | 0644 |
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cmpxchg.h | File | 3.34 KB | 0644 |
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coldfire.h | File | 1.61 KB | 0644 |
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contregs.h | File | 3.31 KB | 0644 |
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current.h | File | 580 B | 0644 |
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delay.h | File | 3.43 KB | 0644 |
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div64.h | File | 858 B | 0644 |
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dma-mapping.h | File | 291 B | 0644 |
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dma.h | File | 16.65 KB | 0644 |
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dsp56k.h | File | 1.24 KB | 0644 |
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dvma.h | File | 9.67 KB | 0644 |
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elf.h | File | 3.07 KB | 0644 |
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entry.h | File | 5.76 KB | 0644 |
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export.h | File | 74 B | 0644 |
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fb.h | File | 921 B | 0644 |
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fbio.h | File | 9.87 KB | 0644 |
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flat.h | File | 1.02 KB | 0644 |
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floppy.h | File | 5.06 KB | 0644 |
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fpu.h | File | 535 B | 0644 |
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ftrace.h | File | 12 B | 0644 |
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gpio.h | File | 2.64 KB | 0644 |
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hardirq.h | File | 594 B | 0644 |
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hash.h | File | 2.07 KB | 0644 |
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hp300hw.h | File | 186 B | 0644 |
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hwtest.h | File | 467 B | 0644 |
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ide.h | File | 1.67 KB | 0644 |
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idprom.h | File | 725 B | 0644 |
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intersil.h | File | 1.11 KB | 0644 |
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io.h | File | 383 B | 0644 |
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io_mm.h | File | 16.19 KB | 0644 |
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io_no.h | File | 5.26 KB | 0644 |
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irq.h | File | 2.57 KB | 0644 |
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irqflags.h | File | 1.61 KB | 0644 |
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kexec.h | File | 732 B | 0644 |
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linkage.h | File | 1.55 KB | 0644 |
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m5206sim.h | File | 6.4 KB | 0644 |
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m520xsim.h | File | 7.15 KB | 0644 |
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m523xsim.h | File | 7.7 KB | 0644 |
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m525xsim.h | File | 10.57 KB | 0644 |
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m5272sim.h | File | 6.05 KB | 0644 |
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m527xsim.h | File | 13.51 KB | 0644 |
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m528xsim.h | File | 9.37 KB | 0644 |
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m52xxacr.h | File | 3.57 KB | 0644 |
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m5307sim.h | File | 7.52 KB | 0644 |
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m53xxacr.h | File | 3.6 KB | 0644 |
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m53xxsim.h | File | 53.97 KB | 0644 |
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m5407sim.h | File | 6.14 KB | 0644 |
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m5441xsim.h | File | 8.5 KB | 0644 |
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m54xxacr.h | File | 4.82 KB | 0644 |
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m54xxgpt.h | File | 3.66 KB | 0644 |
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m54xxpci.h | File | 6.13 KB | 0644 |
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m54xxsim.h | File | 3.8 KB | 0644 |
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mac_asc.h | File | 520 B | 0644 |
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mac_baboon.h | File | 999 B | 0644 |
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mac_iop.h | File | 5.37 KB | 0644 |
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mac_oss.h | File | 1.83 KB | 0644 |
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mac_psc.h | File | 7.25 KB | 0644 |
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mac_via.h | File | 11.44 KB | 0644 |
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machdep.h | File | 1.34 KB | 0644 |
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machines.h | File | 3.13 KB | 0644 |
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machw.h | File | 588 B | 0644 |
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macintosh.h | File | 2.02 KB | 0644 |
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macints.h | File | 3.28 KB | 0644 |
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math-emu.h | File | 6.74 KB | 0644 |
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mc146818rtc.h | File | 598 B | 0644 |
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mcf8390.h | File | 3.75 KB | 0644 |
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mcf_pgalloc.h | File | 2.37 KB | 0644 |
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mcf_pgtable.h | File | 9.89 KB | 0644 |
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mcfclk.h | File | 1.01 KB | 0644 |
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mcfdma.h | File | 6.51 KB | 0644 |
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mcfgpio.h | File | 8.48 KB | 0644 |
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mcfintc.h | File | 3.09 KB | 0644 |
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mcfmmu.h | File | 3.67 KB | 0644 |
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mcfpit.h | File | 2.22 KB | 0644 |
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mcfqspi.h | File | 1.82 KB | 0644 |
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mcfsim.h | File | 1.5 KB | 0644 |
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mcfslt.h | File | 1.21 KB | 0644 |
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mcftimer.h | File | 2.3 KB | 0644 |
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mcfuart.h | File | 6.91 KB | 0644 |
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mcfwdebug.h | File | 4.99 KB | 0644 |
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mmu.h | File | 243 B | 0644 |
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mmu_context.h | File | 7.2 KB | 0644 |
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mmzone.h | File | 264 B | 0644 |
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module.h | File | 847 B | 0644 |
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motorola_pgalloc.h | File | 2.26 KB | 0644 |
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motorola_pgtable.h | File | 9.2 KB | 0644 |
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movs.h | File | 1.44 KB | 0644 |
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mvme147hw.h | File | 2.81 KB | 0644 |
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mvme16xhw.h | File | 2.16 KB | 0644 |
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natfeat.h | File | 533 B | 0644 |
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nettel.h | File | 2.95 KB | 0644 |
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nubus.h | File | 1.21 KB | 0644 |
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openprom.h | File | 7.98 KB | 0644 |
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oplib.h | File | 9.54 KB | 0644 |
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page.h | File | 1.47 KB | 0644 |
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page_mm.h | File | 4.06 KB | 0644 |
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page_no.h | File | 1.28 KB | 0644 |
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page_offset.h | File | 256 B | 0644 |
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parport.h | File | 837 B | 0644 |
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pci.h | File | 458 B | 0644 |
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pgalloc.h | File | 444 B | 0644 |
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pgtable.h | File | 127 B | 0644 |
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pgtable_mm.h | File | 4.84 KB | 0644 |
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pgtable_no.h | File | 1.57 KB | 0644 |
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processor.h | File | 3.59 KB | 0644 |
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ptrace.h | File | 643 B | 0644 |
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q40_master.h | File | 2.28 KB | 0644 |
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q40ints.h | File | 749 B | 0644 |
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quicc_simple.h | File | 1.79 KB | 0644 |
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raw_io.h | File | 11.41 KB | 0644 |
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segment.h | File | 1.42 KB | 0644 |
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serial.h | File | 1.14 KB | 0644 |
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setup.h | File | 9.25 KB | 0644 |
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signal.h | File | 1.34 KB | 0644 |
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smp.h | File | 32 B | 0644 |
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string.h | File | 1.68 KB | 0644 |
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sun3-head.h | File | 353 B | 0644 |
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sun3_pgalloc.h | File | 2.26 KB | 0644 |
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sun3_pgtable.h | File | 7.65 KB | 0644 |
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sun3ints.h | File | 989 B | 0644 |
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sun3mmu.h | File | 4.91 KB | 0644 |
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sun3x.h | File | 868 B | 0644 |
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sun3xflop.h | File | 5.62 KB | 0644 |
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sun3xprom.h | File | 1.31 KB | 0644 |
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switch_to.h | File | 1.51 KB | 0644 |
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thread_info.h | File | 2.02 KB | 0644 |
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timex.h | File | 974 B | 0644 |
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tlb.h | File | 486 B | 0644 |
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tlbflush.h | File | 5.95 KB | 0644 |
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traps.h | File | 8.33 KB | 0644 |
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uaccess.h | File | 152 B | 0644 |
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uaccess_mm.h | File | 10.31 KB | 0644 |
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uaccess_no.h | File | 3.69 KB | 0644 |
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ucontext.h | File | 570 B | 0644 |
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unaligned.h | File | 600 B | 0644 |
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unistd.h | File | 952 B | 0644 |
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user.h | File | 3.78 KB | 0644 |
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vga.h | File | 651 B | 0644 |
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virtconvert.h | File | 947 B | 0644 |
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zorro.h | File | 1.17 KB | 0644 |
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