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/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __CVMX_CONFIG_H__
#define __CVMX_CONFIG_H__

/************************* Config Specific Defines ************************/
#define CVMX_LLM_NUM_PORTS 1
#define CVMX_NULL_POINTER_PROTECT 1
#define CVMX_ENABLE_DEBUG_PRINTS 1
/* PKO queues per port for interface 0 (ports 0-15) */
#define CVMX_PKO_QUEUES_PER_PORT_INTERFACE0 1
/* PKO queues per port for interface 1 (ports 16-31) */
#define CVMX_PKO_QUEUES_PER_PORT_INTERFACE1 1
/* Limit on the number of PKO ports enabled for interface 0 */
#define CVMX_PKO_MAX_PORTS_INTERFACE0 CVMX_HELPER_PKO_MAX_PORTS_INTERFACE0
/* Limit on the number of PKO ports enabled for interface 1 */
#define CVMX_PKO_MAX_PORTS_INTERFACE1 CVMX_HELPER_PKO_MAX_PORTS_INTERFACE1
/* PKO queues per port for PCI (ports 32-35) */
#define CVMX_PKO_QUEUES_PER_PORT_PCI 1
/* PKO queues per port for Loop devices (ports 36-39) */
#define CVMX_PKO_QUEUES_PER_PORT_LOOP 1

/************************* FPA allocation *********************************/
/* Pool sizes in bytes, must be multiple of a cache line */
#define CVMX_FPA_POOL_0_SIZE (16 * CVMX_CACHE_LINE_SIZE)
#define CVMX_FPA_POOL_1_SIZE (1 * CVMX_CACHE_LINE_SIZE)
#define CVMX_FPA_POOL_2_SIZE (8 * CVMX_CACHE_LINE_SIZE)
#define CVMX_FPA_POOL_3_SIZE (0 * CVMX_CACHE_LINE_SIZE)
#define CVMX_FPA_POOL_4_SIZE (0 * CVMX_CACHE_LINE_SIZE)
#define CVMX_FPA_POOL_5_SIZE (0 * CVMX_CACHE_LINE_SIZE)
#define CVMX_FPA_POOL_6_SIZE (0 * CVMX_CACHE_LINE_SIZE)
#define CVMX_FPA_POOL_7_SIZE (0 * CVMX_CACHE_LINE_SIZE)

/* Pools in use */
/* Packet buffers */
#define CVMX_FPA_PACKET_POOL		    (0)
#define CVMX_FPA_PACKET_POOL_SIZE	    CVMX_FPA_POOL_0_SIZE
/* Work queue entries */
#define CVMX_FPA_WQE_POOL		    (1)
#define CVMX_FPA_WQE_POOL_SIZE		    CVMX_FPA_POOL_1_SIZE
/* PKO queue command buffers */
#define CVMX_FPA_OUTPUT_BUFFER_POOL	    (2)
#define CVMX_FPA_OUTPUT_BUFFER_POOL_SIZE    CVMX_FPA_POOL_2_SIZE

/*************************  FAU allocation ********************************/
/* The fetch and add registers are allocated here.  They are arranged
 * in order of descending size so that all alignment constraints are
 * automatically met.  The enums are linked so that the following enum
 * continues allocating where the previous one left off, so the
 * numbering within each enum always starts with zero.	The macros
 * take care of the address increment size, so the values entered
 * always increase by 1.  FAU registers are accessed with byte
 * addresses.
 */

#define CVMX_FAU_REG_64_ADDR(x) ((x << 3) + CVMX_FAU_REG_64_START)
typedef enum {
	CVMX_FAU_REG_64_START	= 0,
	CVMX_FAU_REG_64_END	= CVMX_FAU_REG_64_ADDR(0),
} cvmx_fau_reg_64_t;

#define CVMX_FAU_REG_32_ADDR(x) ((x << 2) + CVMX_FAU_REG_32_START)
typedef enum {
	CVMX_FAU_REG_32_START	= CVMX_FAU_REG_64_END,
	CVMX_FAU_REG_32_END	= CVMX_FAU_REG_32_ADDR(0),
} cvmx_fau_reg_32_t;

#define CVMX_FAU_REG_16_ADDR(x) ((x << 1) + CVMX_FAU_REG_16_START)
typedef enum {
	CVMX_FAU_REG_16_START	= CVMX_FAU_REG_32_END,
	CVMX_FAU_REG_16_END	= CVMX_FAU_REG_16_ADDR(0),
} cvmx_fau_reg_16_t;

#define CVMX_FAU_REG_8_ADDR(x) ((x) + CVMX_FAU_REG_8_START)
typedef enum {
	CVMX_FAU_REG_8_START	= CVMX_FAU_REG_16_END,
	CVMX_FAU_REG_8_END	= CVMX_FAU_REG_8_ADDR(0),
} cvmx_fau_reg_8_t;

/*
 * The name CVMX_FAU_REG_AVAIL_BASE is provided to indicate the first
 * available FAU address that is not allocated in cvmx-config.h. This
 * is 64 bit aligned.
 */
#define CVMX_FAU_REG_AVAIL_BASE ((CVMX_FAU_REG_8_END + 0x7) & (~0x7ULL))
#define CVMX_FAU_REG_END (2048)

/********************** scratch memory allocation *************************/
/* Scratchpad memory allocation.  Note that these are byte memory
 * addresses.  Some uses of scratchpad (IOBDMA for example) require
 * the use of 8-byte aligned addresses, so proper alignment needs to
 * be taken into account.
 */
/* Generic scratch iobdma area */
#define CVMX_SCR_SCRATCH	       (0)
/* First location available after cvmx-config.h allocated region. */
#define CVMX_SCR_REG_AVAIL_BASE	       (8)

/*
 * CVMX_HELPER_FIRST_MBUFF_SKIP is the number of bytes to reserve
 * before the beginning of the packet. If necessary, override the
 * default here.  See the IPD section of the hardware manual for MBUFF
 * SKIP details.
 */
#define CVMX_HELPER_FIRST_MBUFF_SKIP 184

/*
 * CVMX_HELPER_NOT_FIRST_MBUFF_SKIP is the number of bytes to reserve
 * in each chained packet element. If necessary, override the default
 * here.
 */
#define CVMX_HELPER_NOT_FIRST_MBUFF_SKIP 0

/*
 * CVMX_HELPER_ENABLE_BACK_PRESSURE controls whether back pressure is
 * enabled for all input ports. This controls if IPD sends
 * backpressure to all ports if Octeon's FPA pools don't have enough
 * packet or work queue entries. Even when this is off, it is still
 * possible to get backpressure from individual hardware ports. When
 * configuring backpressure, also check
 * CVMX_HELPER_DISABLE_*_BACKPRESSURE below. If necessary, override
 * the default here.
 */
#define CVMX_HELPER_ENABLE_BACK_PRESSURE 1

/*
 * CVMX_HELPER_ENABLE_IPD controls if the IPD is enabled in the helper
 * function. Once it is enabled the hardware starts accepting
 * packets. You might want to skip the IPD enable if configuration
 * changes are need from the default helper setup. If necessary,
 * override the default here.
 */
#define CVMX_HELPER_ENABLE_IPD 0

/*
 * CVMX_HELPER_INPUT_TAG_TYPE selects the type of tag that the IPD assigns
 * to incoming packets.
 */
#define CVMX_HELPER_INPUT_TAG_TYPE CVMX_POW_TAG_TYPE_ORDERED

#define CVMX_ENABLE_PARAMETER_CHECKING 0

/*
 * The following select which fields are used by the PIP to generate
 * the tag on INPUT
 * 0: don't include
 * 1: include
 */
#define CVMX_HELPER_INPUT_TAG_IPV6_SRC_IP	0
#define CVMX_HELPER_INPUT_TAG_IPV6_DST_IP	0
#define CVMX_HELPER_INPUT_TAG_IPV6_SRC_PORT	0
#define CVMX_HELPER_INPUT_TAG_IPV6_DST_PORT	0
#define CVMX_HELPER_INPUT_TAG_IPV6_NEXT_HEADER	0
#define CVMX_HELPER_INPUT_TAG_IPV4_SRC_IP	0
#define CVMX_HELPER_INPUT_TAG_IPV4_DST_IP	0
#define CVMX_HELPER_INPUT_TAG_IPV4_SRC_PORT	0
#define CVMX_HELPER_INPUT_TAG_IPV4_DST_PORT	0
#define CVMX_HELPER_INPUT_TAG_IPV4_PROTOCOL	0
#define CVMX_HELPER_INPUT_TAG_INPUT_PORT	1

/* Select skip mode for input ports */
#define CVMX_HELPER_INPUT_PORT_SKIP_MODE	CVMX_PIP_PORT_CFG_MODE_SKIPL2

/*
 * Force backpressure to be disabled.  This overrides all other
 * backpressure configuration.
 */
#define CVMX_HELPER_DISABLE_RGMII_BACKPRESSURE 0

#endif /* __CVMX_CONFIG_H__ */

Filemanager

Name Type Size Permission Actions
cvmx-address.h File 9.15 KB 0644
cvmx-agl-defs.h File 70.87 KB 0644
cvmx-asm.h File 5.08 KB 0644
cvmx-asxx-defs.h File 17.73 KB 0644
cvmx-boot-vector.h File 1.57 KB 0644
cvmx-bootinfo.h File 13.44 KB 0644
cvmx-bootmem.h File 14.02 KB 0644
cvmx-ciu-defs.h File 214.08 KB 0644
cvmx-ciu2-defs.h File 173.44 KB 0644
cvmx-ciu3-defs.h File 10.71 KB 0644
cvmx-cmd-queue.h File 18.46 KB 0644
cvmx-config.h File 6.31 KB 0644
cvmx-coremask.h File 2.13 KB 0644
cvmx-dbg-defs.h File 2.73 KB 0644
cvmx-dpi-defs.h File 27 KB 0644
cvmx-fau.h File 18.21 KB 0644
cvmx-fpa-defs.h File 37.39 KB 0644
cvmx-fpa.h File 8.14 KB 0644
cvmx-gmxx-defs.h File 226.41 KB 0644
cvmx-gpio-defs.h File 13.3 KB 0644
cvmx-helper-board.h File 4.91 KB 0644
cvmx-helper-errata.h File 1.25 KB 0644
cvmx-helper-jtag.h File 1.49 KB 0644
cvmx-helper-loop.h File 1.93 KB 0644
cvmx-helper-npi.h File 1.91 KB 0644
cvmx-helper-rgmii.h File 3.45 KB 0644
cvmx-helper-sgmii.h File 3.3 KB 0644
cvmx-helper-spi.h File 2.71 KB 0644
cvmx-helper-util.h File 5.92 KB 0644
cvmx-helper-xaui.h File 3.29 KB 0644
cvmx-helper.h File 7 KB 0644
cvmx-iob-defs.h File 35.77 KB 0644
cvmx-ipd-defs.h File 56.09 KB 0644
cvmx-ipd.h File 10.45 KB 0644
cvmx-l2c-defs.h File 7.94 KB 0644
cvmx-l2c.h File 11.13 KB 0644
cvmx-l2d-defs.h File 1.9 KB 0644
cvmx-l2t-defs.h File 5.18 KB 0644
cvmx-led-defs.h File 7.7 KB 0644
cvmx-lmcx-defs.h File 88.35 KB 0644
cvmx-mio-defs.h File 141.79 KB 0644
cvmx-mixx-defs.h File 14.58 KB 0644
cvmx-npei-defs.h File 94.93 KB 0644
cvmx-npi-defs.h File 67.92 KB 0644
cvmx-packet.h File 2.07 KB 0644
cvmx-pci-defs.h File 56.08 KB 0644
cvmx-pciercx-defs.h File 11.23 KB 0644
cvmx-pcsx-defs.h File 33.81 KB 0644
cvmx-pcsxx-defs.h File 25.23 KB 0644
cvmx-pemx-defs.h File 20.62 KB 0644
cvmx-pescx-defs.h File 15.88 KB 0644
cvmx-pexp-defs.h File 16.64 KB 0644
cvmx-pip-defs.h File 87.19 KB 0644
cvmx-pip.h File 16.01 KB 0644
cvmx-pko-defs.h File 73.09 KB 0644
cvmx-pko.h File 19.17 KB 0644
cvmx-pow-defs.h File 33.51 KB 0644
cvmx-pow.h File 63.82 KB 0644
cvmx-rnm-defs.h File 6.03 KB 0644
cvmx-rst-defs.h File 7.27 KB 0644
cvmx-scratch.h File 3.78 KB 0644
cvmx-sli-defs.h File 3.95 KB 0644
cvmx-smix-defs.h File 11.01 KB 0644
cvmx-spi.h File 8.93 KB 0644
cvmx-spinlock.h File 6.24 KB 0644
cvmx-spxx-defs.h File 12.86 KB 0644
cvmx-sriox-defs.h File 42.13 KB 0644
cvmx-srxx-defs.h File 4.49 KB 0644
cvmx-stxx-defs.h File 10.42 KB 0644
cvmx-sysinfo.h File 3.95 KB 0644
cvmx-uctlx-defs.h File 12.78 KB 0644
cvmx-wqe.h File 17.06 KB 0644
cvmx.h File 13.85 KB 0644
octeon-feature.h File 6.38 KB 0644
octeon-model.h File 16.49 KB 0644
octeon.h File 12.26 KB 0644
pci-octeon.h File 1.65 KB 0644