/* * Copyright (C) 2012 Regents of the University of California * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation, version 2. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ #ifndef _ASM_RISCV_BITOPS_H #define _ASM_RISCV_BITOPS_H #ifndef _LINUX_BITOPS_H #error "Only <linux/bitops.h> can be included directly" #endif /* _LINUX_BITOPS_H */ #include <linux/compiler.h> #include <linux/irqflags.h> #include <asm/barrier.h> #include <asm/bitsperlong.h> #ifndef smp_mb__before_clear_bit #define smp_mb__before_clear_bit() smp_mb() #define smp_mb__after_clear_bit() smp_mb() #endif /* smp_mb__before_clear_bit */ #include <asm-generic/bitops/__ffs.h> #include <asm-generic/bitops/ffz.h> #include <asm-generic/bitops/fls.h> #include <asm-generic/bitops/__fls.h> #include <asm-generic/bitops/fls64.h> #include <asm-generic/bitops/find.h> #include <asm-generic/bitops/sched.h> #include <asm-generic/bitops/ffs.h> #include <asm-generic/bitops/hweight.h> #if (BITS_PER_LONG == 64) #define __AMO(op) "amo" #op ".d" #elif (BITS_PER_LONG == 32) #define __AMO(op) "amo" #op ".w" #else #error "Unexpected BITS_PER_LONG" #endif #define __test_and_op_bit_ord(op, mod, nr, addr, ord) \ ({ \ unsigned long __res, __mask; \ __mask = BIT_MASK(nr); \ __asm__ __volatile__ ( \ __AMO(op) #ord " %0, %2, %1" \ : "=r" (__res), "+A" (addr[BIT_WORD(nr)]) \ : "r" (mod(__mask)) \ : "memory"); \ ((__res & __mask) != 0); \ }) #define __op_bit_ord(op, mod, nr, addr, ord) \ __asm__ __volatile__ ( \ __AMO(op) #ord " zero, %1, %0" \ : "+A" (addr[BIT_WORD(nr)]) \ : "r" (mod(BIT_MASK(nr))) \ : "memory"); #define __test_and_op_bit(op, mod, nr, addr) \ __test_and_op_bit_ord(op, mod, nr, addr, .aqrl) #define __op_bit(op, mod, nr, addr) \ __op_bit_ord(op, mod, nr, addr, ) /* Bitmask modifiers */ #define __NOP(x) (x) #define __NOT(x) (~(x)) /** * test_and_set_bit - Set a bit and return its old value * @nr: Bit to set * @addr: Address to count from * * This operation may be reordered on other architectures than x86. */ static inline int test_and_set_bit(int nr, volatile unsigned long *addr) { return __test_and_op_bit(or, __NOP, nr, addr); } /** * test_and_clear_bit - Clear a bit and return its old value * @nr: Bit to clear * @addr: Address to count from * * This operation can be reordered on other architectures other than x86. */ static inline int test_and_clear_bit(int nr, volatile unsigned long *addr) { return __test_and_op_bit(and, __NOT, nr, addr); } /** * test_and_change_bit - Change a bit and return its old value * @nr: Bit to change * @addr: Address to count from * * This operation is atomic and cannot be reordered. * It also implies a memory barrier. */ static inline int test_and_change_bit(int nr, volatile unsigned long *addr) { return __test_and_op_bit(xor, __NOP, nr, addr); } /** * set_bit - Atomically set a bit in memory * @nr: the bit to set * @addr: the address to start counting from * * Note: there are no guarantees that this function will not be reordered * on non x86 architectures, so if you are writing portable code, * make sure not to rely on its reordering guarantees. * * Note that @nr may be almost arbitrarily large; this function is not * restricted to acting on a single-word quantity. */ static inline void set_bit(int nr, volatile unsigned long *addr) { __op_bit(or, __NOP, nr, addr); } /** * clear_bit - Clears a bit in memory * @nr: Bit to clear * @addr: Address to start counting from * * Note: there are no guarantees that this function will not be reordered * on non x86 architectures, so if you are writing portable code, * make sure not to rely on its reordering guarantees. */ static inline void clear_bit(int nr, volatile unsigned long *addr) { __op_bit(and, __NOT, nr, addr); } /** * change_bit - Toggle a bit in memory * @nr: Bit to change * @addr: Address to start counting from * * change_bit() may be reordered on other architectures than x86. * Note that @nr may be almost arbitrarily large; this function is not * restricted to acting on a single-word quantity. */ static inline void change_bit(int nr, volatile unsigned long *addr) { __op_bit(xor, __NOP, nr, addr); } /** * test_and_set_bit_lock - Set a bit and return its old value, for lock * @nr: Bit to set * @addr: Address to count from * * This operation is atomic and provides acquire barrier semantics. * It can be used to implement bit locks. */ static inline int test_and_set_bit_lock( unsigned long nr, volatile unsigned long *addr) { return __test_and_op_bit_ord(or, __NOP, nr, addr, .aq); } /** * clear_bit_unlock - Clear a bit in memory, for unlock * @nr: the bit to set * @addr: the address to start counting from * * This operation is atomic and provides release barrier semantics. */ static inline void clear_bit_unlock( unsigned long nr, volatile unsigned long *addr) { __op_bit_ord(and, __NOT, nr, addr, .rl); } /** * __clear_bit_unlock - Clear a bit in memory, for unlock * @nr: the bit to set * @addr: the address to start counting from * * This operation is like clear_bit_unlock, however it is not atomic. * It does provide release barrier semantics so it can be used to unlock * a bit lock, however it would only be used if no other CPU can modify * any bits in the memory until the lock is released (a good example is * if the bit lock itself protects access to the other bits in the word). * * On RISC-V systems there seems to be no benefit to taking advantage of the * non-atomic property here: it's a lot more instructions and we still have to * provide release semantics anyway. */ static inline void __clear_bit_unlock( unsigned long nr, volatile unsigned long *addr) { clear_bit_unlock(nr, addr); } #undef __test_and_op_bit #undef __op_bit #undef __NOP #undef __NOT #undef __AMO #include <asm-generic/bitops/non-atomic.h> #include <asm-generic/bitops/le.h> #include <asm-generic/bitops/ext2-atomic.h> #endif /* _ASM_RISCV_BITOPS_H */
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Kbuild | File | 1.37 KB | 0644 |
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asm-offsets.h | File | 35 B | 0644 |
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asm-prototypes.h | File | 176 B | 0644 |
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asm.h | File | 1.78 KB | 0644 |
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atomic.h | File | 11.31 KB | 0644 |
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barrier.h | File | 2.59 KB | 0644 |
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bitops.h | File | 6.23 KB | 0644 |
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bug.h | File | 2.12 KB | 0644 |
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cache.h | File | 745 B | 0644 |
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cacheflush.h | File | 1.7 KB | 0644 |
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cmpxchg.h | File | 3.35 KB | 0644 |
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compat.h | File | 924 B | 0644 |
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csr.h | File | 3.8 KB | 0644 |
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current.h | File | 1.27 KB | 0644 |
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delay.h | File | 881 B | 0644 |
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dma-mapping.h | File | 1.19 KB | 0644 |
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elf.h | File | 2.3 KB | 0644 |
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fence.h | File | 279 B | 0644 |
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hwcap.h | File | 1013 B | 0644 |
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io.h | File | 11.81 KB | 0644 |
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irq.h | File | 841 B | 0644 |
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irqflags.h | File | 1.54 KB | 0644 |
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kprobes.h | File | 679 B | 0644 |
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linkage.h | File | 677 B | 0644 |
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mmu.h | File | 829 B | 0644 |
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mmu_context.h | File | 3.14 KB | 0644 |
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page.h | File | 3.76 KB | 0644 |
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pci.h | File | 1.16 KB | 0644 |
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pgalloc.h | File | 3.06 KB | 0644 |
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pgtable-32.h | File | 870 B | 0644 |
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pgtable-64.h | File | 2.08 KB | 0644 |
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pgtable-bits.h | File | 1.81 KB | 0644 |
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pgtable.h | File | 11.17 KB | 0644 |
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processor.h | File | 2.44 KB | 0644 |
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ptrace.h | File | 2.69 KB | 0644 |
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sbi.h | File | 2.6 KB | 0644 |
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smp.h | File | 1.59 KB | 0644 |
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spinlock.h | File | 2.85 KB | 0644 |
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spinlock_types.h | File | 906 B | 0644 |
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string.h | File | 838 B | 0644 |
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switch_to.h | File | 1.86 KB | 0644 |
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syscall.h | File | 2.59 KB | 0644 |
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thread_info.h | File | 3.11 KB | 0644 |
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timex.h | File | 1.29 KB | 0644 |
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tlb.h | File | 717 B | 0644 |
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tlbflush.h | File | 1.83 KB | 0644 |
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uaccess.h | File | 14 KB | 0644 |
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unistd.h | File | 638 B | 0644 |
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vdso.h | File | 1.49 KB | 0644 |
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word-at-a-time.h | File | 1.48 KB | 0644 |
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