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/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_S390_PCI_DMA_H
#define _ASM_S390_PCI_DMA_H

/* I/O Translation Anchor (IOTA) */
enum zpci_ioat_dtype {
	ZPCI_IOTA_STO = 0,
	ZPCI_IOTA_RTTO = 1,
	ZPCI_IOTA_RSTO = 2,
	ZPCI_IOTA_RFTO = 3,
	ZPCI_IOTA_PFAA = 4,
	ZPCI_IOTA_IOPFAA = 5,
	ZPCI_IOTA_IOPTO = 7
};

#define ZPCI_IOTA_IOT_ENABLED		0x800UL
#define ZPCI_IOTA_DT_ST			(ZPCI_IOTA_STO	<< 2)
#define ZPCI_IOTA_DT_RT			(ZPCI_IOTA_RTTO << 2)
#define ZPCI_IOTA_DT_RS			(ZPCI_IOTA_RSTO << 2)
#define ZPCI_IOTA_DT_RF			(ZPCI_IOTA_RFTO << 2)
#define ZPCI_IOTA_DT_PF			(ZPCI_IOTA_PFAA << 2)
#define ZPCI_IOTA_FS_4K			0
#define ZPCI_IOTA_FS_1M			1
#define ZPCI_IOTA_FS_2G			2
#define ZPCI_KEY			(PAGE_DEFAULT_KEY << 5)

#define ZPCI_TABLE_SIZE_RT	(1UL << 42)

#define ZPCI_IOTA_STO_FLAG	(ZPCI_IOTA_IOT_ENABLED | ZPCI_KEY | ZPCI_IOTA_DT_ST)
#define ZPCI_IOTA_RTTO_FLAG	(ZPCI_IOTA_IOT_ENABLED | ZPCI_KEY | ZPCI_IOTA_DT_RT)
#define ZPCI_IOTA_RSTO_FLAG	(ZPCI_IOTA_IOT_ENABLED | ZPCI_KEY | ZPCI_IOTA_DT_RS)
#define ZPCI_IOTA_RFTO_FLAG	(ZPCI_IOTA_IOT_ENABLED | ZPCI_KEY | ZPCI_IOTA_DT_RF)
#define ZPCI_IOTA_RFAA_FLAG	(ZPCI_IOTA_IOT_ENABLED | ZPCI_KEY | ZPCI_IOTA_DT_PF | ZPCI_IOTA_FS_2G)

/* I/O Region and segment tables */
#define ZPCI_INDEX_MASK			0x7ffUL

#define ZPCI_TABLE_TYPE_MASK		0xc
#define ZPCI_TABLE_TYPE_RFX		0xc
#define ZPCI_TABLE_TYPE_RSX		0x8
#define ZPCI_TABLE_TYPE_RTX		0x4
#define ZPCI_TABLE_TYPE_SX		0x0

#define ZPCI_TABLE_LEN_RFX		0x3
#define ZPCI_TABLE_LEN_RSX		0x3
#define ZPCI_TABLE_LEN_RTX		0x3

#define ZPCI_TABLE_OFFSET_MASK		0xc0
#define ZPCI_TABLE_SIZE			0x4000
#define ZPCI_TABLE_ALIGN		ZPCI_TABLE_SIZE
#define ZPCI_TABLE_ENTRY_SIZE		(sizeof(unsigned long))
#define ZPCI_TABLE_ENTRIES		(ZPCI_TABLE_SIZE / ZPCI_TABLE_ENTRY_SIZE)

#define ZPCI_TABLE_BITS			11
#define ZPCI_PT_BITS			8
#define ZPCI_ST_SHIFT			(ZPCI_PT_BITS + PAGE_SHIFT)
#define ZPCI_RT_SHIFT			(ZPCI_ST_SHIFT + ZPCI_TABLE_BITS)

#define ZPCI_RTE_FLAG_MASK		0x3fffUL
#define ZPCI_RTE_ADDR_MASK		(~ZPCI_RTE_FLAG_MASK)
#define ZPCI_STE_FLAG_MASK		0x7ffUL
#define ZPCI_STE_ADDR_MASK		(~ZPCI_STE_FLAG_MASK)

/* I/O Page tables */
#define ZPCI_PTE_VALID_MASK		0x400
#define ZPCI_PTE_INVALID		0x400
#define ZPCI_PTE_VALID			0x000
#define ZPCI_PT_SIZE			0x800
#define ZPCI_PT_ALIGN			ZPCI_PT_SIZE
#define ZPCI_PT_ENTRIES			(ZPCI_PT_SIZE / ZPCI_TABLE_ENTRY_SIZE)
#define ZPCI_PT_MASK			(ZPCI_PT_ENTRIES - 1)

#define ZPCI_PTE_FLAG_MASK		0xfffUL
#define ZPCI_PTE_ADDR_MASK		(~ZPCI_PTE_FLAG_MASK)

/* Shared bits */
#define ZPCI_TABLE_VALID		0x00
#define ZPCI_TABLE_INVALID		0x20
#define ZPCI_TABLE_PROTECTED		0x200
#define ZPCI_TABLE_UNPROTECTED		0x000

#define ZPCI_TABLE_VALID_MASK		0x20
#define ZPCI_TABLE_PROT_MASK		0x200

static inline unsigned int calc_rtx(dma_addr_t ptr)
{
	return ((unsigned long) ptr >> ZPCI_RT_SHIFT) & ZPCI_INDEX_MASK;
}

static inline unsigned int calc_sx(dma_addr_t ptr)
{
	return ((unsigned long) ptr >> ZPCI_ST_SHIFT) & ZPCI_INDEX_MASK;
}

static inline unsigned int calc_px(dma_addr_t ptr)
{
	return ((unsigned long) ptr >> PAGE_SHIFT) & ZPCI_PT_MASK;
}

static inline void set_pt_pfaa(unsigned long *entry, void *pfaa)
{
	*entry &= ZPCI_PTE_FLAG_MASK;
	*entry |= ((unsigned long) pfaa & ZPCI_PTE_ADDR_MASK);
}

static inline void set_rt_sto(unsigned long *entry, void *sto)
{
	*entry &= ZPCI_RTE_FLAG_MASK;
	*entry |= ((unsigned long) sto & ZPCI_RTE_ADDR_MASK);
	*entry |= ZPCI_TABLE_TYPE_RTX;
}

static inline void set_st_pto(unsigned long *entry, void *pto)
{
	*entry &= ZPCI_STE_FLAG_MASK;
	*entry |= ((unsigned long) pto & ZPCI_STE_ADDR_MASK);
	*entry |= ZPCI_TABLE_TYPE_SX;
}

static inline void validate_rt_entry(unsigned long *entry)
{
	*entry &= ~ZPCI_TABLE_VALID_MASK;
	*entry &= ~ZPCI_TABLE_OFFSET_MASK;
	*entry |= ZPCI_TABLE_VALID;
	*entry |= ZPCI_TABLE_LEN_RTX;
}

static inline void validate_st_entry(unsigned long *entry)
{
	*entry &= ~ZPCI_TABLE_VALID_MASK;
	*entry |= ZPCI_TABLE_VALID;
}

static inline void invalidate_table_entry(unsigned long *entry)
{
	*entry &= ~ZPCI_TABLE_VALID_MASK;
	*entry |= ZPCI_TABLE_INVALID;
}

static inline void invalidate_pt_entry(unsigned long *entry)
{
	WARN_ON_ONCE((*entry & ZPCI_PTE_VALID_MASK) == ZPCI_PTE_INVALID);
	*entry &= ~ZPCI_PTE_VALID_MASK;
	*entry |= ZPCI_PTE_INVALID;
}

static inline void validate_pt_entry(unsigned long *entry)
{
	WARN_ON_ONCE((*entry & ZPCI_PTE_VALID_MASK) == ZPCI_PTE_VALID);
	*entry &= ~ZPCI_PTE_VALID_MASK;
	*entry |= ZPCI_PTE_VALID;
}

static inline void entry_set_protected(unsigned long *entry)
{
	*entry &= ~ZPCI_TABLE_PROT_MASK;
	*entry |= ZPCI_TABLE_PROTECTED;
}

static inline void entry_clr_protected(unsigned long *entry)
{
	*entry &= ~ZPCI_TABLE_PROT_MASK;
	*entry |= ZPCI_TABLE_UNPROTECTED;
}

static inline int reg_entry_isvalid(unsigned long entry)
{
	return (entry & ZPCI_TABLE_VALID_MASK) == ZPCI_TABLE_VALID;
}

static inline int pt_entry_isvalid(unsigned long entry)
{
	return (entry & ZPCI_PTE_VALID_MASK) == ZPCI_PTE_VALID;
}

static inline int entry_isprotected(unsigned long entry)
{
	return (entry & ZPCI_TABLE_PROT_MASK) == ZPCI_TABLE_PROTECTED;
}

static inline unsigned long *get_rt_sto(unsigned long entry)
{
	return ((entry & ZPCI_TABLE_TYPE_MASK) == ZPCI_TABLE_TYPE_RTX)
		? (unsigned long *) (entry & ZPCI_RTE_ADDR_MASK)
		: NULL;
}

static inline unsigned long *get_st_pto(unsigned long entry)
{
	return ((entry & ZPCI_TABLE_TYPE_MASK) == ZPCI_TABLE_TYPE_SX)
		? (unsigned long *) (entry & ZPCI_STE_ADDR_MASK)
		: NULL;
}

/* Prototypes */
int zpci_dma_init_device(struct zpci_dev *);
void zpci_dma_exit_device(struct zpci_dev *);
void dma_free_seg_table(unsigned long);
unsigned long *dma_alloc_cpu_table(void);
void dma_cleanup_tables(unsigned long *);
unsigned long *dma_walk_cpu_trans(unsigned long *rto, dma_addr_t dma_addr);
void dma_update_cpu_trans(unsigned long *entry, void *page_addr, int flags);

#endif

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fpu Folder 0755
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Kbuild File 557 B 0644
airq.h File 3.02 KB 0644
alternative-asm.h File 3.07 KB 0644
alternative.h File 4.99 KB 0644
ap.h File 9.9 KB 0644
appldata.h File 1.54 KB 0644
archrandom.h File 1.17 KB 0644
asm-prototypes.h File 227 B 0644
atomic.h File 5.1 KB 0644
atomic_ops.h File 4.02 KB 0644
barrier.h File 1.84 KB 0644
bitops.h File 10.13 KB 0644
bug.h File 1.49 KB 0644
bugs.h File 441 B 0644
cache.h File 387 B 0644
ccwdev.h File 7.99 KB 0644
ccwgroup.h File 2.53 KB 0644
checksum.h File 3.24 KB 0644
chpid.h File 974 B 0644
cio.h File 8.01 KB 0644
clp.h File 1.32 KB 0644
cmb.h File 425 B 0644
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compat.h File 7.9 KB 0644
cpacf.h File 16.8 KB 0644
cpcmd.h File 1.11 KB 0644
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cpufeature.h File 963 B 0644
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crw.h File 1.86 KB 0644
css_chars.h File 769 B 0644
ctl_reg.h File 2.89 KB 0644
current.h File 405 B 0644
debug.h File 8.1 KB 0644
delay.h File 721 B 0644
diag.h File 5.94 KB 0644
dis.h File 637 B 0644
dma-mapping.h File 621 B 0644
dma.h File 456 B 0644
eadm.h File 2.03 KB 0644
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elf.h File 10.36 KB 0644
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futex.h File 2.09 KB 0644
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io.h File 2.03 KB 0644
ipl.h File 3.6 KB 0644
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kvm_host.h File 22.24 KB 0644
kvm_para.h File 5.78 KB 0644
linkage.h File 633 B 0644
livepatch.h File 461 B 0644
lowcore.h File 6.29 KB 0644
mmu.h File 1.19 KB 0644
mmu_context.h File 3.84 KB 0644
mmzone.h File 316 B 0644
module.h File 802 B 0644
nmi.h File 3.44 KB 0644
nospec-branch.h File 342 B 0644
nospec-insn.h File 3.81 KB 0644
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os_info.h File 1.1 KB 0644
page-states.h File 486 B 0644
page.h File 5.12 KB 0644
pci.h File 6.26 KB 0644
pci_clp.h File 4.25 KB 0644
pci_debug.h File 608 B 0644
pci_dma.h File 5.7 KB 0644
pci_insn.h File 2.59 KB 0644
pci_io.h File 4.58 KB 0644
percpu.h File 6.44 KB 0644
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pgalloc.h File 4.32 KB 0644
pgtable.h File 47.7 KB 0644
pkey.h File 4.23 KB 0644
preempt.h File 3.25 KB 0644
processor.h File 10.42 KB 0644
ptrace.h File 5.27 KB 0644
qdio.h File 11.67 KB 0644
reset.h File 471 B 0644
runtime_instr.h File 1.76 KB 0644
schid.h File 525 B 0644
sclp.h File 3.38 KB 0644
scsw.h File 24.1 KB 0644
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sections.h File 155 B 0644
segment.h File 93 B 0644
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set_memory.h File 779 B 0644
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