/* SPDX-License-Identifier: GPL-2.0 */ /* spitfire.h: SpitFire/BlackBird/Cheetah inline MMU operations. * * Copyright (C) 1996 David S. Miller (davem@davemloft.net) */ #ifndef _SPARC64_SPITFIRE_H #define _SPARC64_SPITFIRE_H #ifdef CONFIG_SPARC64 #include <asm/asi.h> /* The following register addresses are accessible via ASI_DMMU * and ASI_IMMU, that is there is a distinct and unique copy of * each these registers for each TLB. */ #define TSB_TAG_TARGET 0x0000000000000000 /* All chips */ #define TLB_SFSR 0x0000000000000018 /* All chips */ #define TSB_REG 0x0000000000000028 /* All chips */ #define TLB_TAG_ACCESS 0x0000000000000030 /* All chips */ #define VIRT_WATCHPOINT 0x0000000000000038 /* All chips */ #define PHYS_WATCHPOINT 0x0000000000000040 /* All chips */ #define TSB_EXTENSION_P 0x0000000000000048 /* Ultra-III and later */ #define TSB_EXTENSION_S 0x0000000000000050 /* Ultra-III and later, D-TLB only */ #define TSB_EXTENSION_N 0x0000000000000058 /* Ultra-III and later */ #define TLB_TAG_ACCESS_EXT 0x0000000000000060 /* Ultra-III+ and later */ /* These registers only exist as one entity, and are accessed * via ASI_DMMU only. */ #define PRIMARY_CONTEXT 0x0000000000000008 #define SECONDARY_CONTEXT 0x0000000000000010 #define DMMU_SFAR 0x0000000000000020 #define VIRT_WATCHPOINT 0x0000000000000038 #define PHYS_WATCHPOINT 0x0000000000000040 #define SPITFIRE_HIGHEST_LOCKED_TLBENT (64 - 1) #define CHEETAH_HIGHEST_LOCKED_TLBENT (16 - 1) #define L1DCACHE_SIZE 0x4000 #define SUN4V_CHIP_INVALID 0x00 #define SUN4V_CHIP_NIAGARA1 0x01 #define SUN4V_CHIP_NIAGARA2 0x02 #define SUN4V_CHIP_NIAGARA3 0x03 #define SUN4V_CHIP_NIAGARA4 0x04 #define SUN4V_CHIP_NIAGARA5 0x05 #define SUN4V_CHIP_SPARC_M6 0x06 #define SUN4V_CHIP_SPARC_M7 0x07 #define SUN4V_CHIP_SPARC_M8 0x08 #define SUN4V_CHIP_SPARC64X 0x8a #define SUN4V_CHIP_SPARC_SN 0x8b #define SUN4V_CHIP_UNKNOWN 0xff /* * The following CPU_ID_xxx constants are used * to identify the CPU type in the setup phase * (see head_64.S) */ #define CPU_ID_NIAGARA1 ('1') #define CPU_ID_NIAGARA2 ('2') #define CPU_ID_NIAGARA3 ('3') #define CPU_ID_NIAGARA4 ('4') #define CPU_ID_NIAGARA5 ('5') #define CPU_ID_M6 ('6') #define CPU_ID_M7 ('7') #define CPU_ID_M8 ('8') #define CPU_ID_SONOMA1 ('N') #ifndef __ASSEMBLY__ enum ultra_tlb_layout { spitfire = 0, cheetah = 1, cheetah_plus = 2, hypervisor = 3, }; extern enum ultra_tlb_layout tlb_type; extern int sun4v_chip_type; extern int cheetah_pcache_forced_on; void cheetah_enable_pcache(void); #define sparc64_highest_locked_tlbent() \ (tlb_type == spitfire ? \ SPITFIRE_HIGHEST_LOCKED_TLBENT : \ CHEETAH_HIGHEST_LOCKED_TLBENT) extern int num_kernel_image_mappings; /* The data cache is write through, so this just invalidates the * specified line. */ static inline void spitfire_put_dcache_tag(unsigned long addr, unsigned long tag) { __asm__ __volatile__("stxa %0, [%1] %2\n\t" "membar #Sync" : /* No outputs */ : "r" (tag), "r" (addr), "i" (ASI_DCACHE_TAG)); } /* The instruction cache lines are flushed with this, but note that * this does not flush the pipeline. It is possible for a line to * get flushed but stale instructions to still be in the pipeline, * a flush instruction (to any address) is sufficient to handle * this issue after the line is invalidated. */ static inline void spitfire_put_icache_tag(unsigned long addr, unsigned long tag) { __asm__ __volatile__("stxa %0, [%1] %2\n\t" "membar #Sync" : /* No outputs */ : "r" (tag), "r" (addr), "i" (ASI_IC_TAG)); } static inline unsigned long spitfire_get_dtlb_data(int entry) { unsigned long data; __asm__ __volatile__("ldxa [%1] %2, %0" : "=r" (data) : "r" (entry << 3), "i" (ASI_DTLB_DATA_ACCESS)); /* Clear TTE diag bits. */ data &= ~0x0003fe0000000000UL; return data; } static inline unsigned long spitfire_get_dtlb_tag(int entry) { unsigned long tag; __asm__ __volatile__("ldxa [%1] %2, %0" : "=r" (tag) : "r" (entry << 3), "i" (ASI_DTLB_TAG_READ)); return tag; } static inline void spitfire_put_dtlb_data(int entry, unsigned long data) { __asm__ __volatile__("stxa %0, [%1] %2\n\t" "membar #Sync" : /* No outputs */ : "r" (data), "r" (entry << 3), "i" (ASI_DTLB_DATA_ACCESS)); } static inline unsigned long spitfire_get_itlb_data(int entry) { unsigned long data; __asm__ __volatile__("ldxa [%1] %2, %0" : "=r" (data) : "r" (entry << 3), "i" (ASI_ITLB_DATA_ACCESS)); /* Clear TTE diag bits. */ data &= ~0x0003fe0000000000UL; return data; } static inline unsigned long spitfire_get_itlb_tag(int entry) { unsigned long tag; __asm__ __volatile__("ldxa [%1] %2, %0" : "=r" (tag) : "r" (entry << 3), "i" (ASI_ITLB_TAG_READ)); return tag; } static inline void spitfire_put_itlb_data(int entry, unsigned long data) { __asm__ __volatile__("stxa %0, [%1] %2\n\t" "membar #Sync" : /* No outputs */ : "r" (data), "r" (entry << 3), "i" (ASI_ITLB_DATA_ACCESS)); } static inline void spitfire_flush_dtlb_nucleus_page(unsigned long page) { __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" "membar #Sync" : /* No outputs */ : "r" (page | 0x20), "i" (ASI_DMMU_DEMAP)); } static inline void spitfire_flush_itlb_nucleus_page(unsigned long page) { __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" "membar #Sync" : /* No outputs */ : "r" (page | 0x20), "i" (ASI_IMMU_DEMAP)); } /* Cheetah has "all non-locked" tlb flushes. */ static inline void cheetah_flush_dtlb_all(void) { __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" "membar #Sync" : /* No outputs */ : "r" (0x80), "i" (ASI_DMMU_DEMAP)); } static inline void cheetah_flush_itlb_all(void) { __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" "membar #Sync" : /* No outputs */ : "r" (0x80), "i" (ASI_IMMU_DEMAP)); } /* Cheetah has a 4-tlb layout so direct access is a bit different. * The first two TLBs are fully assosciative, hold 16 entries, and are * used only for locked and >8K sized translations. One exists for * data accesses and one for instruction accesses. * * The third TLB is for data accesses to 8K non-locked translations, is * 2 way assosciative, and holds 512 entries. The fourth TLB is for * instruction accesses to 8K non-locked translations, is 2 way * assosciative, and holds 128 entries. * * Cheetah has some bug where bogus data can be returned from * ASI_{D,I}TLB_DATA_ACCESS loads, doing the load twice fixes * the problem for me. -DaveM */ static inline unsigned long cheetah_get_ldtlb_data(int entry) { unsigned long data; __asm__ __volatile__("ldxa [%1] %2, %%g0\n\t" "ldxa [%1] %2, %0" : "=r" (data) : "r" ((0 << 16) | (entry << 3)), "i" (ASI_DTLB_DATA_ACCESS)); return data; } static inline unsigned long cheetah_get_litlb_data(int entry) { unsigned long data; __asm__ __volatile__("ldxa [%1] %2, %%g0\n\t" "ldxa [%1] %2, %0" : "=r" (data) : "r" ((0 << 16) | (entry << 3)), "i" (ASI_ITLB_DATA_ACCESS)); return data; } static inline unsigned long cheetah_get_ldtlb_tag(int entry) { unsigned long tag; __asm__ __volatile__("ldxa [%1] %2, %0" : "=r" (tag) : "r" ((0 << 16) | (entry << 3)), "i" (ASI_DTLB_TAG_READ)); return tag; } static inline unsigned long cheetah_get_litlb_tag(int entry) { unsigned long tag; __asm__ __volatile__("ldxa [%1] %2, %0" : "=r" (tag) : "r" ((0 << 16) | (entry << 3)), "i" (ASI_ITLB_TAG_READ)); return tag; } static inline void cheetah_put_ldtlb_data(int entry, unsigned long data) { __asm__ __volatile__("stxa %0, [%1] %2\n\t" "membar #Sync" : /* No outputs */ : "r" (data), "r" ((0 << 16) | (entry << 3)), "i" (ASI_DTLB_DATA_ACCESS)); } static inline void cheetah_put_litlb_data(int entry, unsigned long data) { __asm__ __volatile__("stxa %0, [%1] %2\n\t" "membar #Sync" : /* No outputs */ : "r" (data), "r" ((0 << 16) | (entry << 3)), "i" (ASI_ITLB_DATA_ACCESS)); } static inline unsigned long cheetah_get_dtlb_data(int entry, int tlb) { unsigned long data; __asm__ __volatile__("ldxa [%1] %2, %%g0\n\t" "ldxa [%1] %2, %0" : "=r" (data) : "r" ((tlb << 16) | (entry << 3)), "i" (ASI_DTLB_DATA_ACCESS)); return data; } static inline unsigned long cheetah_get_dtlb_tag(int entry, int tlb) { unsigned long tag; __asm__ __volatile__("ldxa [%1] %2, %0" : "=r" (tag) : "r" ((tlb << 16) | (entry << 3)), "i" (ASI_DTLB_TAG_READ)); return tag; } static inline void cheetah_put_dtlb_data(int entry, unsigned long data, int tlb) { __asm__ __volatile__("stxa %0, [%1] %2\n\t" "membar #Sync" : /* No outputs */ : "r" (data), "r" ((tlb << 16) | (entry << 3)), "i" (ASI_DTLB_DATA_ACCESS)); } static inline unsigned long cheetah_get_itlb_data(int entry) { unsigned long data; __asm__ __volatile__("ldxa [%1] %2, %%g0\n\t" "ldxa [%1] %2, %0" : "=r" (data) : "r" ((2 << 16) | (entry << 3)), "i" (ASI_ITLB_DATA_ACCESS)); return data; } static inline unsigned long cheetah_get_itlb_tag(int entry) { unsigned long tag; __asm__ __volatile__("ldxa [%1] %2, %0" : "=r" (tag) : "r" ((2 << 16) | (entry << 3)), "i" (ASI_ITLB_TAG_READ)); return tag; } static inline void cheetah_put_itlb_data(int entry, unsigned long data) { __asm__ __volatile__("stxa %0, [%1] %2\n\t" "membar #Sync" : /* No outputs */ : "r" (data), "r" ((2 << 16) | (entry << 3)), "i" (ASI_ITLB_DATA_ACCESS)); } #endif /* !(__ASSEMBLY__) */ #endif /* CONFIG_SPARC64 */ #endif /* !(_SPARC64_SPITFIRE_H) */
Name | Type | Size | Permission | Actions |
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Kbuild | File | 491 B | 0644 |
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agp.h | File | 434 B | 0644 |
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apb.h | File | 1.06 KB | 0644 |
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asm-offsets.h | File | 35 B | 0644 |
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asm-prototypes.h | File | 727 B | 0644 |
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asm.h | File | 1.08 KB | 0644 |
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asmmacro.h | File | 1.16 KB | 0644 |
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atomic.h | File | 219 B | 0644 |
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atomic_32.h | File | 2.26 KB | 0644 |
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atomic_64.h | File | 3.34 KB | 0644 |
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auxio.h | File | 310 B | 0644 |
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auxio_32.h | File | 2.55 KB | 0644 |
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auxio_64.h | File | 3.18 KB | 0644 |
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backoff.h | File | 2.7 KB | 0644 |
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barrier.h | File | 223 B | 0644 |
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barrier_32.h | File | 160 B | 0644 |
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barrier_64.h | File | 1.96 KB | 0644 |
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bbc.h | File | 9.76 KB | 0644 |
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bitext.h | File | 631 B | 0644 |
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bitops.h | File | 219 B | 0644 |
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bitops_32.h | File | 2.79 KB | 0644 |
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bitops_64.h | File | 1.64 KB | 0644 |
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btext.h | File | 145 B | 0644 |
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bug.h | File | 588 B | 0644 |
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bugs.h | File | 404 B | 0644 |
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cache.h | File | 649 B | 0644 |
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cacheflush.h | File | 373 B | 0644 |
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cacheflush_32.h | File | 1.97 KB | 0644 |
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cacheflush_64.h | File | 2.56 KB | 0644 |
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cachetlb_32.h | File | 882 B | 0644 |
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chafsr.h | File | 9.48 KB | 0644 |
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checksum.h | File | 227 B | 0644 |
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checksum_32.h | File | 6.81 KB | 0644 |
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checksum_64.h | File | 4.4 KB | 0644 |
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chmctrl.h | File | 7.91 KB | 0644 |
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clock.h | File | 231 B | 0644 |
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clocksource.h | File | 407 B | 0644 |
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cmpxchg.h | File | 223 B | 0644 |
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cmpxchg_32.h | File | 2.4 KB | 0644 |
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cmpxchg_64.h | File | 5.13 KB | 0644 |
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compat.h | File | 6.45 KB | 0644 |
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compat_signal.h | File | 565 B | 0644 |
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contregs.h | File | 1.9 KB | 0644 |
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cpu_type.h | File | 579 B | 0644 |
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cpudata.h | File | 378 B | 0644 |
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cpudata_32.h | File | 729 B | 0644 |
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cpudata_64.h | File | 1.13 KB | 0644 |
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current.h | File | 991 B | 0644 |
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dcr.h | File | 728 B | 0644 |
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dcu.h | File | 1.48 KB | 0644 |
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delay.h | File | 215 B | 0644 |
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delay_32.h | File | 907 B | 0644 |
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delay_64.h | File | 403 B | 0644 |
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device.h | File | 565 B | 0644 |
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dma-mapping.h | File | 632 B | 0644 |
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dma.h | File | 6.6 KB | 0644 |
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ebus_dma.h | File | 1.07 KB | 0644 |
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ecc.h | File | 4.34 KB | 0644 |
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eeprom.h | File | 254 B | 0644 |
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elf.h | File | 207 B | 0644 |
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elf_32.h | File | 3.19 KB | 0644 |
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elf_64.h | File | 6.47 KB | 0644 |
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estate.h | File | 2.23 KB | 0644 |
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extable_64.h | File | 727 B | 0644 |
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fb.h | File | 680 B | 0644 |
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fbio.h | File | 2.26 KB | 0644 |
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fhc.h | File | 4.43 KB | 0644 |
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floppy.h | File | 219 B | 0644 |
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floppy_32.h | File | 9.74 KB | 0644 |
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floppy_64.h | File | 18.83 KB | 0644 |
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fpumacro.h | File | 710 B | 0644 |
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ftrace.h | File | 800 B | 0644 |
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futex.h | File | 215 B | 0644 |
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futex_32.h | File | 82 B | 0644 |
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futex_64.h | File | 2.15 KB | 0644 |
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hardirq.h | File | 223 B | 0644 |
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hardirq_32.h | File | 334 B | 0644 |
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hardirq_64.h | File | 417 B | 0644 |
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head.h | File | 211 B | 0644 |
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head_32.h | File | 2.56 KB | 0644 |
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head_64.h | File | 2.13 KB | 0644 |
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hibernate.h | File | 421 B | 0644 |
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highmem.h | File | 2.02 KB | 0644 |
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hugetlb.h | File | 2.09 KB | 0644 |
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hvtramp.h | File | 782 B | 0644 |
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hw_irq.h | File | 88 B | 0644 |
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hypervisor.h | File | 110.71 KB | 0644 |
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ide.h | File | 2.19 KB | 0644 |
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idprom.h | File | 656 B | 0644 |
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intr_queue.h | File | 794 B | 0644 |
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io-unit.h | File | 2.41 KB | 0644 |
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io.h | File | 620 B | 0644 |
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io_32.h | File | 3.51 KB | 0644 |
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io_64.h | File | 10.66 KB | 0644 |
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ioctls.h | File | 358 B | 0644 |
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iommu.h | File | 215 B | 0644 |
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iommu_32.h | File | 5.73 KB | 0644 |
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iommu_64.h | File | 2.43 KB | 0644 |
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irq.h | File | 207 B | 0644 |
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irq_32.h | File | 526 B | 0644 |
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irq_64.h | File | 3.06 KB | 0644 |
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irqflags.h | File | 227 B | 0644 |
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irqflags_32.h | File | 1.03 KB | 0644 |
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irqflags_64.h | File | 1.91 KB | 0644 |
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jump_label.h | File | 1.01 KB | 0644 |
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kdebug.h | File | 219 B | 0644 |
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kdebug_32.h | File | 1.99 KB | 0644 |
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kdebug_64.h | File | 393 B | 0644 |
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kgdb.h | File | 1014 B | 0644 |
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kmap_types.h | File | 233 B | 0644 |
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kprobes.h | File | 1.41 KB | 0644 |
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ldc.h | File | 4.37 KB | 0644 |
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leon.h | File | 7.37 KB | 0644 |
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leon_amba.h | File | 8.09 KB | 0644 |
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leon_pci.h | File | 512 B | 0644 |
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lsu.h | File | 1.04 KB | 0644 |
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machines.h | File | 1.5 KB | 0644 |
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mbus.h | File | 2.93 KB | 0644 |
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mc146818rtc.h | File | 298 B | 0644 |
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mc146818rtc_32.h | File | 699 B | 0644 |
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mc146818rtc_64.h | File | 689 B | 0644 |
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mdesc.h | File | 2.99 KB | 0644 |
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memctrl.h | File | 311 B | 0644 |
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mman.h | File | 304 B | 0644 |
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mmu.h | File | 207 B | 0644 |
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mmu_32.h | File | 209 B | 0644 |
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mmu_64.h | File | 3.14 KB | 0644 |
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mmu_context.h | File | 239 B | 0644 |
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mmu_context_32.h | File | 1.07 KB | 0644 |
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mmu_context_64.h | File | 4.15 KB | 0644 |
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mmzone.h | File | 393 B | 0644 |
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msi.h | File | 774 B | 0644 |
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mxcc.h | File | 4.33 KB | 0644 |
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nmi.h | File | 354 B | 0644 |
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ns87303.h | File | 3.22 KB | 0644 |
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obio.h | File | 6.26 KB | 0644 |
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openprom.h | File | 7.3 KB | 0644 |
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oplib.h | File | 215 B | 0644 |
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oplib_32.h | File | 5.92 KB | 0644 |
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oplib_64.h | File | 8.12 KB | 0644 |
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page.h | File | 274 B | 0644 |
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page_32.h | File | 3.91 KB | 0644 |
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page_64.h | File | 4.49 KB | 0644 |
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parport.h | File | 5.68 KB | 0644 |
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pbm.h | File | 1.47 KB | 0644 |
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pci.h | File | 207 B | 0644 |
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pci_32.h | File | 1.09 KB | 0644 |
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pci_64.h | File | 1.49 KB | 0644 |
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pcic.h | File | 5.77 KB | 0644 |
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pcr.h | File | 1.85 KB | 0644 |
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percpu.h | File | 219 B | 0644 |
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percpu_32.h | File | 168 B | 0644 |
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percpu_64.h | File | 515 B | 0644 |
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perf_event.h | File | 802 B | 0644 |
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pgalloc.h | File | 223 B | 0644 |
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pgalloc_32.h | File | 1.91 KB | 0644 |
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pgalloc_64.h | File | 2.85 KB | 0644 |
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pgtable.h | File | 223 B | 0644 |
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pgtable_32.h | File | 11.35 KB | 0644 |
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pgtable_64.h | File | 30.71 KB | 0644 |
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pgtsrmmu.h | File | 6.05 KB | 0644 |
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pil.h | File | 1.08 KB | 0644 |
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processor.h | File | 231 B | 0644 |
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processor_32.h | File | 3.13 KB | 0644 |
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processor_64.h | File | 7.58 KB | 0644 |
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prom.h | File | 2.02 KB | 0644 |
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psr.h | File | 1.38 KB | 0644 |
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ptrace.h | File | 4.19 KB | 0644 |
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qrwlock.h | File | 205 B | 0644 |
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qspinlock.h | File | 215 B | 0644 |
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ross.h | File | 5.52 KB | 0644 |
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sbi.h | File | 3.34 KB | 0644 |
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scratchpad.h | File | 547 B | 0644 |
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seccomp.h | File | 225 B | 0644 |
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sections.h | File | 289 B | 0644 |
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setup.h | File | 1.52 KB | 0644 |
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sfafsr.h | File | 3.14 KB | 0644 |
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sfp-machine.h | File | 239 B | 0644 |
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sfp-machine_32.h | File | 6.79 KB | 0644 |
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sfp-machine_64.h | File | 3.1 KB | 0644 |
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shmparam.h | File | 227 B | 0644 |
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shmparam_32.h | File | 253 B | 0644 |
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shmparam_64.h | File | 306 B | 0644 |
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sigcontext.h | File | 2.55 KB | 0644 |
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signal.h | File | 835 B | 0644 |
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smp.h | File | 207 B | 0644 |
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smp_32.h | File | 3.29 KB | 0644 |
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smp_64.h | File | 1.84 KB | 0644 |
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sparsemem.h | File | 349 B | 0644 |
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spinlock.h | File | 227 B | 0644 |
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spinlock_32.h | File | 4.22 KB | 0644 |
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spinlock_64.h | File | 409 B | 0644 |
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spinlock_types.h | File | 549 B | 0644 |
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spitfire.h | File | 9.73 KB | 0644 |
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stacktrace.h | File | 166 B | 0644 |
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starfire.h | File | 418 B | 0644 |
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string.h | File | 1.13 KB | 0644 |
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string_32.h | File | 405 B | 0644 |
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string_64.h | File | 505 B | 0644 |
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sunbpp.h | File | 3.27 KB | 0644 |
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swift.h | File | 3.07 KB | 0644 |
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switch_to.h | File | 231 B | 0644 |
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switch_to_32.h | File | 3.53 KB | 0644 |
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switch_to_64.h | File | 2.58 KB | 0644 |
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syscall.h | File | 3.41 KB | 0644 |
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syscalls.h | File | 307 B | 0644 |
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termbits.h | File | 198 B | 0644 |
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termios.h | File | 4.94 KB | 0644 |
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thread_info.h | File | 239 B | 0644 |
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thread_info_32.h | File | 3.66 KB | 0644 |
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thread_info_64.h | File | 7.84 KB | 0644 |
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timer.h | File | 215 B | 0644 |
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timer_32.h | File | 1.18 KB | 0644 |
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timer_64.h | File | 2.37 KB | 0644 |
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timex.h | File | 215 B | 0644 |
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timex_32.h | File | 266 B | 0644 |
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timex_64.h | File | 423 B | 0644 |
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tlb.h | File | 207 B | 0644 |
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tlb_32.h | File | 520 B | 0644 |
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tlb_64.h | File | 913 B | 0644 |
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tlbflush.h | File | 227 B | 0644 |
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tlbflush_32.h | File | 621 B | 0644 |
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tlbflush_64.h | File | 1.73 KB | 0644 |
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topology.h | File | 227 B | 0644 |
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topology_32.h | File | 170 B | 0644 |
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topology_64.h | File | 1.51 KB | 0644 |
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trap_block.h | File | 6.51 KB | 0644 |
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traps.h | File | 577 B | 0644 |
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tsb.h | File | 12.17 KB | 0644 |
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tsunami.h | File | 1.85 KB | 0644 |
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ttable.h | File | 20.08 KB | 0644 |
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turbosparc.h | File | 3.78 KB | 0644 |
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uaccess.h | File | 363 B | 0644 |
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uaccess_32.h | File | 8.31 KB | 0644 |
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uaccess_64.h | File | 6.05 KB | 0644 |
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unaligned.h | File | 339 B | 0644 |
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unistd.h | File | 1.37 KB | 0644 |
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upa.h | File | 3.72 KB | 0644 |
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uprobes.h | File | 1.86 KB | 0644 |
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user.h | File | 102 B | 0644 |
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vaddrs.h | File | 2.02 KB | 0644 |
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vdso.h | File | 662 B | 0644 |
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vga.h | File | 964 B | 0644 |
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viking.h | File | 8.14 KB | 0644 |
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vio.h | File | 11.81 KB | 0644 |
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visasm.h | File | 1.51 KB | 0644 |
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vvar.h | File | 1.52 KB | 0644 |
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winmacro.h | File | 4.66 KB | 0644 |
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xor.h | File | 207 B | 0644 |
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xor_32.h | File | 7.31 KB | 0644 |
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xor_64.h | File | 2.5 KB | 0644 |
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