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/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_X86_IO_H
#define _ASM_X86_IO_H

/*
 * This file contains the definitions for the x86 IO instructions
 * inb/inw/inl/outb/outw/outl and the "string versions" of the same
 * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
 * versions of the single-IO instructions (inb_p/inw_p/..).
 *
 * This file is not meant to be obfuscating: it's just complicated
 * to (a) handle it all in a way that makes gcc able to optimize it
 * as well as possible and (b) trying to avoid writing the same thing
 * over and over again with slight variations and possibly making a
 * mistake somewhere.
 */

/*
 * Thanks to James van Artsdalen for a better timing-fix than
 * the two short jumps: using outb's to a nonexistent port seems
 * to guarantee better timings even on fast machines.
 *
 * On the other hand, I'd like to be sure of a non-existent port:
 * I feel a bit unsafe about using 0x80 (should be safe, though)
 *
 *		Linus
 */

 /*
  *  Bit simplified and optimized by Jan Hubicka
  *  Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999.
  *
  *  isa_memset_io, isa_memcpy_fromio, isa_memcpy_toio added,
  *  isa_read[wl] and isa_write[wl] fixed
  *  - Arnaldo Carvalho de Melo <acme@conectiva.com.br>
  */

#define ARCH_HAS_IOREMAP_WC
#define ARCH_HAS_IOREMAP_WT

#include <linux/string.h>
#include <linux/compiler.h>
#include <asm/page.h>
#include <asm/early_ioremap.h>
#include <asm/pgtable_types.h>

#define build_mmio_read(name, size, type, reg, barrier) \
static inline type name(const volatile void __iomem *addr) \
{ type ret; asm volatile("mov" size " %1,%0":reg (ret) \
:"m" (*(volatile type __force *)addr) barrier); return ret; }

#define build_mmio_write(name, size, type, reg, barrier) \
static inline void name(type val, volatile void __iomem *addr) \
{ asm volatile("mov" size " %0,%1": :reg (val), \
"m" (*(volatile type __force *)addr) barrier); }

build_mmio_read(readb, "b", unsigned char, "=q", :"memory")
build_mmio_read(readw, "w", unsigned short, "=r", :"memory")
build_mmio_read(readl, "l", unsigned int, "=r", :"memory")

build_mmio_read(__readb, "b", unsigned char, "=q", )
build_mmio_read(__readw, "w", unsigned short, "=r", )
build_mmio_read(__readl, "l", unsigned int, "=r", )

build_mmio_write(writeb, "b", unsigned char, "q", :"memory")
build_mmio_write(writew, "w", unsigned short, "r", :"memory")
build_mmio_write(writel, "l", unsigned int, "r", :"memory")

build_mmio_write(__writeb, "b", unsigned char, "q", )
build_mmio_write(__writew, "w", unsigned short, "r", )
build_mmio_write(__writel, "l", unsigned int, "r", )

#define readb readb
#define readw readw
#define readl readl
#define readb_relaxed(a) __readb(a)
#define readw_relaxed(a) __readw(a)
#define readl_relaxed(a) __readl(a)
#define __raw_readb __readb
#define __raw_readw __readw
#define __raw_readl __readl

#define writeb writeb
#define writew writew
#define writel writel
#define writeb_relaxed(v, a) __writeb(v, a)
#define writew_relaxed(v, a) __writew(v, a)
#define writel_relaxed(v, a) __writel(v, a)
#define __raw_writeb __writeb
#define __raw_writew __writew
#define __raw_writel __writel

#define mmiowb() barrier()

#ifdef CONFIG_X86_64

build_mmio_read(readq, "q", unsigned long, "=r", :"memory")
build_mmio_read(__readq, "q", unsigned long, "=r", )
build_mmio_write(writeq, "q", unsigned long, "r", :"memory")
build_mmio_write(__writeq, "q", unsigned long, "r", )

#define readq_relaxed(a)	__readq(a)
#define writeq_relaxed(v, a)	__writeq(v, a)

#define __raw_readq		__readq
#define __raw_writeq		__writeq

/* Let people know that we have them */
#define readq			readq
#define writeq			writeq

#endif

#define ARCH_HAS_VALID_PHYS_ADDR_RANGE
extern int valid_phys_addr_range(phys_addr_t addr, size_t size);
extern int valid_mmap_phys_addr_range(unsigned long pfn, size_t size);

/**
 *	virt_to_phys	-	map virtual addresses to physical
 *	@address: address to remap
 *
 *	The returned physical address is the physical (CPU) mapping for
 *	the memory address given. It is only valid to use this function on
 *	addresses directly mapped or allocated via kmalloc.
 *
 *	This function does not give bus mappings for DMA transfers. In
 *	almost all conceivable cases a device driver should not be using
 *	this function
 */

static inline phys_addr_t virt_to_phys(volatile void *address)
{
	return __pa(address);
}
#define virt_to_phys virt_to_phys

/**
 *	phys_to_virt	-	map physical address to virtual
 *	@address: address to remap
 *
 *	The returned virtual address is a current CPU mapping for
 *	the memory address given. It is only valid to use this function on
 *	addresses that have a kernel mapping
 *
 *	This function does not handle bus mappings for DMA transfers. In
 *	almost all conceivable cases a device driver should not be using
 *	this function
 */

static inline void *phys_to_virt(phys_addr_t address)
{
	return __va(address);
}
#define phys_to_virt phys_to_virt

/*
 * Change "struct page" to physical address.
 */
#define page_to_phys(page)    ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)

/*
 * ISA I/O bus memory addresses are 1:1 with the physical address.
 * However, we truncate the address to unsigned int to avoid undesirable
 * promitions in legacy drivers.
 */
static inline unsigned int isa_virt_to_bus(volatile void *address)
{
	return (unsigned int)virt_to_phys(address);
}
#define isa_page_to_bus(page)	((unsigned int)page_to_phys(page))
#define isa_bus_to_virt		phys_to_virt

/*
 * However PCI ones are not necessarily 1:1 and therefore these interfaces
 * are forbidden in portable PCI drivers.
 *
 * Allow them on x86 for legacy drivers, though.
 */
#define virt_to_bus virt_to_phys
#define bus_to_virt phys_to_virt

/*
 * The default ioremap() behavior is non-cached; if you need something
 * else, you probably want one of the following.
 */
extern void __iomem *ioremap_nocache(resource_size_t offset, unsigned long size);
#define ioremap_nocache ioremap_nocache
extern void __iomem *ioremap_uc(resource_size_t offset, unsigned long size);
#define ioremap_uc ioremap_uc

extern void __iomem *ioremap_cache(resource_size_t offset, unsigned long size);
#define ioremap_cache ioremap_cache
extern void __iomem *ioremap_prot(resource_size_t offset, unsigned long size, unsigned long prot_val);
#define ioremap_prot ioremap_prot

/**
 * ioremap     -   map bus memory into CPU space
 * @offset:    bus address of the memory
 * @size:      size of the resource to map
 *
 * ioremap performs a platform specific sequence of operations to
 * make bus memory CPU accessible via the readb/readw/readl/writeb/
 * writew/writel functions and the other mmio helpers. The returned
 * address is not guaranteed to be usable directly as a virtual
 * address.
 *
 * If the area you are trying to map is a PCI BAR you should have a
 * look at pci_iomap().
 */
static inline void __iomem *ioremap(resource_size_t offset, unsigned long size)
{
	return ioremap_nocache(offset, size);
}
#define ioremap ioremap

extern void iounmap(volatile void __iomem *addr);
#define iounmap iounmap

extern void set_iounmap_nonlazy(void);

#ifdef __KERNEL__

#include <asm-generic/iomap.h>

/*
 * ISA space is 'always mapped' on a typical x86 system, no need to
 * explicitly ioremap() it. The fact that the ISA IO space is mapped
 * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
 * are physical addresses. The following constant pointer can be
 * used as the IO-area pointer (it can be iounmapped as well, so the
 * analogy with PCI is quite large):
 */
#define __ISA_IO_base ((char __iomem *)(PAGE_OFFSET))

/*
 *	Cache management
 *
 *	This needed for two cases
 *	1. Out of order aware processors
 *	2. Accidentally out of order processors (PPro errata #51)
 */

static inline void flush_write_buffers(void)
{
#if defined(CONFIG_X86_PPRO_FENCE)
	asm volatile("lock; addl $0,0(%%esp)": : :"memory");
#endif
}

#endif /* __KERNEL__ */

extern void native_io_delay(void);

extern int io_delay_type;
extern void io_delay_init(void);

#if defined(CONFIG_PARAVIRT)
#include <asm/paravirt.h>
#else

static inline void slow_down_io(void)
{
	native_io_delay();
#ifdef REALLY_SLOW_IO
	native_io_delay();
	native_io_delay();
	native_io_delay();
#endif
}

#endif

#ifdef CONFIG_AMD_MEM_ENCRYPT
#include <linux/jump_label.h>

extern struct static_key_false sev_enable_key;
static inline bool sev_key_active(void)
{
	return static_branch_unlikely(&sev_enable_key);
}

#else /* !CONFIG_AMD_MEM_ENCRYPT */

static inline bool sev_key_active(void) { return false; }

#endif /* CONFIG_AMD_MEM_ENCRYPT */

#define BUILDIO(bwl, bw, type)						\
static inline void out##bwl(unsigned type value, int port)		\
{									\
	asm volatile("out" #bwl " %" #bw "0, %w1"			\
		     : : "a"(value), "Nd"(port));			\
}									\
									\
static inline unsigned type in##bwl(int port)				\
{									\
	unsigned type value;						\
	asm volatile("in" #bwl " %w1, %" #bw "0"			\
		     : "=a"(value) : "Nd"(port));			\
	return value;							\
}									\
									\
static inline void out##bwl##_p(unsigned type value, int port)		\
{									\
	out##bwl(value, port);						\
	slow_down_io();							\
}									\
									\
static inline unsigned type in##bwl##_p(int port)			\
{									\
	unsigned type value = in##bwl(port);				\
	slow_down_io();							\
	return value;							\
}									\
									\
static inline void outs##bwl(int port, const void *addr, unsigned long count) \
{									\
	if (sev_key_active()) {						\
		unsigned type *value = (unsigned type *)addr;		\
		while (count) {						\
			out##bwl(*value, port);				\
			value++;					\
			count--;					\
		}							\
	} else {							\
		asm volatile("rep; outs" #bwl				\
			     : "+S"(addr), "+c"(count)			\
			     : "d"(port) : "memory");			\
	}								\
}									\
									\
static inline void ins##bwl(int port, void *addr, unsigned long count)	\
{									\
	if (sev_key_active()) {						\
		unsigned type *value = (unsigned type *)addr;		\
		while (count) {						\
			*value = in##bwl(port);				\
			value++;					\
			count--;					\
		}							\
	} else {							\
		asm volatile("rep; ins" #bwl				\
			     : "+D"(addr), "+c"(count)			\
			     : "d"(port) : "memory");			\
	}								\
}

BUILDIO(b, b, char)
BUILDIO(w, w, short)
BUILDIO(l, , int)

#define inb inb
#define inw inw
#define inl inl
#define inb_p inb_p
#define inw_p inw_p
#define inl_p inl_p
#define insb insb
#define insw insw
#define insl insl

#define outb outb
#define outw outw
#define outl outl
#define outb_p outb_p
#define outw_p outw_p
#define outl_p outl_p
#define outsb outsb
#define outsw outsw
#define outsl outsl

extern void *xlate_dev_mem_ptr(phys_addr_t phys);
extern void unxlate_dev_mem_ptr(phys_addr_t phys, void *addr);

#define xlate_dev_mem_ptr xlate_dev_mem_ptr
#define unxlate_dev_mem_ptr unxlate_dev_mem_ptr

extern int ioremap_change_attr(unsigned long vaddr, unsigned long size,
				enum page_cache_mode pcm);
extern void __iomem *ioremap_wc(resource_size_t offset, unsigned long size);
#define ioremap_wc ioremap_wc
extern void __iomem *ioremap_wt(resource_size_t offset, unsigned long size);
#define ioremap_wt ioremap_wt

extern bool is_early_ioremap_ptep(pte_t *ptep);

#ifdef CONFIG_XEN
#include <xen/xen.h>
struct bio_vec;

extern bool xen_biovec_phys_mergeable(const struct bio_vec *vec1,
				      const struct bio_vec *vec2);

#define BIOVEC_PHYS_MERGEABLE(vec1, vec2)				\
	(__BIOVEC_PHYS_MERGEABLE(vec1, vec2) &&				\
	 (!xen_domain() || xen_biovec_phys_mergeable(vec1, vec2)))
#endif	/* CONFIG_XEN */

#define IO_SPACE_LIMIT 0xffff

#include <asm-generic/io.h>
#undef PCI_IOBASE

#ifdef CONFIG_MTRR
extern int __must_check arch_phys_wc_index(int handle);
#define arch_phys_wc_index arch_phys_wc_index

extern int __must_check arch_phys_wc_add(unsigned long base,
					 unsigned long size);
extern void arch_phys_wc_del(int handle);
#define arch_phys_wc_add arch_phys_wc_add
#endif

#ifdef CONFIG_X86_PAT
extern int arch_io_reserve_memtype_wc(resource_size_t start, resource_size_t size);
extern void arch_io_free_memtype_wc(resource_size_t start, resource_size_t size);
#define arch_io_reserve_memtype_wc arch_io_reserve_memtype_wc
#endif

extern bool arch_memremap_can_ram_remap(resource_size_t offset,
					unsigned long size,
					unsigned long flags);
#define arch_memremap_can_ram_remap arch_memremap_can_ram_remap

extern bool phys_mem_access_encrypted(unsigned long phys_addr,
				      unsigned long size);

#endif /* _ASM_X86_IO_H */

Filemanager

Name Type Size Permission Actions
crypto Folder 0755
e820 Folder 0755
fpu Folder 0755
numachip Folder 0755
trace Folder 0755
uv Folder 0755
xen Folder 0755
Kbuild File 294 B 0644
a.out-core.h File 1.89 KB 0644
acenv.h File 1.56 KB 0644
acpi.h File 4.76 KB 0644
agp.h File 1.04 KB 0644
alternative-asm.h File 2.43 KB 0644
alternative.h File 8.28 KB 0644
amd_nb.h File 2.98 KB 0644
apb_timer.h File 1.43 KB 0644
apic.h File 14.53 KB 0644
apic_flat_64.h File 151 B 0644
apicdef.h File 11.26 KB 0644
apm.h File 1.8 KB 0644
arch_hweight.h File 1.28 KB 0644
archrandom.h File 3.03 KB 0644
asm-offsets.h File 35 B 0644
asm-prototypes.h File 946 B 0644
asm.h File 4.97 KB 0644
atomic.h File 6.02 KB 0644
atomic64_32.h File 8.71 KB 0644
atomic64_64.h File 6.31 KB 0644
barrier.h File 3.6 KB 0644
bios_ebda.h File 914 B 0644
bitops.h File 13.78 KB 0644
boot.h File 1.53 KB 0644
bootparam_utils.h File 2.86 KB 0644
bug.h File 2.07 KB 0644
bugs.h File 493 B 0644
cache.h File 641 B 0644
cacheflush.h File 306 B 0644
cacheinfo.h File 209 B 0644
calgary.h File 2.31 KB 0644
ce4100.h File 121 B 0644
checksum.h File 133 B 0644
checksum_32.h File 4.86 KB 0644
checksum_64.h File 5.41 KB 0644
clocksource.h File 488 B 0644
cmdline.h File 302 B 0644
cmpxchg.h File 7.68 KB 0644
cmpxchg_32.h File 3.15 KB 0644
cmpxchg_64.h File 543 B 0644
compat.h File 7.37 KB 0644
cpu.h File 975 B 0644
cpu_device_id.h File 7.39 KB 0644
cpu_entry_area.h File 2.27 KB 0644
cpufeature.h File 7.75 KB 0644
cpufeatures.h File 25.59 KB 0644
cpumask.h File 408 B 0644
crash.h File 320 B 0644
current.h File 443 B 0644
debugreg.h File 2.67 KB 0644
delay.h File 208 B 0644
desc.h File 11.42 KB 0644
desc_defs.h File 3.16 KB 0644
device.h File 568 B 0644
disabled-features.h File 2.31 KB 0644
div64.h File 1.79 KB 0644
dma-mapping.h File 2.4 KB 0644
dma.h File 9.58 KB 0644
dmi.h File 556 B 0644
dwarf2.h File 2.43 KB 0644
edac.h File 474 B 0644
efi.h File 6.9 KB 0644
elf.h File 10.82 KB 0644
emergency-restart.h File 202 B 0644
entry_arch.h File 1.88 KB 0644
espfix.h File 426 B 0644
exec.h File 37 B 0644
export.h File 120 B 0644
extable.h File 1.27 KB 0644
fb.h File 540 B 0644
fixmap.h File 6.04 KB 0644
floppy.h File 6.59 KB 0644
frame.h File 815 B 0644
ftrace.h File 1.8 KB 0644
futex.h File 2.2 KB 0644
gart.h File 2.64 KB 0644
genapic.h File 22 B 0644
geode.h File 842 B 0644
hardirq.h File 2.3 KB 0644
highmem.h File 2.6 KB 0644
hpet.h File 3.38 KB 0644
hugetlb.h File 2.15 KB 0644
hw_breakpoint.h File 1.96 KB 0644
hw_irq.h File 3.85 KB 0644
hypervisor.h File 1.84 KB 0644
i8259.h File 1.93 KB 0644
ia32.h File 1.46 KB 0644
ia32_unistd.h File 313 B 0644
imr.h File 1.81 KB 0644
inat.h File 6.58 KB 0644
inat_types.h File 1013 B 0644
init.h File 632 B 0644
insn-eval.h File 837 B 0644
insn.h File 7.46 KB 0644
inst.h File 5.07 KB 0644
intel-family.h File 3.47 KB 0644
intel-mid.h File 4.91 KB 0644
intel_ds.h File 793 B 0644
intel_mid_vrtc.h File 326 B 0644
intel_pmc_ipc.h File 2.08 KB 0644
intel_pt.h File 292 B 0644
intel_punit_ipc.h File 4.56 KB 0644
intel_rdt_sched.h File 2.59 KB 0644
intel_scu_ipc.h File 2.3 KB 0644
intel_telemetry.h File 3.96 KB 0644
invpcid.h File 1.57 KB 0644
io.h File 12.21 KB 0644
io_apic.h File 5.63 KB 0644
iomap.h File 1.22 KB 0644
iommu.h File 392 B 0644
iommu_table.h File 3.82 KB 0644
iosf_mbi.h File 5.74 KB 0644
ipi.h File 2.84 KB 0644
irq.h File 1.12 KB 0644
irq_regs.h File 679 B 0644
irq_remapping.h File 2.96 KB 0644
irq_vectors.h File 4.12 KB 0644
irq_work.h File 397 B 0644
irqdomain.h File 1.61 KB 0644
irqflags.h File 4.38 KB 0644
ist.h File 735 B 0644
jump_label.h File 2.44 KB 0644
kasan.h File 966 B 0644
kaslr.h File 424 B 0644
kbdleds.h File 454 B 0644
kdebug.h File 752 B 0644
kexec-bzimage64.h File 189 B 0644
kexec.h File 6.69 KB 0644
kgdb.h File 2.09 KB 0644
kmap_types.h File 289 B 0644
kprobes.h File 3.82 KB 0644
kvm_emulate.h File 15.23 KB 0644
kvm_guest.h File 172 B 0644
kvm_host.h File 42.72 KB 0644
kvm_page_track.h File 2.48 KB 0644
kvm_para.h File 3 KB 0644
kvmclock.h File 170 B 0644
linkage.h File 581 B 0644
livepatch.h File 1.12 KB 0644
local.h File 3.83 KB 0644
local64.h File 33 B 0644
mach_timer.h File 1.55 KB 0644
mach_traps.h File 1013 B 0644
math_emu.h File 395 B 0644
mc146818rtc.h File 2.76 KB 0644
mce.h File 12.54 KB 0644
mem_encrypt.h File 2.83 KB 0644
microcode.h File 4.14 KB 0644
microcode_amd.h File 1.41 KB 0644
microcode_intel.h File 2.46 KB 0644
misc.h File 143 B 0644
mmconfig.h File 374 B 0644
mmu.h File 1.57 KB 0644
mmu_context.h File 10.27 KB 0644
mmx.h File 337 B 0644
mmzone.h File 129 B 0644
mmzone_32.h File 1.16 KB 0644
mmzone_64.h File 430 B 0644
module.h File 2.05 KB 0644
mpspec.h File 3.93 KB 0644
mpspec_def.h File 3.93 KB 0644
mpx.h File 2.97 KB 0644
mshyperv.h File 10.69 KB 0644
msi.h File 392 B 0644
msidef.h File 1.77 KB 0644
msr-index.h File 30.92 KB 0644
msr-trace.h File 1.35 KB 0644
msr.h File 10.85 KB 0644
mtrr.h File 4.62 KB 0644
mwait.h File 3.74 KB 0644
nmi.h File 1.39 KB 0644
nops.h File 4.31 KB 0644
nospec-branch.h File 11.49 KB 0644
numa.h File 2.18 KB 0644
numa_32.h File 256 B 0644
olpc.h File 3.16 KB 0644
olpc_ofw.h File 1.1 KB 0644
orc_lookup.h File 1.63 KB 0644
orc_types.h File 3.47 KB 0644
page.h File 2.18 KB 0644
page_32.h File 1.01 KB 0644
page_32_types.h File 1.7 KB 0644
page_64.h File 1.42 KB 0644
page_64_types.h File 2.34 KB 0644
page_types.h File 2.29 KB 0644
paravirt.h File 23.31 KB 0644
paravirt_types.h File 22.15 KB 0644
parport.h File 314 B 0644
pat.h File 768 B 0644
pci-direct.h File 995 B 0644
pci-functions.h File 654 B 0644
pci.h File 3.51 KB 0644
pci_64.h File 684 B 0644
pci_x86.h File 5.71 KB 0644
percpu.h File 18.97 KB 0644
perf_event.h File 8.82 KB 0644
perf_event_p4.h File 26.1 KB 0644
pgalloc.h File 5.57 KB 0644
pgtable-2level.h File 2.75 KB 0644
pgtable-2level_types.h File 867 B 0644
pgtable-3level.h File 10.24 KB 0644
pgtable-3level_types.h File 1.06 KB 0644
pgtable-invert.h File 1.07 KB 0644
pgtable.h File 33.91 KB 0644
pgtable_32.h File 3.1 KB 0644
pgtable_32_types.h File 2.01 KB 0644
pgtable_64.h File 7.37 KB 0644
pgtable_64_types.h File 3.67 KB 0644
pgtable_types.h File 16.75 KB 0644
pkeys.h File 3.17 KB 0644
platform_sst_audio.h File 3.18 KB 0644
pm-trace.h File 611 B 0644
posix_types.h File 144 B 0644
preempt.h File 3.04 KB 0644
probe_roms.h File 273 B 0644
processor-cyrix.h File 879 B 0644
processor-flags.h File 1.71 KB 0644
processor.h File 24.54 KB 0644
prom.h File 1 KB 0644
proto.h File 1003 B 0644
pti.h File 369 B 0644
ptrace.h File 8.52 KB 0644
purgatory.h File 571 B 0644
pvclock-abi.h File 1.49 KB 0644
pvclock.h File 2.64 KB 0644
qrwlock.h File 199 B 0644
qspinlock.h File 2.54 KB 0644
qspinlock_paravirt.h File 1.85 KB 0644
realmode.h File 1.76 KB 0644
reboot.h File 850 B 0644
reboot_fixups.h File 183 B 0644
refcount.h File 2.83 KB 0644
required-features.h File 2.81 KB 0644
rio.h File 2.57 KB 0644
rmwcc.h File 1.62 KB 0644
rwsem.h File 7.02 KB 0644
seccomp.h File 510 B 0644
sections.h File 465 B 0644
segment.h File 9.47 KB 0644
serial.h File 1.11 KB 0644
set_memory.h File 3.86 KB 0644
setup.h File 3.4 KB 0644
setup_arch.h File 77 B 0644
shmparam.h File 193 B 0644
sigcontext.h File 261 B 0644
sigframe.h File 2.25 KB 0644
sighandling.h File 649 B 0644
signal.h File 2.37 KB 0644
simd.h File 287 B 0644
smap.h File 1.71 KB 0644
smp.h File 4.73 KB 0644
sparsemem.h File 1.01 KB 0644
spec-ctrl.h File 2.81 KB 0644
special_insns.h File 5.04 KB 0644
spinlock.h File 1.19 KB 0644
spinlock_types.h File 719 B 0644
sta2x11.h File 352 B 0644
stackprotector.h File 4.13 KB 0644
stacktrace.h File 2.57 KB 0644
string.h File 129 B 0644
string_32.h File 7.74 KB 0644
string_64.h File 3.56 KB 0644
suspend.h File 131 B 0644
suspend_32.h File 822 B 0644
suspend_64.h File 1.79 KB 0644
svm.h File 7.08 KB 0644
swiotlb.h File 991 B 0644
switch_to.h File 2.98 KB 0644
sync_bitops.h File 3.42 KB 0644
sys_ia32.h File 1.8 KB 0644
syscall.h File 5.14 KB 0644
syscalls.h File 1.39 KB 0644
sysfb.h File 2.54 KB 0644
tce.h File 1.68 KB 0644
text-patching.h File 2.3 KB 0644
thread_info.h File 9.33 KB 0644
time.h File 331 B 0644
timer.h File 1 KB 0644
timex.h File 546 B 0644
tlb.h File 1.05 KB 0644
tlbbatch.h File 332 B 0644
tlbflush.h File 17.09 KB 0644
topology.h File 4.84 KB 0644
trace_clock.h File 406 B 0644
traps.h File 5.74 KB 0644
tsc.h File 1.93 KB 0644
uaccess.h File 21.69 KB 0644
uaccess_32.h File 1.54 KB 0644
uaccess_64.h File 5.32 KB 0644
umip.h File 329 B 0644
unaligned.h File 345 B 0644
unistd.h File 1.45 KB 0644
unwind.h File 3.13 KB 0644
unwind_hints.h File 3.01 KB 0644
uprobes.h File 1.57 KB 0644
user.h File 2.2 KB 0644
user32.h File 2.11 KB 0644
user_32.h File 4.92 KB 0644
user_64.h File 5.21 KB 0644
vdso.h File 1.09 KB 0644
vga.h File 740 B 0644
vgtod.h File 2.13 KB 0644
virtext.h File 2.62 KB 0644
vm86.h File 2.16 KB 0644
vmx.h File 23.5 KB 0644
vsyscall.h File 635 B 0644
vvar.h File 1.38 KB 0644
word-at-a-time.h File 2.54 KB 0644
x86_init.h File 9.25 KB 0644
xor.h File 10.26 KB 0644
xor_32.h File 14.4 KB 0644
xor_64.h File 716 B 0644
xor_avx.h File 4.5 KB 0644