404

[ Avaa Bypassed ]




Upload:

Command:

botdev@3.21.166.125: ~ $
/*
 * include/asm-xtensa/cacheasm.h
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 2006 Tensilica Inc.
 */

#include <asm/cache.h>
#include <asm/asmmacro.h>
#include <linux/stringify.h>

/*
 * Define cache functions as macros here so that they can be used
 * by the kernel and boot loader. We should consider moving them to a
 * library that can be linked by both.
 *
 * Locking
 *
 *   ___unlock_dcache_all
 *   ___unlock_icache_all
 *
 * Flush and invaldating
 *
 *   ___flush_invalidate_dcache_{all|range|page}
 *   ___flush_dcache_{all|range|page}
 *   ___invalidate_dcache_{all|range|page}
 *   ___invalidate_icache_{all|range|page}
 *
 */


	.macro	__loop_cache_unroll ar at insn size line_width max_immed

	.if	(1 << (\line_width)) > (\max_immed)
	.set	_reps, 1
	.elseif	(2 << (\line_width)) > (\max_immed)
	.set	_reps, 2
	.else
	.set	_reps, 4
	.endif

	__loopi	\ar, \at, \size, (_reps << (\line_width))
	.set	_index, 0
	.rep	_reps
	\insn	\ar, _index << (\line_width)
	.set	_index, _index + 1
	.endr
	__endla	\ar, \at, _reps << (\line_width)

	.endm


	.macro	__loop_cache_all ar at insn size line_width max_immed

	movi	\ar, 0
	__loop_cache_unroll \ar, \at, \insn, \size, \line_width, \max_immed

	.endm


	.macro	__loop_cache_range ar as at insn line_width

	extui	\at, \ar, 0, \line_width
	add	\as, \as, \at

	__loops	\ar, \as, \at, \line_width
	\insn	\ar, 0
	__endla	\ar, \at, (1 << (\line_width))

	.endm


	.macro	__loop_cache_page ar at insn line_width max_immed

	__loop_cache_unroll \ar, \at, \insn, PAGE_SIZE, \line_width, \max_immed

	.endm


	.macro	___unlock_dcache_all ar at

#if XCHAL_DCACHE_LINE_LOCKABLE && XCHAL_DCACHE_SIZE
	__loop_cache_all \ar \at diu XCHAL_DCACHE_SIZE \
		XCHAL_DCACHE_LINEWIDTH 240
#endif

	.endm


	.macro	___unlock_icache_all ar at

#if XCHAL_ICACHE_LINE_LOCKABLE && XCHAL_ICACHE_SIZE
	__loop_cache_all \ar \at iiu XCHAL_ICACHE_SIZE \
		XCHAL_ICACHE_LINEWIDTH 240
#endif

	.endm


	.macro	___flush_invalidate_dcache_all ar at

#if XCHAL_DCACHE_SIZE
	__loop_cache_all \ar \at diwbi XCHAL_DCACHE_SIZE \
		XCHAL_DCACHE_LINEWIDTH 240
#endif

	.endm


	.macro	___flush_dcache_all ar at

#if XCHAL_DCACHE_SIZE
	__loop_cache_all \ar \at diwb XCHAL_DCACHE_SIZE \
		XCHAL_DCACHE_LINEWIDTH 240
#endif

	.endm


	.macro	___invalidate_dcache_all ar at

#if XCHAL_DCACHE_SIZE
	__loop_cache_all \ar \at dii XCHAL_DCACHE_SIZE \
			 XCHAL_DCACHE_LINEWIDTH 1020
#endif

	.endm


	.macro	___invalidate_icache_all ar at

#if XCHAL_ICACHE_SIZE
	__loop_cache_all \ar \at iii XCHAL_ICACHE_SIZE \
			 XCHAL_ICACHE_LINEWIDTH 1020
#endif

	.endm



	.macro	___flush_invalidate_dcache_range ar as at

#if XCHAL_DCACHE_SIZE
	__loop_cache_range \ar \as \at dhwbi XCHAL_DCACHE_LINEWIDTH
#endif

	.endm


	.macro	___flush_dcache_range ar as at

#if XCHAL_DCACHE_SIZE
	__loop_cache_range \ar \as \at dhwb XCHAL_DCACHE_LINEWIDTH
#endif

	.endm


	.macro	___invalidate_dcache_range ar as at

#if XCHAL_DCACHE_SIZE
	__loop_cache_range \ar \as \at dhi XCHAL_DCACHE_LINEWIDTH
#endif

	.endm


	.macro	___invalidate_icache_range ar as at

#if XCHAL_ICACHE_SIZE
	__loop_cache_range \ar \as \at ihi XCHAL_ICACHE_LINEWIDTH
#endif

	.endm



	.macro	___flush_invalidate_dcache_page ar as

#if XCHAL_DCACHE_SIZE
	__loop_cache_page \ar \as dhwbi XCHAL_DCACHE_LINEWIDTH 1020
#endif

	.endm


	.macro ___flush_dcache_page ar as

#if XCHAL_DCACHE_SIZE
	__loop_cache_page \ar \as dhwb XCHAL_DCACHE_LINEWIDTH 1020
#endif

	.endm


	.macro	___invalidate_dcache_page ar as

#if XCHAL_DCACHE_SIZE
	__loop_cache_page \ar \as dhi XCHAL_DCACHE_LINEWIDTH 1020
#endif

	.endm


	.macro	___invalidate_icache_page ar as

#if XCHAL_ICACHE_SIZE
	__loop_cache_page \ar \as ihi XCHAL_ICACHE_LINEWIDTH 1020
#endif

	.endm

Filemanager

Name Type Size Permission Actions
Kbuild File 685 B 0644
asm-offsets.h File 35 B 0644
asm-uaccess.h File 4.11 KB 0644
asmmacro.h File 2.76 KB 0644
atomic.h File 7.38 KB 0644
barrier.h File 542 B 0644
bitops.h File 5.08 KB 0644
bootparam.h File 1.37 KB 0644
bugs.h File 451 B 0644
cache.h File 969 B 0644
cacheasm.h File 3.77 KB 0644
cacheflush.h File 5.76 KB 0644
checksum.h File 6 KB 0644
cmpxchg.h File 3.9 KB 0644
coprocessor.h File 5.05 KB 0644
current.h File 675 B 0644
delay.h File 1.63 KB 0644
dma-mapping.h File 855 B 0644
dma.h File 1.79 KB 0644
elf.h File 5.75 KB 0644
fixmap.h File 2.5 KB 0644
flat.h File 686 B 0644
ftrace.h File 979 B 0644
futex.h File 2.59 KB 0644
highmem.h File 2.33 KB 0644
hw_breakpoint.h File 1.45 KB 0644
hw_irq.h File 320 B 0644
initialize_mmu.h File 4.58 KB 0644
io.h File 2.09 KB 0644
irq.h File 1.46 KB 0644
irqflags.h File 1.99 KB 0644
kmem_layout.h File 2.07 KB 0644
mmu.h File 462 B 0644
mmu_context.h File 3.62 KB 0644
module.h File 525 B 0644
mxregs.h File 1.3 KB 0644
nommu_context.h File 602 B 0644
page.h File 5.69 KB 0644
pci-bridge.h File 2.16 KB 0644
pci.h File 1.37 KB 0644
perf_event.h File 108 B 0644
pgalloc.h File 1.84 KB 0644
pgtable.h File 14.89 KB 0644
platform.h File 1.75 KB 0644
processor.h File 7.44 KB 0644
ptrace.h File 3.74 KB 0644
regs.h File 3.87 KB 0644
segment.h File 376 B 0644
serial.h File 443 B 0644
shmparam.h File 561 B 0644
signal.h File 502 B 0644
smp.h File 967 B 0644
spinlock.h File 4.6 KB 0644
spinlock_types.h File 412 B 0644
stacktrace.h File 1.13 KB 0644
string.h File 2.65 KB 0644
switch_to.h File 601 B 0644
syscall.h File 982 B 0644
sysmem.h File 426 B 0644
thread_info.h File 3.62 KB 0644
timex.h File 1.79 KB 0644
tlb.h File 1.1 KB 0644
tlbflush.h File 5.53 KB 0644
traps.h File 1.87 KB 0644
types.h File 501 B 0644
uaccess.h File 8.67 KB 0644
ucontext.h File 540 B 0644
unaligned.h File 864 B 0644
unistd.h File 639 B 0644
user.h File 507 B 0644
vectors.h File 4.05 KB 0644
vga.h File 434 B 0644