/* * Switch an MMU context. * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. * * Copyright (C) 2001 - 2013 Tensilica Inc. */ #ifndef _XTENSA_MMU_CONTEXT_H #define _XTENSA_MMU_CONTEXT_H #ifndef CONFIG_MMU #include <asm/nommu_context.h> #else #include <linux/stringify.h> #include <linux/sched.h> #include <linux/mm_types.h> #include <asm/vectors.h> #include <asm/pgtable.h> #include <asm/cacheflush.h> #include <asm/tlbflush.h> #include <asm-generic/mm_hooks.h> #include <asm-generic/percpu.h> #if (XCHAL_HAVE_TLBS != 1) # error "Linux must have an MMU!" #endif DECLARE_PER_CPU(unsigned long, asid_cache); #define cpu_asid_cache(cpu) per_cpu(asid_cache, cpu) /* * NO_CONTEXT is the invalid ASID value that we don't ever assign to * any user or kernel context. We use the reserved values in the * ASID_INSERT macro below. * * 0 invalid * 1 kernel * 2 reserved * 3 reserved * 4...255 available */ #define NO_CONTEXT 0 #define ASID_USER_FIRST 4 #define ASID_MASK ((1 << XCHAL_MMU_ASID_BITS) - 1) #define ASID_INSERT(x) (0x03020001 | (((x) & ASID_MASK) << 8)) void init_mmu(void); static inline void set_rasid_register (unsigned long val) { __asm__ __volatile__ (" wsr %0, rasid\n\t" " isync\n" : : "a" (val)); } static inline unsigned long get_rasid_register (void) { unsigned long tmp; __asm__ __volatile__ (" rsr %0, rasid\n\t" : "=a" (tmp)); return tmp; } static inline void get_new_mmu_context(struct mm_struct *mm, unsigned int cpu) { unsigned long asid = cpu_asid_cache(cpu); if ((++asid & ASID_MASK) == 0) { /* * Start new asid cycle; continue counting with next * incarnation bits; skipping over 0, 1, 2, 3. */ local_flush_tlb_all(); asid += ASID_USER_FIRST; } cpu_asid_cache(cpu) = asid; mm->context.asid[cpu] = asid; mm->context.cpu = cpu; } static inline void get_mmu_context(struct mm_struct *mm, unsigned int cpu) { /* * Check if our ASID is of an older version and thus invalid. */ if (mm) { unsigned long asid = mm->context.asid[cpu]; if (asid == NO_CONTEXT || ((asid ^ cpu_asid_cache(cpu)) & ~ASID_MASK)) get_new_mmu_context(mm, cpu); } } static inline void activate_context(struct mm_struct *mm, unsigned int cpu) { get_mmu_context(mm, cpu); set_rasid_register(ASID_INSERT(mm->context.asid[cpu])); invalidate_page_directory(); } /* * Initialize the context related info for a new mm_struct * instance. Valid cpu values are 0..(NR_CPUS-1), so initializing * to -1 says the process has never run on any core. */ static inline int init_new_context(struct task_struct *tsk, struct mm_struct *mm) { int cpu; for_each_possible_cpu(cpu) { mm->context.asid[cpu] = NO_CONTEXT; } mm->context.cpu = -1; return 0; } static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, struct task_struct *tsk) { unsigned int cpu = smp_processor_id(); int migrated = next->context.cpu != cpu; /* Flush the icache if we migrated to a new core. */ if (migrated) { __invalidate_icache_all(); next->context.cpu = cpu; } if (migrated || prev != next) activate_context(next, cpu); } #define activate_mm(prev, next) switch_mm((prev), (next), NULL) #define deactivate_mm(tsk, mm) do { } while (0) /* * Destroy context related info for an mm_struct that is about * to be put to rest. */ static inline void destroy_context(struct mm_struct *mm) { invalidate_page_directory(); } static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) { /* Nothing to do. */ } #endif /* CONFIG_MMU */ #endif /* _XTENSA_MMU_CONTEXT_H */
Name | Type | Size | Permission | Actions |
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Kbuild | File | 685 B | 0644 |
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asm-offsets.h | File | 35 B | 0644 |
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asm-uaccess.h | File | 4.11 KB | 0644 |
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asmmacro.h | File | 2.76 KB | 0644 |
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atomic.h | File | 7.38 KB | 0644 |
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barrier.h | File | 542 B | 0644 |
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bitops.h | File | 5.08 KB | 0644 |
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bootparam.h | File | 1.37 KB | 0644 |
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bugs.h | File | 451 B | 0644 |
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cache.h | File | 969 B | 0644 |
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cacheasm.h | File | 3.77 KB | 0644 |
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cacheflush.h | File | 5.76 KB | 0644 |
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checksum.h | File | 6 KB | 0644 |
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cmpxchg.h | File | 3.9 KB | 0644 |
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coprocessor.h | File | 5.05 KB | 0644 |
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current.h | File | 675 B | 0644 |
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delay.h | File | 1.63 KB | 0644 |
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dma-mapping.h | File | 855 B | 0644 |
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dma.h | File | 1.79 KB | 0644 |
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elf.h | File | 5.75 KB | 0644 |
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fixmap.h | File | 2.5 KB | 0644 |
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flat.h | File | 686 B | 0644 |
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ftrace.h | File | 979 B | 0644 |
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futex.h | File | 2.59 KB | 0644 |
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highmem.h | File | 2.33 KB | 0644 |
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hw_breakpoint.h | File | 1.45 KB | 0644 |
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hw_irq.h | File | 320 B | 0644 |
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initialize_mmu.h | File | 4.58 KB | 0644 |
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io.h | File | 2.09 KB | 0644 |
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irq.h | File | 1.46 KB | 0644 |
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irqflags.h | File | 1.99 KB | 0644 |
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kmem_layout.h | File | 2.07 KB | 0644 |
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mmu.h | File | 462 B | 0644 |
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mmu_context.h | File | 3.62 KB | 0644 |
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module.h | File | 525 B | 0644 |
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mxregs.h | File | 1.3 KB | 0644 |
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nommu_context.h | File | 602 B | 0644 |
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page.h | File | 5.69 KB | 0644 |
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pci-bridge.h | File | 2.16 KB | 0644 |
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pci.h | File | 1.37 KB | 0644 |
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perf_event.h | File | 108 B | 0644 |
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pgalloc.h | File | 1.84 KB | 0644 |
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pgtable.h | File | 14.89 KB | 0644 |
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platform.h | File | 1.75 KB | 0644 |
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processor.h | File | 7.44 KB | 0644 |
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ptrace.h | File | 3.74 KB | 0644 |
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regs.h | File | 3.87 KB | 0644 |
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segment.h | File | 376 B | 0644 |
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serial.h | File | 443 B | 0644 |
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shmparam.h | File | 561 B | 0644 |
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signal.h | File | 502 B | 0644 |
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smp.h | File | 967 B | 0644 |
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spinlock.h | File | 4.6 KB | 0644 |
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spinlock_types.h | File | 412 B | 0644 |
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stacktrace.h | File | 1.13 KB | 0644 |
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string.h | File | 2.65 KB | 0644 |
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switch_to.h | File | 601 B | 0644 |
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syscall.h | File | 982 B | 0644 |
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sysmem.h | File | 426 B | 0644 |
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thread_info.h | File | 3.62 KB | 0644 |
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timex.h | File | 1.79 KB | 0644 |
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tlb.h | File | 1.1 KB | 0644 |
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tlbflush.h | File | 5.53 KB | 0644 |
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traps.h | File | 1.87 KB | 0644 |
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types.h | File | 501 B | 0644 |
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uaccess.h | File | 8.67 KB | 0644 |
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ucontext.h | File | 540 B | 0644 |
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unaligned.h | File | 864 B | 0644 |
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unistd.h | File | 639 B | 0644 |
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user.h | File | 507 B | 0644 |
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vectors.h | File | 4.05 KB | 0644 |
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vga.h | File | 434 B | 0644 |
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